L
Lostgallifreyan
Guest
Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote in
news:IPmdnZqZtOQ4FTTTnZ2dnUVZ_sydnZ2d@supernews.com:
from exactly where, to ground? If I know that I have a better chance of
understanding the rest than deducing it the other way round. The thing about
loops is that all of it might be influenced by any point in it! Causality is
a tad hard to follow in loops...
Thanks. That avoids the confusion and leaves HEF4046B
in a context that makes more sense to me.
news:IPmdnZqZtOQ4FTTTnZ2dnUVZ_sydnZ2d@supernews.com:
Indulge my weakness, please spell it out for me... How much resistor, andGround and VDD both work, but ground is usually best, because the VCO
control voltage is ground-referred. You just need to pull the quiescent
operating point of the phase detector a bit off zero to avoid the flat
spot in the V(phi) curve.
The flat spot is caused by the finite slew rate of the output--as the
phase error approaches zero, the pulse width narrows until it's less
than the rise time. At that point the output becomes a triangle instead
of a trapezoid, so its area starts going as phi**2 instead of phi. Since
the average output current goes as the pulse area, that makes the phase
detector gain go to zero at phi=0, which is A Bad Thing.
from exactly where, to ground? If I know that I have a better chance of
understanding the rest than deducing it the other way round. The thing about
loops is that all of it might be influenced by any point in it! Causality is
a tad hard to follow in loops...
Good enough for me.AFAIK all 18-volt CMOS logic parts are metal gate. That's one of the
usual ways to refer to the general class of CD4XXX, 74CXX, and other old
high voltage CMOS parts.
in a context that makes more sense to me.