Yo Larry

G

Genome

Guest
I'd like your critique on the circuit I posted in ABSE under,

'Oh shit it's a binaries newsgroup'.

DNA
 
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:lGk0e.489$xs4.29@newsfe6-win.ntli.net...
I'd like your critique on the circuit I posted in ABSE under,

'Oh shit it's a binaries newsgroup'.

Ok, I'll play. In the future, please feel welcome to
unmunged my email address and use it for invitations
of this nature and use the freed up subject otherwise.

For the moment, just a few quick comments that apply
regardless of how you answer my request below.

0. (Yes, some parts would regret being real.)

1. Using the MOSFET gate capacitance for a
dominant pole is nice when it can be managed.

2. I'm not sure the input cascode is doing much
that needs doing. Why not just use HV NPNs
for the input diff pair? (This position may change
when I see the required frequency response, but
given the asymmetrical output slewing, I expect
that speed is not a driving issue here.)

3. The degeneration in your current mirror is a
little biggish and very likely to keep the output
MOSFET on, depending on its threshold. (I
have not done the detailed analysis, just noted
the hazard with ad-hoc mental calculations.)

Before doing any detailed critique, I would like to
know what is expected or required of your circuit,
including cost, accuracy, temperature stability,
repeatablity, power efficiency, linearity, frequency
response, load variation and expected load. (My
suspicion is it is not meant for a 10K load.)

Without knowing those details, the most I can say
now (beyond that hazard) is that it looks like it
could do something useful.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
 
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:DPl0e.504$xs4.117@newsfe6-win.ntli.net...
....
Hey, my name is Genome. You've been set a
challenge.
Game over. You win.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
 
"Larry Brasfield" <donotspam_larry_brasfield@hotmail.com> wrote in
message news:ODm0e.1492$vB1.1078@news.uswest.net...
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:DPl0e.504$xs4.117@newsfe6-win.ntli.net...
...
Hey, my name is Genome. You've been set a
challenge.

Game over. You win.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
Oh come on.

You know them that know are watching.

I don't mind being an idiot.

Play with me.

DNA
 
On Thu, 24 Mar 2005 00:06:08 GMT, "Genome" <ilike_spam@yahoo.co.uk>
wrote:

"Larry Brasfield" <donotspam_larry_brasfield@hotmail.com> wrote in
message news:ODm0e.1492$vB1.1078@news.uswest.net...
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:DPl0e.504$xs4.117@newsfe6-win.ntli.net...
...
Hey, my name is Genome. You've been set a
challenge.

Game over. You win.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.



Oh come on.

You know them that know are watching.

I don't mind being an idiot.

Play with me.

DNA
Sno-o-o-o-ort :)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
Genome wrote:
"Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote in


3. The degeneration in your current mirror is a
little biggish and very likely to keep the

output

MOSFET on, depending on its threshold. (I
have not done the detailed analysis, just noted
the hazard with ad-hoc mental calculations.)



As you would, as I did... and I would.
I like that one "ad hoc mental calculations"- what a joke- and the
"little biggish" one too.
 
"Larry Brasfield" <donotspam_larry_brasfield@hotmail.com> wrote in
message news:ODm0e.1492$vB1.1078@news.uswest.net...
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:DPl0e.504$xs4.117@newsfe6-win.ntli.net...
...
Hey, my name is Genome. You've been set a
challenge.

Game over. You win.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
Oh well, if you look in ABSE again then you'll find the same circuit
with a few little modifications.

If you want to measure loop gain and phase then you use the method
shown.

Break the loop with an AC voltage source and plot V(B)/V(A). There may
be some caveats about impedances but I'm sure you'll get the general
idea.

You have been measuring the closed loop response.

There is an example in the LTspice directory somewhere as well.

HTH

DNA
 
Genome wrote:
"Larry Brasfield" <donotspam_larry_brasfield@hotmail.com> wrote in
message news:ODm0e.1492$vB1.1078@news.uswest.net...

"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:DPl0e.504$xs4.117@newsfe6-win.ntli.net...
...

Hey, my name is Genome. You've been set a
challenge.

Game over. You win.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.




Oh well, if you look in ABSE again then you'll find the same circuit
with a few little modifications.

If you want to measure loop gain and phase then you use the method
shown.

Break the loop with an AC voltage source and plot V(B)/V(A). There may
be some caveats about impedances but I'm sure you'll get the general
idea.

You have been measuring the closed loop response.

There is an example in the LTspice directory somewhere as well.

HTH

DNA
That piss-ant fraud, Brasfield, has no idea in hell what you're doing
there- he was confounded with his "ad-hoc mental calculations" long ago.
And you're not going to see him hanging in there with anyone who knows
what they're doing- Brasfield craves attention form ignorant punk
juveniles- he will go on forever with leading them on- but a mature
adult?- no way, he books the thread. He made a mistake following his
perverse libido into SED...now he is in danger of losing his "stature"
with the kiddies in SEB...ehhh what a shame.
 
On Thu, 24 Mar 2005 00:06:08 GMT, "Genome" <ilike_spam@yahoo.co.uk>
wrote:

"Larry Brasfield" <donotspam_larry_brasfield@hotmail.com> wrote in
message news:ODm0e.1492$vB1.1078@news.uswest.net...
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:DPl0e.504$xs4.117@newsfe6-win.ntli.net...
...
Hey, my name is Genome. You've been set a
challenge.

Game over. You win.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.



Oh come on.

You know them that know are watching.

I don't mind being an idiot.
Right. It's the people who mind being idiots that are the real idiots.

Play with me.
What's life for?

John
 
Larry Brasfield wrote:
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:m9y0e.1156$kj5.480@newsfe6-gui.ntli.net...

"Larry Brasfield" <donotspam_larry_brasfield@hotmail.com> wrote in
message news:ODm0e.1492$vB1.1078@news.uswest.net...

"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:DPl0e.504$xs4.117@newsfe6-win.ntli.net...
...

Hey, my name is Genome. You've been set a
challenge.

Game over. You win.

...

Oh well, if you look in ABSE again then you'll find the same circuit
with a few little modifications.


Look, I don't mean to be unkind here, but you
must realize your game can only be played and
won a certain number of times. Given your good
simulation of sincerity before, you now have a high
threshold to overcome before getting me in.
Sounds like a chickensh_t fraud trying to worm out of being called due...

If you want to measure loop gain and phase then you use the method
shown.

Break the loop with an AC voltage source and plot V(B)/V(A). There may
be some caveats about impedances but I'm sure you'll get the general
idea.


If *I* want to measure? What do you want? (And
do remember that threshold problem. I cannot even
imagine, let alone suggest, how to solve that. ;-)

In most of the circuits, your main interest has been stability- and now
it turns out, you have no idea of how to use SPICE to measure it. For
someone who claims all this cutting edge and profound knowledge of
electronics, you don't seem to know much. You don't want to acknowledge
the Genome's circuit because it makes yours like something a community
college student would cook up- really ordinary and unsatisfactory.

You have been measuring the closed loop response.


I don't recall that with "your" circuit.
That is a lie- because you stated that it used the MOSFET gs capacitance
for dominant pole compensation and may have problems....

(I have no idea
whether it is yours or not.) I never looked at it with
enough care to get that far. I never saw anything to
make me think it might be or become real.
That is because you have very little comprehension of it.

There is an example in the LTspice directory somewhere as well.


Ok. I believe you. So?


HTH


? If that's a joke, I like it.
The only joke around here are your sorry-assed circuits- totally
"garbage" electronics.
 
"Larry Brasfield" <donotspam_larry_brasfield@hotmail.com> wrote in
message news:eek:jF0e.31$TJ1.1169@news.uswest.net...
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:m9y0e.1156$kj5.480@newsfe6-gui.ntli.net...
"Larry Brasfield" <donotspam_larry_brasfield@hotmail.com> wrote in
message news:ODm0e.1492$vB1.1078@news.uswest.net...
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:DPl0e.504$xs4.117@newsfe6-win.ntli.net...
...
Hey, my name is Genome. You've been set a
challenge.

Game over. You win.
...
Oh well, if you look in ABSE again then you'll find the same
circuit
with a few little modifications.

Look, I don't mean to be unkind here, but you
must realize your game can only be played and
won a certain number of times. Given your good
simulation of sincerity before, you now have a high
threshold to overcome before getting me in.

If you want to measure loop gain and phase then you use the method
shown.

Break the loop with an AC voltage source and plot V(B)/V(A). There
may
be some caveats about impedances but I'm sure you'll get the
general
idea.

If *I* want to measure? What do you want? (And
do remember that threshold problem. I cannot even
imagine, let alone suggest, how to solve that. ;-)

You have been measuring the closed loop response.

I don't recall that with "your" circuit. (I have no idea
whether it is yours or not.) I never looked at it with
enough care to get that far. I never saw anything to
make me think it might be or become real.

There is an example in the LTspice directory somewhere as well.

Ok. I believe you. So?

HTH

? If that's a joke, I like it.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
Hmmm, a little bit of a misunderstanding here. You are quite right
though, I am having a prod.

I looked at your spice model for your circuit and noticed that you
were plotting AC responses on the basis of an input drive signal with
the loop closed. I assumed, perhaps incorrectly, that you were using
this to verify loop stability.

That's why I reposted my circuit in ABSE with some modifications to
show a preferred method for measuring loop gain and phase using spice.
Even so Jim Thompson has, quite rightly, pointed out that the method
I've used is prone to errors.

I didn't mean to suggest that you had been making any measurements on
my circuit. Just that there was a possibility that you were making
incorrect ones on your own.

DNA
 
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:ttS0e.3931$ME3.649@newsfe1-gui.ntli.net...
[Stuff re games and loop gain cut.]
Hmmm, a little bit of a misunderstanding here. You are quite right
though, I am having a prod.
I would just as soon not play that game.

I looked at your spice model for your circuit and noticed that you
were plotting AC responses on the basis of an input drive signal with
the loop closed. I assumed, perhaps incorrectly, that you were using
this to verify loop stability.
The closed loop response, when stable, can be
used as a measure of stability margin. Verifying
the absence of excessive peaking, or dips and
wobbles that occur over a narrow frequency
range, shows that no poles are very close to
the imaginary axis relative to their real part.
For simple feedback systems, where the loop
gain is relatively simple and has the common
narrowbanding compensation, that check is
enough. Your assumption was correct.

That's why I reposted my circuit in ABSE with some modifications to
show a preferred method for measuring loop gain and phase using spice.
Even so Jim Thompson has, quite rightly, pointed out that the method
I've used is prone to errors.
I'll have to look into it. (the improved approach!)

I didn't mean to suggest that you had been making any measurements on
my circuit. Just that there was a possibility that you were making
incorrect ones on your own.
That was a bit indirect. Flew right past me.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
 
"Fred Bloggs" <nospam@nospam.com> wrote in
message news:4243A767.4000508@nospam.com...
Larry Brasfield wrote:
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:m9y0e.1156$kj5.480@newsfe6-gui.ntli.net...
[snip]
If you want to measure loop gain and phase then you use the method
shown.

Break the loop with an AC voltage source and plot V(B)/V(A). There may
be some caveats about impedances but I'm sure you'll get the general
idea.

If *I* want to measure? What do you want? (And
do remember that threshold problem. I cannot even
imagine, let alone suggest, how to solve that. ;-)

In most of the circuits, your main interest has been stability- and now it turns out, you have no idea of how to use SPICE to
measure it.
Illogical. You cannot logically infer, from my declining
to play a little game with Genome, that I lacked the skills
needed to analyze his circuit. You have confused absence
of evidence with evidence of absence.

[More venal speculation cut.]

You have been measuring the closed loop response.

I don't recall that with "your" circuit.

That is a lie- because you stated that it used the MOSFET gs capacitance for dominant pole compensation and may have problems....
Hmm, so your claim is that one cannot spot a
dominant pole without "measuring". That says a
lot, Fred. I spotted it by simply looking at the
circuit topology and doing a fairly simple analysis.
And I do not recall saying the compensation had
problems here.

(I have no idea
whether it is yours or not.) I never looked at it with
enough care to get that far. I never saw anything to
make me think it might be or become real.

That is because you have very little comprehension of it.
Illogical. These sorts of things appear to float right
over you, so I will spell it out: Genome wished to
resume a game which only peripherally involved
circuit analysis. I declined to play for reasons
completely unrelated to electronic skills.

[Frivolity and vitriol cut.]

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
 
"Larry Brasfield"
<donotspam_larry_brasfield@hotmail.com> wrote in
message
news:Ksl0e.1479$vB1.1036@news.uswest.net...
"Genome" <ilike_spam@yahoo.co.uk> wrote in
message
news:lGk0e.489$xs4.29@newsfe6-win.ntli.net...
I'd like your critique on the circuit I posted
in ABSE under,

'Oh shit it's a binaries newsgroup'.


Ok, I'll play.
Very generous.

In the future, please feel welcome to
unmunged my email address and use it for
invitations
of this nature and use the freed up subject
otherwise.
That's not the point of the exercise.

For the moment, just a few quick comments that
apply
regardless of how you answer my request below.

0. (Yes, some parts would regret being real.)
I see you have read.

1. Using the MOSFET gate capacitance for a
dominant pole is nice when it can be managed.
I see you have read elsewhere.

2. I'm not sure the input cascode is doing much
that needs doing. Why not just use HV NPNs
for the input diff pair? (This position may
change
when I see the required frequency response, but
given the asymmetrical output slewing, I expect
that speed is not a driving issue here.)
Well, since you don't give much away I won't
either.

Look at the datasheet for a high voltage versus a
low voltage transistor.

3. The degeneration in your current mirror is a
little biggish and very likely to keep the
output
MOSFET on, depending on its threshold. (I
have not done the detailed analysis, just noted
the hazard with ad-hoc mental calculations.)
As you would, as I did... and I would.

Before doing any detailed critique, I would like
to
know what is expected or required of your
circuit,
including cost, accuracy, temperature stability,
repeatablity, power efficiency, linearity,
frequency
response, load variation and expected load. (My
suspicion is it is not meant for a 10K load.)

Without knowing those details, the most I can
say
now (beyond that hazard) is that it looks like
it
could do something useful.
Hey, my name is Genome. You've been set a
challenge.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
 
On Fri, 25 Mar 2005 09:54:10 -0800, Larry Brasfield wrote:
"Fred Bloggs" <nospam@nospam.com> wrote in

[More venal speculation cut.]
Larry, you are such a tool.
 
"Larry Brasfield" <donotspam_larry_brasfield@hotmail.com> wrote in
message news:xTX0e.13$aL5.327@news.uswest.net...
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:ttS0e.3931$ME3.649@newsfe1-gui.ntli.net...
[Stuff re games and loop gain cut.]
Hmmm, a little bit of a misunderstanding here. You are quite right
though, I am having a prod.

I would just as soon not play that game.
but

The closed loop response, when stable, can be
used as a measure of stability margin. Verifying
the absence of excessive peaking, or dips and
wobbles that occur over a narrow frequency
range, shows that no poles are very close to
the imaginary axis relative to their real part.
For simple feedback systems, where the loop
gain is relatively simple and has the common
narrowbanding compensation, that check is
enough.
--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
Interesting.

Perhaps you'd like to explain further.

DNA
 
Genome wrote:
<something about Larry>

"Designing Analog Chips" by Hans Camenzind (available for download
someplace, search) talks about using a big inductor to break the circuit
when doing loop analysis. He shows an inductor with a value of 100M, and
a 1F cap to ground, with the AC source in series with the cap. Messes
with the impedances like Jim mentions, but it's much simpler than
doubling the circuit, or trying to figure out how his macros import to
LTSpice.

FYI

--
Regards,
Robert Monsen

"Your Highness, I have no need of this hypothesis."
- Pierre Laplace (1749-1827), to Napoleon,
on why his works on celestial mechanics make no mention of God.
 
On Fri, 25 Mar 2005 16:24:31 -0800, Robert Monsen
<rcsurname@comcast.net> wrote:

Genome wrote:
something about Larry

"Designing Analog Chips" by Hans Camenzind (available for download
someplace, search) talks about using a big inductor to break the circuit
when doing loop analysis. He shows an inductor with a value of 100M, and
a 1F cap to ground, with the AC source in series with the cap. Messes
with the impedances like Jim mentions, but it's much simpler than
doubling the circuit, or trying to figure out how his macros import to
LTSpice.

FYI
I would imagine that LTspice can use my macros just ducky.

My experience is that neglecting impedances can shoot you in the foot.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
Jim Thompson wrote:
I would imagine that LTspice can use my macros just ducky.

My experience is that neglecting impedances can shoot you in the foot.

Jim Thompson

Or the head! :)

--
?

Michael A. Terrell
Central Florida
 
Jim Thompson wrote:
On Fri, 25 Mar 2005 16:24:31 -0800, Robert Monsen
rcsurname@comcast.net> wrote:


Genome wrote:
something about Larry

"Designing Analog Chips" by Hans Camenzind (available for download
someplace, search) talks about using a big inductor to break the circuit
when doing loop analysis. He shows an inductor with a value of 100M, and
a 1F cap to ground, with the AC source in series with the cap. Messes
with the impedances like Jim mentions, but it's much simpler than
doubling the circuit, or trying to figure out how his macros import to
LTSpice.

FYI


I would imagine that LTspice can use my macros just ducky.

My experience is that neglecting impedances can shoot you in the foot.

...Jim Thompson
There is an LTSpice example for doing the current/voltage stimulation
thing you suggest in your paper. It actually gives very different
results from the big inductor.

--
Regards,
Robert Monsen

"Your Highness, I have no need of this hypothesis."
- Pierre Laplace (1749-1827), to Napoleon,
on why his works on celestial mechanics make no mention of God.
 

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