Voltage to PWM chip (similar to class D)?

[Lasse Langwadt Christense]

Den lřrdag den 31. maj 2014 01.55.03 UTC+2 skrev Joerg:

Lasse Langwadt Christensen wrote:

Den fredag den 30. maj 2014 19.18.22 UTC+2 skrev Joerg:

Lasse Langwadt Christensen wrote:



Den fredag den 30. maj 2014 18.34.37 UTC+2 skrev Joerg:

Lasse Langwadt Christensen wrote:

Den fredag den 30. maj 2014 16.15.46 UTC+2 skrev Joerg:

John Larkin wrote:

On Thu, 29 May 2014 18:07:45 -0700, Joerg <invalid@invalid.invalid> wrote:

John Larkin wrote:

On Thu, 29 May 2014 14:20:26 -0700, Joerg <invalid@invalid.invalid

wrote:

Folks,

Does anyone know an IC that can turn a control voltage into PWM and can

handle PWM frequencies in the 50-1000kHz range? Similar to a class D

driver but has to go down to DC. The changes in control would be

restricted to the audio spectrum below 15kHz.

The LTC6992 does this nicely but isn't precise enough. Same with

555-style timers or switcher chips. I am looking for better 1% and

ideally a lot better, including nonlinearity, drift, warts and all. A uC

is not suitable either because it should be simple and I need very fine

control granularity, down to around 0.1%.

Can't use short-lived consumer chips for radios and TV sets and such.

How about a sawtooth or triangle waveform and a comparator. Close a

feedback loop around that, with a PWM to DC converter; the PWM-DC part

can be made very linear.

That's what I wanted to avoid for real estate reasons. But if I hafta

I'll do it.

If you want 0.1% accuracy, you might be able to do it open-loop, with a very

linear ramp, but it will be hard at that frequency. If you only want 0.1%

resolution ("granularity"?) it's not so bad.

Can you use delta-sigma? There are some integrated d-s modulators around.

I could but then I'd have to build a one-shot that stretches the pulses

into a very precise length and that's almost the same kind of challenge

as building my own PWM generator (needs too much space).

why would you need a one-shot? the output is clocked

something like the AD7401, if you want to be sure a flipflop on the output

It's possible but when assuming a master clock of 20MHz going in and I'd

want, say, a 1k granularity that would result in an effective PWM of

only 20kHz. Unless I am understanding something wrong in the datasheet.

with DS is hard to talk about pwm frequency, it has noise shaping so the

switching noise gets pushed to higher frequencies. i.e if you are exactly midrange the "pwm frequency" would be 10MHz

with a brick wall reconstructions filter you would normally gain 3dB every

time you double the sampling frequency, with a second order deltasigma you

gain ~15dB, first order ~9dB



http://www.analog.com/static/imported-files/data_sheets/AD7401.pdf

What I'd essentially need is a class D audio modulator but without the

DC cut-off. Unfortunately that's as rare as it is on audio CODECs where

only a few such as the AD1939 can go down to DC without onerous offset

issues or huge drift.

if you can live with the higher switching frequency I think deltasigma

would do that





I can't live with a switching frequency that gets much past a MHz in



certain areas. It will cause large losses in the attached power



electronics. I'd like the PWM to be at least somewhat constant in



frequency. It isn't critical though, if it varies even 50% that would be



ok. But not a lot more.





so clock it at 2MHz, I still think it'll be close





It can be done this way, although the output in the simulation isn't

very clean around the min/max values of the drive signal.

all deltasigmas have "issue" when you get very close to the rails, though I'd think pwm also have a similar problem

[simulation file]

I just threw that together to show deltasigma, I'd expect an AD7400 to
perform better

Just came back from a gnarly mountain bike ride. Got a blister on the

right palm from all the handlebar wrestling. That's a pain when the

computer mouse is on the right, ouch, ouch ...

I used to work with a guy that two mouses, one for each hand. He claimed it was very quick to get used to switching between them

-Lasse

 

[Joerg]

rickman wrote:

On 5/30/2014 3:35 PM, Joerg wrote:
rickman wrote:
On 5/30/2014 3:02 PM, Joerg wrote:
rickman wrote:
On 5/30/2014 12:42 PM, Joerg wrote:
Lasse Langwadt Christensen wrote:
Den fredag den 30. maj 2014 17.32.27 UTC+2 skrev Reinhardt Behm:


But generating a PWM at 1MHz with a resolution of 0.1% mean you
need
a base
frequency for your counter of 1GHz. I don't know any CPU that could
do that.

he did say the input was limited to 15KHz, so 2*15K*1000 >= 30MHz
plenty of cpus that can do that


But their timers won't run faster than MLCK and that seriously limits
the granularity if the PWM has to pipe out at a MHz. I'd need
almost a
Giggeehoitz. Not that it can't be done but that's a really fat CPU.

This is starting to sound like a job for FPGAman! Where's my cape?
Durn, at the cleaners after that messy SERDES job.


I bet an FPGA with some minor analog sprinkles around it could do this
job nicely. But that would be like using a Porsche to go to the grocery
store.

And what is wrong with that? Porche makes a mom-mobile! ...


For the ritzy crowd with beaucoup disposable income, yes.

Have you looked at the price of a Honda lately? There are *no* cheap cars.

There are. A friend bought a new Kia Soul for around $13k. It is a
remarkably practical car. My SUV was just shy of $18k in 1997, new, and
one can probably find a similar one for maybe $3-5k more these days.

It doesn't have to be a fancy car.

... FPGAs come in
lean, mean sizes for any budget. If you are short on board space they
even come in some pretty teeny-tiny packages if you don't mind very fine
pitch BGA type things. Otherwise they just come in small packages.


It is like shooting a fly with a 50mm canon. The fly will be killed dead
for sure, as John Wayne would say, but it's overkill. We have no people
who can program FPGA. It ain't in the budget (yet).

You can make any analogy you wish, but mostly people just don't "get"
FPGAs. You have no people with FPGA experience, so I expect you won't
be learning much more about them in the future. They really aren't so
hard.

First I'll learn uC some more. I grok their HW innards but am a bit
rocky when programming. FPGA would be next in line since there is less
opportunity to use one in my field. I do get peeks into the world of
FPGA sometimes because I always work for several clients simultaneously.
Some are bigger companies who have FPGA coders.

Actually a digital approach would need either the comparator that you
seem to not like or an ADC which might be a better match. If you need
up to a 1 MHz pulse rate I assume you would need a 1 MHz ADC sample rate
which is not too hard, but it would start to use a few mA. It's been a
while since I've looked at ADCs at that rate but I know they are not
hard to find, especially with only 10 or 12 bits.


The required rate of change is only up to about 15kHz and transferring
the analog control signal to digital at 100ksps or so is a piece of
cake. Can be done with a very tiny ADC.

The requirements seem to be a bit vague. So the sample rate would only
need to be 100 ksps? So why is the pulse rate up to 1 MHz? Can the
pulse widths be dithered across 10 pulses? That can lower the clock
rate by 10x.

In pretty much any a PWM-driven power stage the PWM frequency must be
several times higher than the highest spectral components in your
control signal. You could theoretically get away with it at the Nyquist
limit but the filter requirements would be onerous. Remember that the
filter is always in the power path so everything gets big, heavy and
expensive. Keeping the PWM frequency well north of 10x makes this job
almost infinitely easier.

The rest is easy... 1 GHz clock might be a bit tricky in one of the
very low power FPGAs, but maybe. The dual latches used for DDR work
might just enable this on a pretty low power device. It would be an
interesting design task. Either way one of the conventional FPGAs could
handle this easily I'm sure and the smaller ones don't suck so much
power. I could poke around a bit if you are interested.


Maybe not just yet because I want to find out whether we can just plop
in a class-D chip. We don't have a budget for an extra FPGA design for
this phase. But that could change when this becomes a product and I'll
keep you in mind (assuming you can legally do freelance work, as in not
bound by an employer).

Yeah, I get that. Simpler is better and if you understand it well, that
makes it simpler.

No employer other than myself. Happy to help if you need it.

Good. It's similar on another project where I did everything with some
hardware and a PC last year. But if all goes well we will develop the
real product this fall and then a uC specialist will become involved
whom we could not use for cost reasons so far. Luckily he is local,
about 20 minutes via mountain bike or car (40min with a regular bicycle).

--
Regards, Joerg

http://www.analogconsultants.com/

 

[Joerg]

John Larkin wrote:

On Fri, 30 May 2014 12:35:10 -0700, Joerg <invalid@invalid.invalid
wrote:

rickman wrote:

[...]

... FPGAs come in
lean, mean sizes for any budget. If you are short on board space they
even come in some pretty teeny-tiny packages if you don't mind very fine
pitch BGA type things. Otherwise they just come in small packages.

It is like shooting a fly with a 50mm canon. The fly will be killed dead
for sure, as John Wayne would say, but it's overkill. We have no people
who can program FPGA. It ain't in the budget (yet).

I know a guy, if you're ever interested. We swap Visio block diagrams
to define the function, and then he codes it.

Some of the so-called CPLDs are actually small FPGAs with internal
flash, cost roughly $1.50 in low volumes. It's liberating to have all
that logic available.

Yes, they sure are tempting. In the past FPGA have always turned me off
because they were either power guzzlers or went unobtainium all the
time. The only series that I really liked was from Intel with true CMOS
behavior, meaning power went to almost zero at low clock. But then Intel
dropped the ball again. I had almost used them in a design. That could
have resulted in a serious black eye. But what I understood from what
Rick said in the past this has become better where some series will be
around for longer.

Many of my designs require 20 or 30 years of production life. That rules
out a lot of stuff that others take for granted.

--
Regards, Joerg

http://www.analogconsultants.com/

 

[Tim Wescott]

On Fri, 30 May 2014 15:37:47 -0400, rickman wrote:

On 5/30/2014 3:00 PM, Joerg wrote:
rickman wrote:
On 5/30/2014 10:15 AM, Joerg wrote:
John Larkin wrote:
On Thu, 29 May 2014 18:07:45 -0700, Joerg <invalid@invalid.invalid
wrote:

John Larkin wrote:
On Thu, 29 May 2014 14:20:26 -0700, Joerg
invalid@invalid.invalid> wrote:

Folks,

Does anyone know an IC that can turn a control voltage into PWM
and can handle PWM frequencies in the 50-1000kHz range? Similar
to a class D driver but has to go down to DC. The changes in
control would be restricted to the audio spectrum below 15kHz.

The LTC6992 does this nicely but isn't precise enough. Same with
555-style timers or switcher chips. I am looking for better 1%
and ideally a lot better, including nonlinearity, drift, warts
and all. A uC is not suitable either because it should be simple
and I need very fine control granularity, down to around 0.1%.

Can't use short-lived consumer chips for radios and TV sets and
such.
How about a sawtooth or triangle waveform and a comparator. Close
a feedback loop around that, with a PWM to DC converter; the
PWM-DC part can be made very linear.

That's what I wanted to avoid for real estate reasons. But if I
hafta I'll do it.

If you want 0.1% accuracy, you might be able to do it open-loop,
with a very linear ramp, but it will be hard at that frequency. If
you only want 0.1%
resolution ("granularity"?) it's not so bad.

Can you use delta-sigma? There are some integrated d-s modulators
around.


I could but then I'd have to build a one-shot that stretches the
pulses into a very precise length and that's almost the same kind of
challenge as building my own PWM generator (needs too much space).

Can the pulse width be dithered or does each pulse width have to
adjust to within 0.1% of the needed value? I think a digital solution
could do this if you just need the average pulse width to match.


Dither is a problem. If it's dithering between 2-3 consecutive pulses,
maybe, but it would be a serious compromise.

This does not mean I am ruling anything out at this point, it's just
that I'd first like to see if there is a class-D chip that can be
pressed into service. Thise have very clean PWM, just not down to DC
because offset voltages and stuff aren't important for audio.

I'm not clear on your answer. To make sure you understand what I am
suggesting... You can use a slower counter clock if you dither the
pulse width. In reality you would need to use some feedback similar to
a sigma-delta circuit. The pulse width would only vary from ideal by a
fraction of a count at any one time and the error could be accumulated
and used to add a delta on the next pulse width. Another plus is that
the feedback loop can be internal to the digital circuit since the error
source is the low order bits that are being truncated.

I think John Larkin has picked up on this judging from his post. The
question is whether the small instantaneous deviations will make a
difference. Similar to sigma-delta the "noise" would be at a high
frequency.

Depending on who you ask, it's not "like" a sigma-delta -- it _is_ a
sigma-delta. Just because _most_ sigma-delta converters use 1-bit D/A or
A/D conversion doesn't mean they all do.

It's exactly what I was suggesting.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

 

[Tim Wescott]

On Fri, 30 May 2014 12:41:30 -0700, Joerg wrote:

rickman wrote:
On 5/30/2014 3:00 PM, Joerg wrote:
rickman wrote:
On 5/30/2014 10:15 AM, Joerg wrote:
John Larkin wrote:
On Thu, 29 May 2014 18:07:45 -0700, Joerg <invalid@invalid.invalid
wrote:

John Larkin wrote:
On Thu, 29 May 2014 14:20:26 -0700, Joerg
invalid@invalid.invalid
wrote:

Folks,

Does anyone know an IC that can turn a control voltage into PWM
and can handle PWM frequencies in the 50-1000kHz range? Similar
to a class D driver but has to go down to DC. The changes in
control would be restricted to the audio spectrum below 15kHz.

The LTC6992 does this nicely but isn't precise enough. Same with
555-style timers or switcher chips. I am looking for better 1%
and ideally a lot better, including nonlinearity, drift, warts
and all. A uC is not suitable either because it should be simple
and I need very fine control granularity, down to around 0.1%.

Can't use short-lived consumer chips for radios and TV sets and
such.
How about a sawtooth or triangle waveform and a comparator. Close
a feedback loop around that, with a PWM to DC converter; the
PWM-DC part can be made very linear.

That's what I wanted to avoid for real estate reasons. But if I
hafta I'll do it.

If you want 0.1% accuracy, you might be able to do it open-loop,
with a very linear ramp, but it will be hard at that frequency. If
you only want 0.1%
resolution ("granularity"?) it's not so bad.

Can you use delta-sigma? There are some integrated d-s modulators
around.


I could but then I'd have to build a one-shot that stretches the
pulses into a very precise length and that's almost the same kind of
challenge as building my own PWM generator (needs too much space).

Can the pulse width be dithered or does each pulse width have to
adjust to within 0.1% of the needed value? I think a digital
solution could do this if you just need the average pulse width to
match.


Dither is a problem. If it's dithering between 2-3 consecutive pulses,
maybe, but it would be a serious compromise.

This does not mean I am ruling anything out at this point, it's just
that I'd first like to see if there is a class-D chip that can be
pressed into service. Thise have very clean PWM, just not down to DC
because offset voltages and stuff aren't important for audio.

I'm not clear on your answer. To make sure you understand what I am
suggesting... You can use a slower counter clock if you dither the
pulse width. In reality you would need to use some feedback similar to
a sigma-delta circuit. The pulse width would only vary from ideal by a
fraction of a count at any one time and the error could be accumulated
and used to add a delta on the next pulse width. Another plus is that
the feedback loop can be internal to the digital circuit since the
error source is the low order bits that are being truncated.

I think John Larkin has picked up on this judging from his post. The
question is whether the small instantaneous deviations will make a
difference. Similar to sigma-delta the "noise" would be at a high
frequency.


What this means is that my filter after the power stage would have to
roll off at lower frequencies, to combat the resulting noise. That lead
to two not so nice effects: Larger magnetics in a product where small
size is very important. Also more ringing upon rapid control signal
changes which becomes harder to mitigate the lower the ringing frequency
is.

What are you controlling that high-frequency noise matters so much?
Nearly all the plants that I encounter are intrinsically low-pass.

If you're filtering to get the bulk of the PWM out, then much of the
sigma-delta noise will be in the stopband of the filter, even if it's of
lower frequency than the PWM. Particularly if the sigma-delta modulator
uses a 2nd- or 3rd-order filter.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

 

[Tim Wescott]

On Fri, 30 May 2014 11:22:52 -0700, Joerg wrote:

Tim Wescott wrote:
On Fri, 30 May 2014 09:47:56 -0700, Joerg wrote:

Tim Wescott wrote:
On Thu, 29 May 2014 14:20:26 -0700, Joerg wrote:

Folks,

Does anyone know an IC that can turn a control voltage into PWM and
can handle PWM frequencies in the 50-1000kHz range? Similar to a
class D driver but has to go down to DC. The changes in control
would be restricted to the audio spectrum below 15kHz.

The LTC6992 does this nicely but isn't precise enough. Same with
555-style timers or switcher chips. I am looking for better 1% and
ideally a lot better, including nonlinearity, drift, warts and all.
A uC is not suitable either because it should be simple and I need
very fine control granularity, down to around 0.1%.

Can't use short-lived consumer chips for radios and TV sets and
such.
A 555 or other teeny thing wrapped with integrating feedback, to hold
the average at precisely what you want? It kinda violates your "one
chip" desire, but at least it can be done with a minimum of small
parts.


I am going to do something like that (but probably not with a 555) if
nothing single-chip comes up. That's the reason for this thread, to
see if there isn't anything out there. I mean, every class-D amp must
have a super-linear PWM generator. It's just that most have the power
stages built in (would be ok, can be left idle) and have lousy or no
DC performance (would not be ok).

No DC performance can't be fixed -- but lousy DC performance could be
fixed with feedback, assuming there's an appropriate loop frequency to
make it easy, yet have enough authority at low frequencies to clean up
the crap.


That's a problem, my signal path goes all the way to DC and the loop
would be a pain.

Well... Why? You have analog in, and if you're driving your own final
amp, PWM out. So you can difference the PWM and your analog command
signal, feed that to an integrator of suitable gain, and drive the
amplifier input with that plus your analog command signal.

It seems like a low component count slam-dunk to me, unless there's
something that you're doing that is outside of my assumptions.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

 

[Tim Wescott]

On Fri, 30 May 2014 15:44:20 -0400, rickman wrote:

On 5/30/2014 3:35 PM, Joerg wrote:
rickman wrote:
On 5/30/2014 3:02 PM, Joerg wrote:
rickman wrote:
On 5/30/2014 12:42 PM, Joerg wrote:
Lasse Langwadt Christensen wrote:
Den fredag den 30. maj 2014 17.32.27 UTC+2 skrev Reinhardt Behm:


But generating a PWM at 1MHz with a resolution of 0.1% mean you
need a base frequency for your counter of 1GHz. I don't know any
CPU that could do that.

he did say the input was limited to 15KHz, so 2*15K*1000 >= 30MHz
plenty of cpus that can do that


But their timers won't run faster than MLCK and that seriously
limits the granularity if the PWM has to pipe out at a MHz. I'd
need almost a Giggeehoitz. Not that it can't be done but that's a
really fat CPU.

This is starting to sound like a job for FPGAman! Where's my cape?
Durn, at the cleaners after that messy SERDES job.


I bet an FPGA with some minor analog sprinkles around it could do
this job nicely. But that would be like using a Porsche to go to the
grocery store.

And what is wrong with that? Porche makes a mom-mobile! ...


For the ritzy crowd with beaucoup disposable income, yes.

Have you looked at the price of a Honda lately? There are *no* cheap
cars.


... FPGAs come in
lean, mean sizes for any budget. If you are short on board space they
even come in some pretty teeny-tiny packages if you don't mind very
fine pitch BGA type things. Otherwise they just come in small
packages.


It is like shooting a fly with a 50mm canon. The fly will be killed
dead for sure, as John Wayne would say, but it's overkill. We have no
people who can program FPGA. It ain't in the budget (yet).

You can make any analogy you wish, but mostly people just don't "get"
FPGAs. You have no people with FPGA experience, so I expect you won't
be learning much more about them in the future. They really aren't so
hard.

If I may interject -- this is the sort of FPGA project that I'd sign up
to doing, confident that I could make it work just fine. And keep in
mind -- when I do HDL I get involved in conversations with folks like
Rick that basically start out with "You're a software engineer, aren't
you?" and go downhill from there.

This ain't rocket science!

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

 

[rickman]

On 5/30/2014 4:31 PM, Tim Wescott wrote:

If I may interject -- this is the sort of FPGA project that I'd sign up
to doing, confident that I could make it work just fine. And keep in
mind -- when I do HDL I get involved in conversations with folks like
Rick that basically start out with "You're a software engineer, aren't
you?" and go downhill from there.

This ain't rocket science!

Please don't accuse me of being biased toward software people. I don't
assume they are incapable of understanding something outside their
field. I always wait for them to misunderstand something about hardware
before I correct them. I know any number of software folks who are very
capable of FPGA work just like I know hard core board level designers
who can learn FGPA work as well.

In fact someone came to the FPGA group asking for help writing a "hello
world" program in an FPGA. Several of us tried to explain how hard it
would be to write HDL as if it were software to produce the program...
he showed us wrong. We gave him a little help in the first steps of
coding, but he got it up and working very quickly and went on to
complete his project which was a technology demonstration.

He was appreciative of my help and tried to get his boss to approve a
consulting contract for training, but they didn't want to spend the
funds. Instead he talked them into sending me $500 for the pre-sales
support I had given him for free. lol So I sent him a polo shirt.

BTW, I have always maintained that FPGA work is not rocket science. It
is usually the software or board level designers who claim FPGA work is
too hard unless you "really need" it. I say it is not hard to design,
debug or maintain, just different in some ways. FPGAs are not used as
often as useful because of the lack of good understanding of their true
benefits and capabilities.

--

Rick

 

[rickman]

On 5/30/2014 4:14 PM, Joerg wrote:

John Larkin wrote:
On Fri, 30 May 2014 12:35:10 -0700, Joerg <invalid@invalid.invalid
wrote:

rickman wrote:

[...]


... FPGAs come in
lean, mean sizes for any budget. If you are short on board space they
even come in some pretty teeny-tiny packages if you don't mind very fine
pitch BGA type things. Otherwise they just come in small packages.

It is like shooting a fly with a 50mm canon. The fly will be killed dead
for sure, as John Wayne would say, but it's overkill. We have no people
who can program FPGA. It ain't in the budget (yet).

I know a guy, if you're ever interested. We swap Visio block diagrams
to define the function, and then he codes it.

Some of the so-called CPLDs are actually small FPGAs with internal
flash, cost roughly $1.50 in low volumes. It's liberating to have all
that logic available.


Yes, they sure are tempting. In the past FPGA have always turned me off
because they were either power guzzlers or went unobtainium all the
time. The only series that I really liked was from Intel with true CMOS
behavior, meaning power went to almost zero at low clock. But then Intel
dropped the ball again. I had almost used them in a design. That could
have resulted in a serious black eye. But what I understood from what
Rick said in the past this has become better where some series will be
around for longer.

I think you have the availability issue backwards. FPGA vendors have
some of the longest lived products in the IC world. It is not at all
uncommon to design in an FPGA when it is new and not get an EOL notice
for well over 10 years. You were dealing with Intel who dabble in
secondary business areas and then close up shop when they lose interest.
I don't know that Intel has ever shipped a production FPGA so I would
hardly call them an FPGA vendor in any sense of the word.

Many of my designs require 20 or 30 years of production life. That rules
out a lot of stuff that others take for granted.

If you need a 20 year production life, what parts *can* you use? Does
LTI give any assurance of a 20 year product life? What MCUs or DSPs are
around after 20 years? Of these parts, I would be much less worried
about FPGAs being around in 20 years although that is likely stretching
it. If you need 30 years... I guess I don't know, I only been in the
business for 40 years and don't expect to be around myself for another
30... in the large sense.

BTW, there are several device families around with "true CMOS" power
consumption. If you don't need 1 GHz there are FPGAs that are lower
power than many ARM MCUs.

--

Rick

 

[Tim Wescott]

On Fri, 30 May 2014 16:48:15 -0400, rickman wrote:

On 5/30/2014 4:31 PM, Tim Wescott wrote:
If I may interject -- this is the sort of FPGA project that I'd sign up
to doing, confident that I could make it work just fine. And keep in
mind -- when I do HDL I get involved in conversations with folks like
Rick that basically start out with "You're a software engineer, aren't
you?" and go downhill from there.

This ain't rocket science!

Please don't accuse me of being biased toward software people.

That comment wasn't aimed at you -- I had a customer insist that I close
a control loop in an FPGA instead of on a processor. I couldn't even
talk them around to putting a MicroBlaze or whatever into their FPGA.
When I got it working and it made its way to the in-house FPGA people,
the first thing they said was "You're a software guy, aren't you?"

(It had some gawdawful 16-level multiplexer that I couldn't figure out
how to break into smaller pieces or pipeline, which was by far the source
of the most delay in the circuit, so it was a fair criticism).

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

 

[rickman]

On 5/30/2014 5:35 PM, Tim Wescott wrote:

On Fri, 30 May 2014 16:48:15 -0400, rickman wrote:

On 5/30/2014 4:31 PM, Tim Wescott wrote:
If I may interject -- this is the sort of FPGA project that I'd sign up
to doing, confident that I could make it work just fine. And keep in
mind -- when I do HDL I get involved in conversations with folks like
Rick that basically start out with "You're a software engineer, aren't
you?" and go downhill from there.

This ain't rocket science!

Please don't accuse me of being biased toward software people.

That comment wasn't aimed at you --

I think my comment made it sound like I was taking it personally.
Written word vs. spoken. Sorry.

I had a customer insist that I close
a control loop in an FPGA instead of on a processor. I couldn't even
talk them around to putting a MicroBlaze or whatever into their FPGA.
When I got it working and it made its way to the in-house FPGA people,
the first thing they said was "You're a software guy, aren't you?"

(It had some gawdawful 16-level multiplexer that I couldn't figure out
how to break into smaller pieces or pipeline, which was by far the source
of the most delay in the circuit, so it was a fair criticism).

I think that is more an issue of experience. I'm no guru of FPGAs
really. I have done my share of work with them and understand lots of
issues like the one you had. But if you are trying to optimize things
there are all sorts of tricks to use. Mostly it is better to *not*
optimize, but to design cleanly. Optimization can be expensive and
breaks easily.

Muxes in particular are one of the more awkward things to implement in
an FPGA. There is no real way to optimize them unless there are missing
pieces, for example a barrel shifter doesn't need the full N inputs to
every output bit. I have also minimized them by using an adder as part
of the mux. Most FPGAs have 4 input LUTs, a mux just has three inputs,
so the fourth can be used as an output enable. Two muxes feeding an
adder can have enables which allow the adder to be used as another mux.
Or you can use four 2 input muxes with enables to feed a 4-lut which
is just a 4-or gate. The trick is getting the tools to give you then
when you are coding in an HDL, lol.

Otherwise muxes eat LUTs for breakfast, lunch and dinner. The best way
to optimize them is to avoid them as much as possible.

--

Rick

 

[Joerg]

Lasse Langwadt Christensen wrote:

Den fredag den 30. maj 2014 19.18.22 UTC+2 skrev Joerg:
Lasse Langwadt Christensen wrote:

Den fredag den 30. maj 2014 18.34.37 UTC+2 skrev Joerg:
Lasse Langwadt Christensen wrote:
Den fredag den 30. maj 2014 16.15.46 UTC+2 skrev Joerg:
John Larkin wrote:
On Thu, 29 May 2014 18:07:45 -0700, Joerg <invalid@invalid.invalid> wrote:
John Larkin wrote:
On Thu, 29 May 2014 14:20:26 -0700, Joerg <invalid@invalid.invalid
wrote:
Folks,
Does anyone know an IC that can turn a control voltage into PWM and can
handle PWM frequencies in the 50-1000kHz range? Similar to a class D
driver but has to go down to DC. The changes in control would be
restricted to the audio spectrum below 15kHz.
The LTC6992 does this nicely but isn't precise enough. Same with
555-style timers or switcher chips. I am looking for better 1% and
ideally a lot better, including nonlinearity, drift, warts and all. A uC
is not suitable either because it should be simple and I need very fine
control granularity, down to around 0.1%.
Can't use short-lived consumer chips for radios and TV sets and such.
How about a sawtooth or triangle waveform and a comparator. Close a
feedback loop around that, with a PWM to DC converter; the PWM-DC part
can be made very linear.
That's what I wanted to avoid for real estate reasons. But if I hafta
I'll do it.
If you want 0.1% accuracy, you might be able to do it open-loop, with a very
linear ramp, but it will be hard at that frequency. If you only want 0.1%
resolution ("granularity"?) it's not so bad.
Can you use delta-sigma? There are some integrated d-s modulators around.
I could but then I'd have to build a one-shot that stretches the pulses
into a very precise length and that's almost the same kind of challenge
as building my own PWM generator (needs too much space).
why would you need a one-shot? the output is clocked
something like the AD7401, if you want to be sure a flipflop on the output
It's possible but when assuming a master clock of 20MHz going in and I'd
want, say, a 1k granularity that would result in an effective PWM of
only 20kHz. Unless I am understanding something wrong in the datasheet.
with DS is hard to talk about pwm frequency, it has noise shaping so the
switching noise gets pushed to higher frequencies. i.e if you are exactly midrange the "pwm frequency" would be 10MHz
with a brick wall reconstructions filter you would normally gain 3dB every
time you double the sampling frequency, with a second order deltasigma you
gain ~15dB, first order ~9dB

http://www.analog.com/static/imported-files/data_sheets/AD7401.pdf
What I'd essentially need is a class D audio modulator but without the
DC cut-off. Unfortunately that's as rare as it is on audio CODECs where
only a few such as the AD1939 can go down to DC without onerous offset
issues or huge drift.
if you can live with the higher switching frequency I think deltasigma
would do that


I can't live with a switching frequency that gets much past a MHz in

certain areas. It will cause large losses in the attached power

electronics. I'd like the PWM to be at least somewhat constant in

frequency. It isn't critical though, if it varies even 50% that would be

ok. But not a lot more.


so clock it at 2MHz, I still think it'll be close

It can be done this way, although the output in the simulation isn't
very clean around the min/max values of the drive signal.

[simulation file]

Just came back from a gnarly mountain bike ride. Got a blister on the
right palm from all the handlebar wrestling. That's a pain when the
computer mouse is on the right, ouch, ouch ...

--
Regards, Joerg

http://www.analogconsultants.com/

 

[Joerg]

Tim Wescott wrote:

On Fri, 30 May 2014 12:41:30 -0700, Joerg wrote:

rickman wrote:
On 5/30/2014 3:00 PM, Joerg wrote:
rickman wrote:
On 5/30/2014 10:15 AM, Joerg wrote:
John Larkin wrote:
On Thu, 29 May 2014 18:07:45 -0700, Joerg <invalid@invalid.invalid
wrote:

John Larkin wrote:
On Thu, 29 May 2014 14:20:26 -0700, Joerg
invalid@invalid.invalid
wrote:

Folks,

Does anyone know an IC that can turn a control voltage into PWM
and can handle PWM frequencies in the 50-1000kHz range? Similar
to a class D driver but has to go down to DC. The changes in
control would be restricted to the audio spectrum below 15kHz.

The LTC6992 does this nicely but isn't precise enough. Same with
555-style timers or switcher chips. I am looking for better 1%
and ideally a lot better, including nonlinearity, drift, warts
and all. A uC is not suitable either because it should be simple
and I need very fine control granularity, down to around 0.1%.

Can't use short-lived consumer chips for radios and TV sets and
such.
How about a sawtooth or triangle waveform and a comparator. Close
a feedback loop around that, with a PWM to DC converter; the
PWM-DC part can be made very linear.

That's what I wanted to avoid for real estate reasons. But if I
hafta I'll do it.
If you want 0.1% accuracy, you might be able to do it open-loop,
with a very linear ramp, but it will be hard at that frequency. If
you only want 0.1%
resolution ("granularity"?) it's not so bad.

Can you use delta-sigma? There are some integrated d-s modulators
around.


I could but then I'd have to build a one-shot that stretches the
pulses into a very precise length and that's almost the same kind of
challenge as building my own PWM generator (needs too much space).
Can the pulse width be dithered or does each pulse width have to
adjust to within 0.1% of the needed value? I think a digital
solution could do this if you just need the average pulse width to
match.


Dither is a problem. If it's dithering between 2-3 consecutive pulses,
maybe, but it would be a serious compromise.

This does not mean I am ruling anything out at this point, it's just
that I'd first like to see if there is a class-D chip that can be
pressed into service. Thise have very clean PWM, just not down to DC
because offset voltages and stuff aren't important for audio.
I'm not clear on your answer. To make sure you understand what I am
suggesting... You can use a slower counter clock if you dither the
pulse width. In reality you would need to use some feedback similar to
a sigma-delta circuit. The pulse width would only vary from ideal by a
fraction of a count at any one time and the error could be accumulated
and used to add a delta on the next pulse width. Another plus is that
the feedback loop can be internal to the digital circuit since the
error source is the low order bits that are being truncated.

I think John Larkin has picked up on this judging from his post. The
question is whether the small instantaneous deviations will make a
difference. Similar to sigma-delta the "noise" would be at a high
frequency.


What this means is that my filter after the power stage would have to
roll off at lower frequencies, to combat the resulting noise. That lead
to two not so nice effects: Larger magnetics in a product where small
size is very important. Also more ringing upon rapid control signal
changes which becomes harder to mitigate the lower the ringing frequency
is.

What are you controlling that high-frequency noise matters so much?
Nearly all the plants that I encounter are intrinsically low-pass.

That's where I can continue talking. But the plant in this case is
finicky and light, plus nasty resonances here and there.

If you're filtering to get the bulk of the PWM out, then much of the
sigma-delta noise will be in the stopband of the filter, even if it's of
lower frequency than the PWM. Particularly if the sigma-delta modulator
uses a 2nd- or 3rd-order filter.

Stopband is a pretty gradual thing when you can't go past 3rd order on
the output filter. This application is sensitive to noise because the
load is super fast.

--
Regards, Joerg

http://www.analogconsultants.com/

 

[rickman]

On 5/30/2014 5:35 PM, Tim Wescott wrote:

On Fri, 30 May 2014 16:48:15 -0400, rickman wrote:

On 5/30/2014 4:31 PM, Tim Wescott wrote:
If I may interject -- this is the sort of FPGA project that I'd sign up
to doing, confident that I could make it work just fine. And keep in
mind -- when I do HDL I get involved in conversations with folks like
Rick that basically start out with "You're a software engineer, aren't
you?" and go downhill from there.

This ain't rocket science!

Please don't accuse me of being biased toward software people.

That comment wasn't aimed at you -- I had a customer insist that I close
a control loop in an FPGA instead of on a processor. I couldn't even
talk them around to putting a MicroBlaze or whatever into their FPGA.
When I got it working and it made its way to the in-house FPGA people,
the first thing they said was "You're a software guy, aren't you?"

(It had some gawdawful 16-level multiplexer that I couldn't figure out
how to break into smaller pieces or pipeline, which was by far the source
of the most delay in the circuit, so it was a fair criticism).

BTW, if you are ever in that position again, feel free to email me a
question or two. I don't have to be on the clock for every little nit.

--

Rick

 

[Joerg]

rickman wrote:

On 5/30/2014 4:14 PM, Joerg wrote:
John Larkin wrote:
On Fri, 30 May 2014 12:35:10 -0700, Joerg <invalid@invalid.invalid
wrote:

rickman wrote:

[...]


... FPGAs come in
lean, mean sizes for any budget. If you are short on board space they
even come in some pretty teeny-tiny packages if you don't mind very
fine
pitch BGA type things. Otherwise they just come in small packages.

It is like shooting a fly with a 50mm canon. The fly will be killed
dead
for sure, as John Wayne would say, but it's overkill. We have no people
who can program FPGA. It ain't in the budget (yet).

I know a guy, if you're ever interested. We swap Visio block diagrams
to define the function, and then he codes it.

Some of the so-called CPLDs are actually small FPGAs with internal
flash, cost roughly $1.50 in low volumes. It's liberating to have all
that logic available.


Yes, they sure are tempting. In the past FPGA have always turned me off
because they were either power guzzlers or went unobtainium all the
time. The only series that I really liked was from Intel with true CMOS
behavior, meaning power went to almost zero at low clock. But then Intel
dropped the ball again. I had almost used them in a design. That could
have resulted in a serious black eye. But what I understood from what
Rick said in the past this has become better where some series will be
around for longer.

I think you have the availability issue backwards. FPGA vendors have
some of the longest lived products in the IC world. It is not at all
uncommon to design in an FPGA when it is new and not get an EOL notice
for well over 10 years. You were dealing with Intel who dabble in
secondary business areas and then close up shop when they lose interest.
I don't know that Intel has ever shipped a production FPGA so I would
hardly call them an FPGA vendor in any sense of the word.

We also had it happen with a big medical system. Forgot which vendor but
all they could offer was to pour it into a new (more expensive) FPGA
series which would have meant a major relayout. So we poured it into our
own ASIC instead and that has no EOL issue.

Many of my designs require 20 or 30 years of production life. That rules
out a lot of stuff that others take for granted.

If you need a 20 year production life, what parts *can* you use? ...

Tons. For example, I used CD4000 logic extensively. In the mid-90's a
Fairchild engineer told me that would be a stupid decision, they'd go
obsolete, I should use their single-package logic. Well, most of this is
still in production. Then staples such as the LM324, those are here to
stay. Also MMBT3904, BFS17, and so on. I just used a BFR92 on a new
design. The first time I used one I was in the mid-80's and even then it
wasn't exactly new.

... Does LTI give any assurance of a 20 year product life?

LTC? Yes, pretty much. Before they call off anything they try to contact
anyone who has ever bought it to see if it's ok.

... What MCUs or DSPs are
around after 20 years? ...

8051. That's why this is one of my favorites.

... Of these parts, I would be much less worried
about FPGAs being around in 20 years although that is likely stretching
it. If you need 30 years... I guess I don't know, I only been in the
business for 40 years and don't expect to be around myself for another
30... in the large sense.

Some of my designs have already celebrated their 20th in production and
no end in sight.

BTW, there are several device families around with "true CMOS" power
consumption. If you don't need 1 GHz there are FPGAs that are lower
power than many ARM MCUs.

That would be nice.

--
Regards, Joerg

http://www.analogconsultants.com/

 

[Joerg]

Tim Wescott wrote:

On Fri, 30 May 2014 11:22:52 -0700, Joerg wrote:

Tim Wescott wrote:
On Fri, 30 May 2014 09:47:56 -0700, Joerg wrote:

Tim Wescott wrote:
On Thu, 29 May 2014 14:20:26 -0700, Joerg wrote:

Folks,

Does anyone know an IC that can turn a control voltage into PWM and
can handle PWM frequencies in the 50-1000kHz range? Similar to a
class D driver but has to go down to DC. The changes in control
would be restricted to the audio spectrum below 15kHz.

The LTC6992 does this nicely but isn't precise enough. Same with
555-style timers or switcher chips. I am looking for better 1% and
ideally a lot better, including nonlinearity, drift, warts and all.
A uC is not suitable either because it should be simple and I need
very fine control granularity, down to around 0.1%.

Can't use short-lived consumer chips for radios and TV sets and
such.
A 555 or other teeny thing wrapped with integrating feedback, to hold
the average at precisely what you want? It kinda violates your "one
chip" desire, but at least it can be done with a minimum of small
parts.


I am going to do something like that (but probably not with a 555) if
nothing single-chip comes up. That's the reason for this thread, to
see if there isn't anything out there. I mean, every class-D amp must
have a super-linear PWM generator. It's just that most have the power
stages built in (would be ok, can be left idle) and have lousy or no
DC performance (would not be ok).
No DC performance can't be fixed -- but lousy DC performance could be
fixed with feedback, assuming there's an appropriate loop frequency to
make it easy, yet have enough authority at low frequencies to clean up
the crap.


That's a problem, my signal path goes all the way to DC and the loop
would be a pain.

Well... Why? You have analog in, and if you're driving your own final
amp, PWM out. So you can difference the PWM and your analog command
signal, feed that to an integrator of suitable gain, and drive the
amplifier input with that plus your analog command signal.

It seems like a low component count slam-dunk to me, unless there's
something that you're doing that is outside of my assumptions.

The load is highly non-linear and very capacitive in behavior. So yeah,
you could do a feedback thing with a separate lowpass to close the loop
and call it good. But it may not be as good as going in with a clean PWM
in the first place, adds a layer of risk that can (hopefully) be avoided.

Also, it's HV stuff so will be noisy as hell.

--
Regards, Joerg

http://www.analogconsultants.com/

 

[Joerg]

Lasse Langwadt Christensen wrote:

Den lřrdag den 31. maj 2014 01.55.03 UTC+2 skrev Joerg:
Lasse Langwadt Christensen wrote:

Den fredag den 30. maj 2014 19.18.22 UTC+2 skrev Joerg:
Lasse Langwadt Christensen wrote:
Den fredag den 30. maj 2014 18.34.37 UTC+2 skrev Joerg:
Lasse Langwadt Christensen wrote:
Den fredag den 30. maj 2014 16.15.46 UTC+2 skrev Joerg:
John Larkin wrote:
On Thu, 29 May 2014 18:07:45 -0700, Joerg
invalid@invalid.invalid> wrote:
John Larkin wrote:
On Thu, 29 May 2014 14:20:26 -0700, Joerg
invalid@invalid.invalid> wrote:
Folks, Does anyone know an IC that can turn a
control voltage into PWM and can handle PWM
frequencies in the 50-1000kHz range? Similar to
a class D driver but has to go down to DC. The
changes in control would be restricted to the
audio spectrum below 15kHz. The LTC6992 does
this nicely but isn't precise enough. Same with
555-style timers or switcher chips. I am
looking for better 1% and ideally a lot better,
including nonlinearity, drift, warts and all. A
uC is not suitable either because it should be
simple and I need very fine control
granularity, down to around 0.1%. Can't use
short-lived consumer chips for radios and TV
sets and such.
How about a sawtooth or triangle waveform and a
comparator. Close a feedback loop around that,
with a PWM to DC converter; the PWM-DC part can
be made very linear.
That's what I wanted to avoid for real estate
reasons. But if I hafta I'll do it.
If you want 0.1% accuracy, you might be able to do it
open-loop, with a very linear ramp, but it will be
hard at that frequency. If you only want 0.1%
resolution ("granularity"?) it's not so bad. Can you
use delta-sigma? There are some integrated d-s
modulators around.
I could but then I'd have to build a one-shot that
stretches the pulses into a very precise length and
that's almost the same kind of challenge as building my
own PWM generator (needs too much space).
why would you need a one-shot? the output is clocked
something like the AD7401, if you want to be sure a
flipflop on the output
It's possible but when assuming a master clock of 20MHz
going in and I'd want, say, a 1k granularity that would
result in an effective PWM of only 20kHz. Unless I am
understanding something wrong in the datasheet.
with DS is hard to talk about pwm frequency, it has noise
shaping so the switching noise gets pushed to higher
frequencies. i.e if you are exactly midrange the "pwm
frequency" would be 10MHz with a brick wall reconstructions
filter you would normally gain 3dB every time you double the
sampling frequency, with a second order deltasigma you gain
~15dB, first order ~9dB

http://www.analog.com/static/imported-files/data_sheets/AD7401.pdf
What I'd essentially need is a class D audio modulator but
without the DC cut-off. Unfortunately that's as rare as it
is on audio CODECs where only a few such as the AD1939 can
go down to DC without onerous offset issues or huge drift.
if you can live with the higher switching frequency I think
deltasigma would do that
I can't live with a switching frequency that gets much past a
MHz in certain areas. It will cause large losses in the
attached power electronics. I'd like the PWM to be at least
somewhat constant in frequency. It isn't critical though, if it
varies even 50% that would be ok. But not a lot more.
so clock it at 2MHz, I still think it'll be close


It can be done this way, although the output in the simulation
isn't

very clean around the min/max values of the drive signal.


all deltasigmas have "issue" when you get very close to the rails,
though I'd think pwm also have a similar problem

Not really. For example, right now I have it running on the simulator
with the LTC6992. Performs beautifully, very linear, but that chip has
quite high tolerances in the modulation factor. I could compensate for
that with demodulation plus a local loop and will probably do so if I
don't find anything better. However, that adds a lot of parts.

[simulation file]


I just threw that together to show deltasigma, I'd expect an AD7400
to perform better


Just came back from a gnarly mountain bike ride. Got a blister on
the

right palm from all the handlebar wrestling. That's a pain when the


computer mouse is on the right, ouch, ouch ...


I used to work with a guy that two mouses, one for each hand. He
claimed it was very quick to get used to switching between them

I can use a mouse with either hand and before moving my office one room
down the hallway had the mouse on the left. It drove my sister crazy
when she was visiting. Now it's on the right and there is hardly space
for it on the left. Oh well, it'll heal. Problem is, I want to do
another much longer ride on the weekend.

--
Regards, Joerg

http://www.analogconsultants.com/

 

[rickman]

On 5/30/2014 8:10 PM, Joerg wrote:

rickman wrote:

I think you have the availability issue backwards. FPGA vendors have
some of the longest lived products in the IC world. It is not at all
uncommon to design in an FPGA when it is new and not get an EOL notice
for well over 10 years. You were dealing with Intel who dabble in
secondary business areas and then close up shop when they lose interest.
I don't know that Intel has ever shipped a production FPGA so I would
hardly call them an FPGA vendor in any sense of the word.


We also had it happen with a big medical system. Forgot which vendor but
all they could offer was to pour it into a new (more expensive) FPGA
series which would have meant a major relayout. So we poured it into our
own ASIC instead and that has no EOL issue.

Don't believe that for a moment! ASICs require a fab to be made. The
only FPGA I have ever had go EOL was because the fab house was closing
that fab line. FPGA makers don't build their own fabs like most chip
makers these days. ASICs are made on the same lines. When the fab
closes all the product either ends or goes to another fab which means
they have to work the process which is more NRE.

I'm curious about your story. Yes, FPGAs go EOL, but like I said not
remotely short lived. I would expect this design was either a long time
in production or they picked an FPGA that was already long in the tooth.

If you need a 20 year production life, what parts *can* you use? ...


Tons. For example, I used CD4000 logic extensively. In the mid-90's a
Fairchild engineer told me that would be a stupid decision, they'd go
obsolete, I should use their single-package logic. Well, most of this is
still in production. Then staples such as the LM324, those are here to
stay. Also MMBT3904, BFS17, and so on. I just used a BFR92 on a new
design. The first time I used one I was in the mid-80's and even then it
wasn't exactly new.

Your example is CD4000 SSI/MSI logic? So why don't you build your
current design with those parts? lol I mean a part that is a bit more
complex. What MCUs have you used for 20 years other than the 8051?
Many MCU parts go obsolete in 10 years if not shorter. I've seen DSP
chips that lasted less than 5 years.

I read a thread the other day that mentioned a vendor who had a list of
long life products they would commit to making for 10 years or so. I
can't remember where it was. The vendor may have been Motorola.

... Does LTI give any assurance of a 20 year product life?


LTC? Yes, pretty much. Before they call off anything they try to contact
anyone who has ever bought it to see if it's ok.

Yes, well everyone does that... although it is not a question really.
So if you tell LTI you are still using the part they will continue to
make it for you without quadrupling the price?

... What MCUs or DSPs are
around after 20 years? ...


8051. That's why this is one of my favorites.

Yes, I knew you would mention that one. But that is the *only* one and
even then not all the parts are pin compatible.

So if you need some *real* processing capability, something that would
be the equivalent of a *real* MCU or FPGA, what would you use? Unless
they are making a 100 MHz 8051 I think you are pretty limited by that
choice.

... Of these parts, I would be much less worried
about FPGAs being around in 20 years although that is likely stretching
it. If you need 30 years... I guess I don't know, I only been in the
business for 40 years and don't expect to be around myself for another
30... in the large sense.


Some of my designs have already celebrated their 20th in production and
no end in sight.

Yes, if you are using stuff like 2N2222 transistors, sure. But I am
talking about something of similar complexity to an FPGA, DSP or modern
MCU. Otherwise just keep using the stuff you have been using.

BTW, there are several device families around with "true CMOS" power
consumption. If you don't need 1 GHz there are FPGAs that are lower
power than many ARM MCUs.


That would be nice.

--

Rick

 

[josephkk]

On Fri, 30 May 2014 09:47:56 -0700, Joerg <invalid@invalid.invalid> wrote:

Tim Wescott wrote:
On Thu, 29 May 2014 14:20:26 -0700, Joerg wrote:

Folks,

Does anyone know an IC that can turn a control voltage into PWM and can
handle PWM frequencies in the 50-1000kHz range? Similar to a class D
driver but has to go down to DC. The changes in control would be
restricted to the audio spectrum below 15kHz.

The LTC6992 does this nicely but isn't precise enough. Same with
555-style timers or switcher chips. I am looking for better 1% and
ideally a lot better, including nonlinearity, drift, warts and all. A uC
is not suitable either because it should be simple and I need very fine
control granularity, down to around 0.1%.

Can't use short-lived consumer chips for radios and TV sets and such.

A 555 or other teeny thing wrapped with integrating feedback, to hold the
average at precisely what you want? It kinda violates your "one chip"
desire, but at least it can be done with a minimum of small parts.


I am going to do something like that (but probably not with a 555) if
nothing single-chip comes up. That's the reason for this thread, to see
if there isn't anything out there. I mean, every class-D amp must have a
super-linear PWM generator. It's just that most have the power stages
built in (would be ok, can be left idle) and have lousy or no DC
performance (would not be ok).

Ok a weird question: Does the response need to be 0.1% for any step size
at 15 kHz? Can it be "slew rate limited" a bit to get to 0.1% for a large
step; to like 900 Hz?

?-)

 

[josephkk]

On Fri, 30 May 2014 09:57:30 -0700, Joerg <invalid@invalid.invalid> wrote:

whit3rd wrote:
On Thursday, May 29, 2014 6:07:45 PM UTC-7, Joerg wrote:
John Larkin wrote:

How about a sawtooth or triangle waveform and a comparator. Close a
feedback loop around that, with a PWM to DC converter; the PWM-DC part
can be made very linear.

That's what I wanted to avoid for real estate reasons.

It's only a dual comparator and a transistor! The first comparator is set
up as a Schmitt trigger with thresholds at +Vs and -Vs; its output drives
a resistor to the base, capacitor from collector to base, emitter to V-.
That makes a triangle wave. The second comparator takes signal in
on one input, and triangle wave on the other, and you're done.


Sure, I know how to do it analog. But it's not quite as simple as it
looks. Offsets, drift, regulators for super-stable rails et cetera. I
thought there's got to be a solution-in-a-can because of all the class D
amps these days. But the problem seems to be DC because audio doesn't
need that. So maybe there isn't a suitable IC.

Well you can band split it, a bit messier but it works. Put the crossover
at about 30 Hz and do the LF yourself.

?-)