Using zener diode to protect test circuit?

A

Andrew

Guest
I am designing a test instrument that will be powered from the circuit under
test. Consequently there is a high probability of the incorrect voltage or
polarity being supplied to my circuit. I cannot protect against reverse
polarity by using a series diode as this will drop the supply voltage too
much.

An idea that I have seen (in the Microchip ICD1
http://makeashorterlink.com/?K388412FA) is to place a 5.1V zener diode
across the power input. This will short the supply if applied with the
wrong polarity and attempt to clamp it to 5.1V if too high a voltage is
applied. In either case the diode will draw a potentially large current
since a series resistor is not practical as that would drop the voltage
unacceptably under normal circumstances. However, this would probably work
if the test power supply were current limited.

If the zener did sink a high current and was destroyed, what would its
failure mode most likely be? Would it fail short-circuit or open-circuit? I
assume the latter, which would negate the protection.

Alternatively, is there an alternative approach that I could use?
 
On Sat, 23 Apr 2005 15:56:05 +0100, "Andrew" <ajhuk@hotmail.com>
wrote:

I am designing a test instrument that will be powered from the circuit under
test. Consequently there is a high probability of the incorrect voltage or
polarity being supplied to my circuit. I cannot protect against reverse
polarity by using a series diode as this will drop the supply voltage too
much.

An idea that I have seen (in the Microchip ICD1
http://makeashorterlink.com/?K388412FA) is to place a 5.1V zener diode
across the power input. This will short the supply if applied with the
wrong polarity and attempt to clamp it to 5.1V if too high a voltage is
applied. In either case the diode will draw a potentially large current
since a series resistor is not practical as that would drop the voltage
unacceptably under normal circumstances. However, this would probably work
if the test power supply were current limited.

If the zener did sink a high current and was destroyed, what would its
failure mode most likely be? Would it fail short-circuit or open-circuit? I
assume the latter, which would negate the protection.

Alternatively, is there an alternative approach that I could use?
You could probably modify "PerfectDiodeForChargerIsolation.pdf" on the
S.E.D/Schematics page of my website.

Just rig it so reverse or excess voltage guarantees an OFF state.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
Andrew wrote...
I am designing a test instrument that will be powered from the circuit
under test. Consequently there is a high probability of the incorrect
voltage or polarity being supplied to my circuit. I cannot protect
against reverse polarity by using a series diode as this will drop the
supply voltage too much.
You didn't say how high the voltage is... If it's above 4V, you
can use a bridge rectifier to present the correct polarity to your
circuit. Not content to see a 1.2V drop in the bridge? Use four
MOSFETs instead, two each p- and n-channel. I think this works.
Tie the drains of both types to both inputs, with each FET's gate
to the opposite input. Tie the p-channel sources together, this is
the + output. The n-channel sources are the - output. Like this:
..
.. IN --+------- D S ----+---- + out
.. | p G |
.. | _______| |
.. | | |
.. | +---- D S ----' low-voltage active bridge
.. | | p G Vin >> Vgs(th), and < 20V
.. |__| ______|
.. | |
.. +--| --- D S ----, uses two each p-channel and
.. | | n G | n-channel MOSFETs, as shown
.. | |_______| |
.. | | |
.. IN --| -+---- D S ----+---- - out
.. | n G
.. |__________|

When power is first applied the FET's substrate diodes conduct
to present the proper voltage polarity to the output. Two of
the FET's also immediately turn on, shorting out their diodes
for a low voltage drop. The opposite-polarity FETs remain off.


--
Thanks,
- Win
 
"Andrew" <ajhuk@hotmail.com> wrote:

If the zener did sink a high current and was destroyed, what would its
failure mode most likely be? Would it fail short-circuit or open-circuit? I
assume the latter, which would negate the protection.
Using glass package diodes a large overload would likely overheat and go
short, a huge overload might blow it apart and go open. Plastic packages
are more likely to pop blowing the connection apart under large overload.

Alternatively, is there an alternative approach that I could use?
Put a polyswitch resettable fuse in series as long as the worst case fault
voltage is within their specification.
 
On Sat, 23 Apr 2005 15:56:05 +0100, "Andrew" <ajhuk@hotmail.com>
wrote:

I am designing a test instrument that will be powered from the circuit under
test. Consequently there is a high probability of the incorrect voltage or
polarity being supplied to my circuit. I cannot protect against reverse
polarity by using a series diode as this will drop the supply voltage too
much.

An idea that I have seen (in the Microchip ICD1
http://makeashorterlink.com/?K388412FA) is to place a 5.1V zener diode
across the power input. This will short the supply if applied with the
wrong polarity and attempt to clamp it to 5.1V if too high a voltage is
applied. In either case the diode will draw a potentially large current
since a series resistor is not practical as that would drop the voltage
unacceptably under normal circumstances. However, this would probably work
if the test power supply were current limited.

If the zener did sink a high current and was destroyed, what would its
failure mode most likely be? Would it fail short-circuit or open-circuit? I
assume the latter, which would negate the protection.

Alternatively, is there an alternative approach that I could use?
The way the big boys do it can be seen at

http://www.analog-innovations.com/SED/OverAndReverseVoltageProtection.pdf

I have used similar schemes in LiIon battery charger integrated
circuits, to prevent over-charging OR over-discharging.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
On Sat, 23 Apr 2005 15:56:05 +0100, in sci.electronics.design "Andrew"
<ajhuk@hotmail.com> wrote:

I am designing a test instrument that will be powered from the circuit under
test. Consequently there is a high probability of the incorrect voltage or
polarity being supplied to my circuit. I cannot protect against reverse
polarity by using a series diode as this will drop the supply voltage too
much.

An idea that I have seen (in the Microchip ICD1
http://makeashorterlink.com/?K388412FA) is to place a 5.1V zener diode
across the power input. This will short the supply if applied with the
wrong polarity and attempt to clamp it to 5.1V if too high a voltage is
applied. In either case the diode will draw a potentially large current
since a series resistor is not practical as that would drop the voltage
unacceptably under normal circumstances. However, this would probably work
if the test power supply were current limited.

If the zener did sink a high current and was destroyed, what would its
failure mode most likely be? Would it fail short-circuit or open-circuit? I
assume the latter, which would negate the protection.

Alternatively, is there an alternative approach that I could use?

have a look at the smart high side power fets from infineon, eg
BTS5434 they are low RDson with reverse polarity protection.


martin

After the first death, there is no other.
(Dylan Thomas)
 
On Sat, 23 Apr 2005 10:34:54 -0700, Jim Thompson
<thegreatone@example.com> wrote:

On Sat, 23 Apr 2005 15:56:05 +0100, "Andrew" <ajhuk@hotmail.com
wrote:

I am designing a test instrument that will be powered from the circuit under
test. Consequently there is a high probability of the incorrect voltage or
polarity being supplied to my circuit. I cannot protect against reverse
polarity by using a series diode as this will drop the supply voltage too
much.

An idea that I have seen (in the Microchip ICD1
http://makeashorterlink.com/?K388412FA) is to place a 5.1V zener diode
across the power input. This will short the supply if applied with the
wrong polarity and attempt to clamp it to 5.1V if too high a voltage is
applied. In either case the diode will draw a potentially large current
since a series resistor is not practical as that would drop the voltage
unacceptably under normal circumstances. However, this would probably work
if the test power supply were current limited.

If the zener did sink a high current and was destroyed, what would its
failure mode most likely be? Would it fail short-circuit or open-circuit? I
assume the latter, which would negate the protection.

Alternatively, is there an alternative approach that I could use?


The way the big boys do it can be seen at

http://www.analog-innovations.com/SED/OverAndReverseVoltageProtection.pdf

I have used similar schemes in LiIon battery charger integrated
circuits, to prevent over-charging OR over-discharging.

...Jim Thompson
That was just a quicky toss-together.

To save current consumption, you can increase the 100 ohm resistor to
like 560 ohm... you just need to support the minimum TL431 cathode
current (~1mA) without getting the PNP into conduction.

Or use the CMOS version (I can't remember the part number :)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
I read in sci.electronics.design that Andrew <ajhuk@hotmail.com> wrote
(in <WZ-dnXBz4sqM__ffRVnyjg@pipex.net>) about 'Using zener diode to
protect test circuit?', on Sat, 23 Apr 2005:

Alternatively, is there an alternative approach that I could use?

Put a fuse in the supply line before the zener.
--
Regards, John Woodgate, OOO - Own Opinions Only.
There are two sides to every question, except
'What is a Moebius strip?'
http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk
 
Jim Thompson wrote...
Jim Thompson wrote:

The way the big boys do it can be seen at
http://www.analog-innovations.com/SED/OverAndReverseVoltageProtection.pdf
I have used similar schemes in LiIon battery charger integrated
circuits, to prevent over-charging OR over-discharging.

That was just a quicky toss-together.

To save current consumption, you can increase the 100 ohm resistor to
like 560 ohm... you just need to support the minimum TL431 cathode
current (~1mA) without getting the PNP into conduction.

Or use the CMOS version (I can't remember the part number :)
The TLV431 runs down to 55uA typ, 80uA worst case, and has a
1.25V reference. It's made by ON Semi and TI. The similar
LMV431 is made by NSC. They're all bipolar parts.

One would likely want to use a higher-voltage MOSFET, because
the IRLML6401's Vds(max) = -12V is a rather severe limit.


--
Thanks,
- Win
 
On 23 Apr 2005 13:21:32 -0700, Winfield Hill
<hill_a@t_rowland-dotties-harvard-dot.s-edu> wrote:

Jim Thompson wrote...

Jim Thompson wrote:

The way the big boys do it can be seen at
http://www.analog-innovations.com/SED/OverAndReverseVoltageProtection.pdf
I have used similar schemes in LiIon battery charger integrated
circuits, to prevent over-charging OR over-discharging.

That was just a quicky toss-together.

To save current consumption, you can increase the 100 ohm resistor to
like 560 ohm... you just need to support the minimum TL431 cathode
current (~1mA) without getting the PNP into conduction.

Or use the CMOS version (I can't remember the part number :)

The TLV431 runs down to 55uA typ, 80uA worst case, and has a
1.25V reference. It's made by ON Semi and TI. The similar
LMV431 is made by NSC. They're all bipolar parts.

One would likely want to use a higher-voltage MOSFET, because
the IRLML6401's Vds(max) = -12V is a rather severe limit.
My impression was that the OP probably had a 3.3V system and wanted to
protect it against 5V or reversed polarity.

The IRLML6401 was just pulled out of the hat, but I had to use IE to
get the model and data sheet... guess I need to try the full Mozilla
;-)

The basic scheme is well-tested... used along with a California Micro
Devices chip I designed probably 10 years ago to control LiIon
charging.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
"nospam" <nospam@nospam.invalid> wrote in message
Alternatively, is there an alternative approach that I could use?

Put a polyswitch resettable fuse in series as long as the worst case fault
voltage is within their specification.
That is probably the easiest solution. See, for example, the Bournes MF-R
series, available through Digikey:
http://rocky.digikey.com/WebLib/Bourns/Web%20Data/MF-R%20Series.pdf

A polyswitch fuse is basically a positive tempco thermistor. That means that
it acts like a resistor, and the resistance increases with temperature. The
resistance of a PTC fuse is small at room temperature. This resistance is
small enough to introduce a negligible voltage drop at the normal operating
current.

However, when a large fault current flows through the PTC fuse, the I^2*R
heating in the PTC fuse causes the temperature of the device to increase.
That means that the resistance of the PTC fuse increases, which limits the
fault current. Eventually it reaches some kind of thermal steady-state, at a
hopefully-reasonable fault current.

You didn't give any specs on the maximum tolerable voltage drop or maximum
normal operating current. Say for the sake of argument that your circuit
usually draws 50 mA, and you can tolerate an 0.1 V drop. Further, let's say
that the normal operating voltage is 5 V, but you expect that the circuit
might be connected to any voltage between -15 and +15 V.

That means that you need a cold resistance of V/I = 2 ohms. Looking through
the MF-R series, you might select an MF-R025, with a maximum cold resistance
of 1.95 ohms.

The worst case fault currents will occur if you connect +15 or -15 V. If you
connect -15 V, then the zener diode drops ~0.7 V, so the PTC resistor (which
is initially cold) has to drop 15 - 0.7 = 14.3 V. That corresponds to an
initial fault current of 14.3/1.00 (using the minimum cold resistance), or
14.3 A. This is less than the rated Imax so that's okay.

Or, for +15 V, the zener diode drops 5.1 V, so the PTC resistor drops 9.9 V,
for a fault current of 9.9 A, which is also less than the rated Imax.

That means that the zener diode must be able to tolerate a current of about
10 A for tens of milliseconds (see the "typical time to trip" figure). The
steady state fault current will be smaller, of course. To calculate that,
use the rated "tripped power dissipation", 0.45 W for the MF-R025. If you
apply +15 V to the circuit, then we have 9.9 V across the PTC fuse;
calculate the current through the PTC fuse using P = V^2/R, or 0.45 =
(9.9^2)/R, or R = 218 ohms. In that case a current of 9.9/218 = 45 mA flows;
that means that the zener diode dissipates (45 mA)*(5.1 V), or 0.23 W
steady-state, which is reasonable. For -15 V there is 14.3 V across the PTC
fuse, for R = 454 ohms, I = 31 mA, Pzener = 0.02 W.

The problem with PTC fuses is that they act very slowly. That means that the
initial fault current handled by the zener will be large, and it will last
for a long time. Your choice of zener will be driven by the large intial
fault current, not the small steady-state fault current. They are even
slower to release. The "ideal diode" circuits can act in microseconds. On
the other hand they're probably easier to kill.

Finally, here are some steady-state I versus V measurements on an MF-R025,
in the order in which I made the measurements, over the course of about five
minutes. The thermistor was exposed in still air.

V [V] I [mA] P [mW] R [ohms]
------------------------------------------
0.0490 35.0000 1.7150 1.400
0.0990 69.0000 6.8310 1.435
0.3400 224.0000 76.1600 1.518
1.0670 284.0000 303.0280 3.757
2.6500 166.0000 439.9000 15.964
3.7000 125.0000 462.5000 29.600
4.4900 104.0000 466.9600 43.173
6.8300 68.0000 464.4400 100.44
10.2400 46.0000 471.0400 222.609
20.2000 24.0000 484.8000 841.667
31.6000 16.0000 505.6000 1975.000
3.7000 115.0000 425.5000 32.174
1.0700 257.0000 274.9900 4.163
0.1000 48.0000 4.8000 2.083

(compare: rated Ptripped = 450 mW, rated Rcold = 1.00 to 1.95 ohms, Ihold =
250 mA, Itrip = 500 mA)

The rated max cold resistance 2 hours after tripping is 3 ohms, ~1.5x the
rated max initial cold resistance. My PTC fuse recovered most of its
conductivity very quickly, though.

The current is very sensitive to the thermal resistance, as expected. If I
put my thumb on the thermistor in the "tripped" region then the current
almost doubled.

This is slightly more analysis than the problem requires.

Jonathan
http://cq.cx/
 
Jim Thompson wrote:
On 23 Apr 2005 13:21:32 -0700, Winfield Hill
hill_a@t_rowland-dotties-harvard-dot.s-edu> wrote:


Jim Thompson wrote...

Jim Thompson wrote:


The way the big boys do it can be seen at
http://www.analog-innovations.com/SED/OverAndReverseVoltageProtection.pdf
I have used similar schemes in LiIon battery charger integrated
circuits, to prevent over-charging OR over-discharging.

That was just a quicky toss-together.

To save current consumption, you can increase the 100 ohm resistor to
like 560 ohm... you just need to support the minimum TL431 cathode
current (~1mA) without getting the PNP into conduction.

Or use the CMOS version (I can't remember the part number :)

The TLV431 runs down to 55uA typ, 80uA worst case, and has a
1.25V reference. It's made by ON Semi and TI. The similar
LMV431 is made by NSC. They're all bipolar parts.

One would likely want to use a higher-voltage MOSFET, because
the IRLML6401's Vds(max) = -12V is a rather severe limit.


My impression was that the OP probably had a 3.3V system and wanted to
protect it against 5V or reversed polarity.

The IRLML6401 was just pulled out of the hat, but I had to use IE to
get the model and data sheet... guess I need to try the full Mozilla
;-)

The basic scheme is well-tested... used along with a California Micro
Devices chip I designed probably 10 years ago to control LiIon
charging.

...Jim Thompson
What's to test? It is a simple concatenation of the blog-standard
reverse polarity protection MOSFET and the TL431 crowbar trigger
circuit-except you substitute a series P-MOSFET in place of the shunt
SCR, gate connection the same-heheh. Couldn't be simpler.
 
Winfield Hill wrote:
Andrew wrote...

I am designing a test instrument that will be powered from the circuit
under test. Consequently there is a high probability of the incorrect
voltage or polarity being supplied to my circuit. I cannot protect
against reverse polarity by using a series diode as this will drop the
supply voltage too much.


You didn't say how high the voltage is... If it's above 4V, you
can use a bridge rectifier to present the correct polarity to your
circuit. Not content to see a 1.2V drop in the bridge? Use four
MOSFETs instead, two each p- and n-channel. I think this works.
Tie the drains of both types to both inputs, with each FET's gate
to the opposite input. Tie the p-channel sources together, this is
the + output. The n-channel sources are the - output. Like this:
.
. IN --+------- D S ----+---- + out
. | p G |
. | _______| |
. | | |
. | +---- D S ----' low-voltage active bridge
. | | p G Vin >> Vgs(th), and < 20V
. |__| ______|
. | |
. +--| --- D S ----, uses two each p-channel and
. | | n G | n-channel MOSFETs, as shown
. | |_______| |
. | | |
. IN --| -+---- D S ----+---- - out
. | n G
. |__________|

When power is first applied the FET's substrate diodes conduct
to present the proper voltage polarity to the output. Two of
the FET's also immediately turn on, shorting out their diodes
for a low voltage drop. The opposite-polarity FETs remain off.
Npw I like that damned thing- and you can get the same performance in a
smaller package using some analog switches- I posted on this a while back.
 
Andrew wrote:
I am designing a test instrument that will be powered from the circuit under
test. Consequently there is a high probability of the incorrect voltage or
polarity being supplied to my circuit. I cannot protect against reverse
polarity by using a series diode as this will drop the supply voltage too
much.

An idea that I have seen (in the Microchip ICD1
http://makeashorterlink.com/?K388412FA) is to place a 5.1V zener diode
across the power input. This will short the supply if applied with the
wrong polarity and attempt to clamp it to 5.1V if too high a voltage is
applied. In either case the diode will draw a potentially large current
since a series resistor is not practical as that would drop the voltage
unacceptably under normal circumstances. However, this would probably work
if the test power supply were current limited.

If the zener did sink a high current and was destroyed, what would its
failure mode most likely be? Would it fail short-circuit or open-circuit? I
assume the latter, which would negate the protection.

Alternatively, is there an alternative approach that I could use?
All the shunt diode and fuse stuff is **crap** unless you want to allow
your "instrument" to take the D.U.T. down while protecting its fragile self.
 
Fred Bloggs wrote...
Winfield Hill wrote:
Andrew wrote...

I am designing a test instrument that will be powered from the circuit
under test. Consequently there is a high probability of the incorrect
voltage or polarity being supplied to my circuit. I cannot protect
against reverse polarity by using a series diode as this will drop the
supply voltage too much.

You didn't say how high the voltage is... If it's above 4V, you
can use a bridge rectifier to present the correct polarity to your
circuit. Not content to see a 1.2V drop in the bridge? Use four
MOSFETs instead, two each p- and n-channel. I think this works.
Tie the drains of both types to both inputs, with each FET's gate
to the opposite input. Tie the p-channel sources together, this is
the + output. The n-channel sources are the - output. Like this:
.
. IN --+------- D S ----+---- + out
. | p G |
. | _______| |
. | | |
. | +---- D S ----' low-voltage active bridge
. | | p G Vin >> Vgs(th), and < 20V
. |__| ______|
. | |
. +--| --- D S ----, uses two each p-channel and
. | | n G | n-channel MOSFETs, as shown
. | |_______| |
. | | |
. IN --| -+---- D S ----+---- - out
. | n G
. |__________|

When power is first applied the FET's substrate diodes conduct
to present the proper voltage polarity to the output. Two of
the FET's also immediately turn on, shorting out their diodes
for a low voltage drop. The opposite-polarity FETs remain off.

Now I like that damned thing- and you can get the same performance
in a smaller package using some analog switches- I posted on this
a while back.
That's a great idea, I'm sorry I missed your post. Unless I'm
mistaken, all that's needed to implement the circuit above are
two CMOS inverters...

.. _Vdd --+---- + out
.. / | |
.. IN ----O< |-----'
.. \_| Active bridge rectifier
.. unknown using cmos hex inverters
.. polarity _
.. / |
.. IN ----O< |-----,
.. \_| |
.. Vss --+---- - out

Amazing. Looks positively spooky! A hex inverter can have its
two three-section sets tied in parallel for better conductance.

I'll bet much has been written about this circuit idea someplace.


--
Thanks,
- Win
 
On 23 Apr 2005 17:39:25 -0700, Winfield Hill
<hill_a@t_rowland-dotties-harvard-dot.s-edu> wrote:

Fred Bloggs wrote...

Winfield Hill wrote:
Andrew wrote...

I am designing a test instrument that will be powered from the circuit
under test. Consequently there is a high probability of the incorrect
voltage or polarity being supplied to my circuit. I cannot protect
against reverse polarity by using a series diode as this will drop the
supply voltage too much.

You didn't say how high the voltage is... If it's above 4V, you
can use a bridge rectifier to present the correct polarity to your
circuit. Not content to see a 1.2V drop in the bridge? Use four
MOSFETs instead, two each p- and n-channel. I think this works.
Tie the drains of both types to both inputs, with each FET's gate
to the opposite input. Tie the p-channel sources together, this is
the + output. The n-channel sources are the - output. Like this:
.
. IN --+------- D S ----+---- + out
. | p G |
. | _______| |
. | | |
. | +---- D S ----' low-voltage active bridge
. | | p G Vin >> Vgs(th), and < 20V
. |__| ______|
. | |
. +--| --- D S ----, uses two each p-channel and
. | | n G | n-channel MOSFETs, as shown
. | |_______| |
. | | |
. IN --| -+---- D S ----+---- - out
. | n G
. |__________|

When power is first applied the FET's substrate diodes conduct
to present the proper voltage polarity to the output. Two of
the FET's also immediately turn on, shorting out their diodes
for a low voltage drop. The opposite-polarity FETs remain off.

Now I like that damned thing- and you can get the same performance
in a smaller package using some analog switches- I posted on this
a while back.

That's a great idea, I'm sorry I missed your post. Unless I'm
mistaken, all that's needed to implement the circuit above are
two CMOS inverters...

. _Vdd --+---- + out
. / | |
. IN ----O< |-----'
. \_| Active bridge rectifier
. unknown using cmos hex inverters
. polarity _
. / |
. IN ----O< |-----,
. \_| |
. Vss --+---- - out

Amazing. Looks positively spooky! A hex inverter can have its
two three-section sets tied in parallel for better conductance.

I'll bet much has been written about this circuit idea someplace.
Sorta works, but not real spiffy.

Did you actually try this (or simulate) ?:)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
On Sat, 23 Apr 2005 18:42:25 -0700, Jim Thompson
<thegreatone@example.com> wrote:

On 23 Apr 2005 17:39:25 -0700, Winfield Hill
hill_a@t_rowland-dotties-harvard-dot.s-edu> wrote:

Fred Bloggs wrote...

Winfield Hill wrote:
Andrew wrote...

I am designing a test instrument that will be powered from the circuit
under test. Consequently there is a high probability of the incorrect
voltage or polarity being supplied to my circuit. I cannot protect
against reverse polarity by using a series diode as this will drop the
supply voltage too much.

You didn't say how high the voltage is... If it's above 4V, you
can use a bridge rectifier to present the correct polarity to your
circuit. Not content to see a 1.2V drop in the bridge? Use four
MOSFETs instead, two each p- and n-channel. I think this works.
Tie the drains of both types to both inputs, with each FET's gate
to the opposite input. Tie the p-channel sources together, this is
the + output. The n-channel sources are the - output. Like this:
.
. IN --+------- D S ----+---- + out
. | p G |
. | _______| |
. | | |
. | +---- D S ----' low-voltage active bridge
. | | p G Vin >> Vgs(th), and < 20V
. |__| ______|
. | |
. +--| --- D S ----, uses two each p-channel and
. | | n G | n-channel MOSFETs, as shown
. | |_______| |
. | | |
. IN --| -+---- D S ----+---- - out
. | n G
. |__________|

When power is first applied the FET's substrate diodes conduct
to present the proper voltage polarity to the output. Two of
the FET's also immediately turn on, shorting out their diodes
for a low voltage drop. The opposite-polarity FETs remain off.

Now I like that damned thing- and you can get the same performance
in a smaller package using some analog switches- I posted on this
a while back.

That's a great idea, I'm sorry I missed your post. Unless I'm
mistaken, all that's needed to implement the circuit above are
two CMOS inverters...

. _Vdd --+---- + out
. / | |
. IN ----O< |-----'
. \_| Active bridge rectifier
. unknown using cmos hex inverters
. polarity _
. / |
. IN ----O< |-----,
. \_| |
. Vss --+---- - out

Amazing. Looks positively spooky! A hex inverter can have its
two three-section sets tied in parallel for better conductance.

I'll bet much has been written about this circuit idea someplace.

Sorta works, but not real spiffy.

Did you actually try this (or simulate) ?:)

...Jim Thompson
It works if you...

Tie input of upper inverter to lower "IN"

Tie input of lower inverter to upper "IN"

Cute! I'll use it ;-)

Unless you meant OUT's as IN's and V-V... I'll try that next.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
On Sat, 23 Apr 2005 15:56:05 +0100, "Andrew" <ajhuk@hotmail.com>
wrote:

I am designing a test instrument that will be powered from the circuit under
test. Consequently there is a high probability of the incorrect voltage or
polarity being supplied to my circuit. I cannot protect against reverse
polarity by using a series diode as this will drop the supply voltage too
much.

How about a PNP in common base:

IN -----+ +----------OUT
| |
V |
------- 2N3906
|
|
/
\
/ 560 ohm
\
/
|
|
GND-------+------------GND

The emitter will not break down with only 5.1V reverse.
Am I dreaming? ...or is it really this simple?

Stepan
 
Jim Thompson wrote...
Winfield Hill wrote:
Fred Bloggs wrote...
Winfield Hill wrote:
Andrew wrote...

I am designing a test instrument that will be powered from the circuit
under test. Consequently there is a high probability of the incorrect
voltage or polarity being supplied to my circuit. I cannot protect
against reverse polarity by using a series diode as this will drop the
supply voltage too much.

You didn't say how high the voltage is... If it's above 4V, you
can use a bridge rectifier to present the correct polarity to your
circuit. Not content to see a 1.2V drop in the bridge? Use four
MOSFETs instead, two each p- and n-channel. I think this works.
Tie the drains of both types to both inputs, with each FET's gate
to the opposite input. Tie the p-channel sources together, this is
the + output. The n-channel sources are the - output. Like this:
.
. IN --+------- D S ----+---- + out
. | p G |
. | _______| |
. | | |
. | +---- D S ----' low-voltage active bridge
. | | p G Vin >> Vgs(th), and < 20V
. |__| ______|
. | |
. +--| --- D S ----, uses two each p-channel and
. | | n G | n-channel MOSFETs, as shown
. | |_______| |
. | | |
. IN --| -+---- D S ----+---- - out
. | n G
. |__________|

When power is first applied the FET's substrate diodes conduct
to present the proper voltage polarity to the output. Two of
the FET's also immediately turn on, shorting out their diodes
for a low voltage drop. The opposite-polarity FETs remain off.

Now I like that damned thing- and you can get the same performance
in a smaller package using some analog switches- I posted on this
a while back.

That's a great idea, I'm sorry I missed your post. Unless I'm
mistaken, all that's needed to implement the circuit above are
two CMOS inverters...

. _Vdd --+---- + out
. / | |
. IN ----O< |-----'
. \_| Active bridge rectifier
. unknown using cmos hex inverters
. polarity _
. / |
. IN ----O< |-----,
. \_| |
. Vss --+---- - out

Amazing. Looks positively spooky! A hex inverter can have its
two three-section sets tied in parallel for better conductance.

I'll bet much has been written about this circuit idea someplace.

It works if you...
Tie input of upper inverter to lower "IN"
Tie input of lower inverter to upper "IN"
Cute! I'll use it ;-)
That's right, thanks! I messed-up when translating my first
drawing to the second one. Here's the corrected schematic.

.. _Vdd ----- + out
.. / |
.. IN ---+--O< |--,
.. | \_| | Active bridge rectifier
.. unknown \________|_ using cmos hex inverters
.. polarity ________| |
.. / _ |
.. | / | |
.. IN ---+--O< |----'
.. \_|
.. Vss ----- - out

Again, someone must have invented this long ago. Sometime shortly
after the first cmos hex inverters came out in the mid 60s, or at
least soon after cmos became available in low-cost plastic packages
about 35 years ago... But now we can make it with a micro-miniature
ON Semi NL27WZ04 MiniGate™ in a SC70-6 package, a 2.1 x 2.1mm dust
flake. See http://www.onsemi.com/site/content/0,,1241,00.html and
http://www.onsemi.com/pub/Collateral/NL27WZ04-D.PDF

Using the FETs in a low-voltage cmos process allows us to use this
technique down to 1.5V or even less, although of course the FET's
on resistance goes up at low voltages. Has anyone seen an Ron vs
Vdd plot for these low-voltage logic families? ON Semi's NL17SV04
is claimed to work well at 0.9V supply, and deliver 50MHz at 1.2V.

BTW, although the fabulous MiniGate logic sample kit is no longer
available free from ON Semi, it's offered by DigiKey for only $39.
Search on MINIGATEA-KIT. Break out those microscopes!


--
Thanks,
- Win
 
On Sun, 24 Apr 2005 04:24:07 GMT, snovotill@hotmail.com wrote:

On Sat, 23 Apr 2005 15:56:05 +0100, "Andrew" <ajhuk@hotmail.com
wrote:

I am designing a test instrument that will be powered from the circuit under
test. Consequently there is a high probability of the incorrect voltage or
polarity being supplied to my circuit. I cannot protect against reverse
polarity by using a series diode as this will drop the supply voltage too
much.

How about a PNP in common base:

IN -----+ +----------OUT
| |
V |
------- 2N3906
|
|
/
\
/ 560 ohm
\
/
|
|
GND-------+------------GND

The emitter will not break down with only 5.1V reverse.
Am I dreaming? ...or is it really this simple?

Stepan
That _might_ work if the reverse voltage doesn't ever go above 6V, but
you're playing it awfully close to Absolute Maximum specification.

Now how about the over voltage requirement?

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 

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