Guest
On Sat, 04 Jul 2015 11:42:43 -0400, Phil Hobbs
<hobbs@electrooptical.net> wrote:
Some of the power dissipation issues could be solved, if new materials
tolerating higher temperatures could be found. This would increase the
junction to ambient temperature difference, enhancing heat transfer.
For super computers it might even make sense to immerse the whole
system into distilled deionized water. The component case will be
slightly above 100 C, when a lot of heat is removed by vaporization.
Of course, new cold water needs to be added to replaced the vaporized
water. I have not heard of vapor cooling electronics for decades, but
some big transmitting tubes used vapor cooling.
Of course if you use a single synchronous clock to drive everything on
a system, there are going to be a lot of time-of-light problems.
However, splitting the system into multiple "islands" (such as
processors+local memory) and running every island with private clocks
should help a lot, using close proximity within an island. Of course,
the communication between islands need to be asynchronous e.g. using
self clocked messages (such as cache lines).
If a full wafer is used, using high density locally clocked islands
with plenty of space between islands would help heat removal as well
as allowing space for running lines between the islands.
While thermal design must be done assuming 100 % computing load on
each island, the average power consumption would be less, when every
processor not doing useful work at the moment can be stopped, saving a
lot of power.
<hobbs@electrooptical.net> wrote:
On 7/4/2015 9:32 AM, Tom Del Rosso wrote:
Martin Brown wrote:
Moore's law never made any claims about speed. It was specifically
about the number density of transistors on a given area of silicon.
I roll my eyes when I hear "Moore's law" and the "computing power of a chip"
in the same sentence. He stated his law when a chip had 4 transistors.
Since you can't make a computer with 4, it makes no sense to speak of the
computing power of a chip.
What we need is a breakthrough in 3D structures. In 2D we're limited to a
few connections per transistor, and a few per gate. It's
connections-per-element that will make HAL possible.
There are all kinds of 3D structures. The problem is cooling them. For
instance, say you're stacking a processor and several planes of memory.
The processor generates a lot of heat, so it has to go next to the
heat sink, i.e. at the top of the stack. but then all its I/O has to go
through the memory chips, so you lose all your area to through-silicon
vias (TSVs). Same problem as very tall buildings.
If you put it the other way up, you have to throttle back the CPU to the
point that you don't gain anything. Computer speed has been a tradeoff
between clock rate and cooling since the 1980s. I remember going to a
talk by a system architect in about 1988, where he put up a plot of
delay vs. power consumption per gate. It dropped steeply at first, of
course but then gradually rose again at high powers, because the chips
had to be spaced out in order to cool them, which added time-of-flight
delay.
Some of the power dissipation issues could be solved, if new materials
tolerating higher temperatures could be found. This would increase the
junction to ambient temperature difference, enhancing heat transfer.
For super computers it might even make sense to immerse the whole
system into distilled deionized water. The component case will be
slightly above 100 C, when a lot of heat is removed by vaporization.
Of course, new cold water needs to be added to replaced the vaporized
water. I have not heard of vapor cooling electronics for decades, but
some big transmitting tubes used vapor cooling.
Of course if you use a single synchronous clock to drive everything on
a system, there are going to be a lot of time-of-light problems.
However, splitting the system into multiple "islands" (such as
processors+local memory) and running every island with private clocks
should help a lot, using close proximity within an island. Of course,
the communication between islands need to be asynchronous e.g. using
self clocked messages (such as cache lines).
If a full wafer is used, using high density locally clocked islands
with plenty of space between islands would help heat removal as well
as allowing space for running lines between the islands.
While thermal design must be done assuming 100 % computing load on
each island, the average power consumption would be less, when every
processor not doing useful work at the moment can be stopped, saving a
lot of power.