test signals for testing of leaf level entities in a design

N

Nachiket Kapre

Guest
Hi,
During hierarchical design we often break down the design into small
manageable parts. Now inter block communication specs are specified
for this design alongwith internal function requirements. To verify
the internal functioning and to simulate the external inputs to this
design, we usually write force files in Modelsim. Now if we create a
set of commmonly available stimuli like do-done handshake, random
pulses, random duration levels, etc in Tcl, we could directly apply
them to the signals on the interface we want to check. For response
type of interfaces we could add dummy "done" generators. Now once such
a suite of test inputs is available, we could easily test most of the
small entities in a zap. Is such a tool done already? and are there
some more types of communication behavious i am overlooking? I somehow
think Modelsim signal forcing interface and the do-file writing for
such a forcing is a dumb and painful way of testing things.

regards,
nachiket.
 

Welcome to EDABoard.com

Sponsor

Back
Top