RF Black Magic- Eliminating Fringing Capacitance...

C

Cursitor Doom

Guest
Gentlemen,

If I may return to the subject of electronics, I\'d like to ask what
exactly is so difficult about making open terminations for calibrating
vector network analysers. I can make up loads from scratch that are
good to over a gig without making any real effort. I can achieve
almost as good results making my own shorts, too. But when it comes to
opens, the nice tight dots I\'m seeing with loads and shorts turns into
an ugly streak; several degress of arc at the left hand edge of the
polar display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone got any
suggestions?


THanks,

CD
 
On Sun, 15 Nov 2020 17:44:29 +0000, Cursitor Doom <cd@noreply.com>
wrote:

Gentlemen,

If I may return to the subject of electronics, I\'d like to ask what
exactly is so difficult about making open terminations for calibrating
vector network analysers. I can make up loads from scratch that are
good to over a gig without making any real effort. I can achieve
almost as good results making my own shorts, too. But when it comes to
opens, the nice tight dots I\'m seeing with loads and shorts turns into
an ugly streak; several degress of arc at the left hand edge of the
polar display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone got any
suggestions?


THanks,

CD

I\'m not an RF guy. I don\'t think I\'ve ever seen a VNA, and don\'t
understand Smith charts. So this is just babbling:

If you clean slice off the end of a coax, the little shiny piece of
the inner conductor is visible, and it has capacitance through the air
to the shield and to the universe. But it doesn\'t have inductance,
like the transmission line had. It looks like a lumped capacitor at
the end of a transmission line.

Maybe cut away a little of the dielectric inside the coax, like a
little cylinder or cone-shaped cut at the very end, to neutralize the
external capacitance.

I am surprised that you see the streak at just 1 GHz. I guess VNAs
must be pretty sensitive.

When you cut the coax, be careful to not squash it.






--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard
 
On 2020-11-15 18:44, Cursitor Doom wrote:
Gentlemen,

If I may return to the subject of electronics, I\'d like to ask what
exactly is so difficult about making open terminations for calibrating
vector network analysers. I can make up loads from scratch that are
good to over a gig without making any real effort. I can achieve
almost as good results making my own shorts, too. But when it comes to
opens, the nice tight dots I\'m seeing with loads and shorts turns into
an ugly streak; several degress of arc at the left hand edge of the
polar display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone got any
suggestions?

Looking at my N-calibration set for the HP8753D, the open
is merely a hollow cylinder that screws onto the end connector,
completed by a plug-in piece of plastic with a metal tip that
mates with the centre conductor, so the central conductor ends
much earlier than the screen, but the dielectric extends beyond
it. I hope that\'s clear...

However, if you do a SOL single-port calibration, even with
improvised short, open and load, all three should then end up
as tight dots on the Smith chart. That says nothing about the
quality of the standards.

Jeroen Belleman
 
Am 15.11.20 um 18:44 schrieb Cursitor Doom:
Gentlemen,

If I may return to the subject of electronics, I\'d like to ask what
exactly is so difficult about making open terminations for calibrating
vector network analysers. I can make up loads from scratch that are
good to over a gig without making any real effort. I can achieve
almost as good results making my own shorts, too. But when it comes to
opens, the nice tight dots I\'m seeing with loads and shorts turns into
an ugly streak; several degress of arc at the left hand edge of the
polar display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone got any
suggestions?


THanks,

CD

You may search the archives of the DG8SAQ vector network analyzer.
They had long threads about cal kits.

https://groups.io/g/VNWA

The theme interests me less now , personally. I have a Z51 electronic
cal kit for my R&S ZVB. I caught myself often before, that I ignored
calibration, but VNA accuracy stands and falls with calibration.

Cheers, Gerhard
 
søndag den 15. november 2020 kl. 20.36.36 UTC+1 skrev Jeroen Belleman:
On 2020-11-15 18:44, Cursitor Doom wrote:
Gentlemen,

If I may return to the subject of electronics, I\'d like to ask what
exactly is so difficult about making open terminations for calibrating
vector network analysers. I can make up loads from scratch that are
good to over a gig without making any real effort. I can achieve
almost as good results making my own shorts, too. But when it comes to
opens, the nice tight dots I\'m seeing with loads and shorts turns into
an ugly streak; several degress of arc at the left hand edge of the
polar display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone got any
suggestions?
Looking at my N-calibration set for the HP8753D, the open
is merely a hollow cylinder that screws onto the end connector,
completed by a plug-in piece of plastic with a metal tip that
mates with the centre conductor, so the central conductor ends
much earlier than the screen, but the dielectric extends beyond
it. I hope that\'s clear...

However, if you do a SOL single-port calibration, even with
improvised short, open and load, all three should then end up
as tight dots on the Smith chart. That says nothing about the
quality of the standards.

yeh point of the calibration is to make whatever you use as reference
become it dots
 
On Sunday, November 15, 2020 at 9:44:38 AM UTC-8, Cursitor Doom wrote:

If I may return to the subject of electronics, I\'d like to ask what
exactly is so difficult about making open terminations for calibrating
vector network analysers.
... the nice tight dots I\'m seeing with loads and shorts turns into
an ugly streak; several degress of arc at the left hand edge of the
polar display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for.

A typical solution is to use a unity-gain buffer (emitter follower) to drive a shield
around the node. Some variations (like autotransformer wound inductors to
get around the below-unity voltage gain) can be a nuisance to install and trim, though.
Controlling leakage is a useful side effect.

Inductive strays are harder, but usually a test jig just keeps connections short, and double-shielded
coax isn\'t necessary.
 
On 2020-11-15, Cursitor Doom <cd@noreply.com> wrote:
Gentlemen,

If I may return to the subject of electronics, I\'d like to ask what
exactly is so difficult about making open terminations for calibrating
vector network analysers. I can make up loads from scratch that are
good to over a gig without making any real effort. I can achieve
almost as good results making my own shorts, too. But when it comes to
opens, the nice tight dots I\'m seeing with loads and shorts turns into
an ugly streak; several degress of arc at the left hand edge of the
polar display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone got any
suggestions?

Use the thinnest co-ax you can find. That way the fringe is smaller.

--
Jasen.
 
On 16/11/2020 07:01, Lasse Langwadt Christensen wrote:
søndag den 15. november 2020 kl. 20.36.36 UTC+1 skrev Jeroen Belleman:
On 2020-11-15 18:44, Cursitor Doom wrote:
Gentlemen,

If I may return to the subject of electronics, I\'d like to ask what
exactly is so difficult about making open terminations for calibrating
vector network analysers. I can make up loads from scratch that are
good to over a gig without making any real effort. I can achieve
almost as good results making my own shorts, too. But when it comes to
opens, the nice tight dots I\'m seeing with loads and shorts turns into
an ugly streak; several degress of arc at the left hand edge of the
polar display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone got any
suggestions?
Looking at my N-calibration set for the HP8753D, the open
is merely a hollow cylinder that screws onto the end connector,
completed by a plug-in piece of plastic with a metal tip that
mates with the centre conductor, so the central conductor ends
much earlier than the screen, but the dielectric extends beyond
it. I hope that\'s clear...

However, if you do a SOL single-port calibration, even with
improvised short, open and load, all three should then end up
as tight dots on the Smith chart. That says nothing about the
quality of the standards.

yeh point of the calibration is to make whatever you use as reference
become it dots

No, what you use as the reference should end up measuring as the values
that the cal kit supplier said that the impedances of the standards are.
In most cases they do not say that the standards are ideal (for the
short and open at least), which is why the kits used to come with a
floppy disk with the actual values on it.

Even if they could make an ideal open, there is usually an offset
(length of transmission line) between the reference plane (where the
impedance is measured) and the actual location of the open or short.

If the reference (cal kit) measured as a dot, and the manufacturer of
the reference said that it should be something that is not a dot, then
the calibration has been done wrongly.
 
On Sun, 15 Nov 2020 23:41:31 -0000 (UTC), Jasen Betts
<usenet@revmaps.no-ip.org> wrote:

On 2020-11-15, Cursitor Doom <cd@noreply.com> wrote:
Gentlemen,

If I may return to the subject of electronics, I\'d like to ask what
exactly is so difficult about making open terminations for calibrating
vector network analysers. I can make up loads from scratch that are
good to over a gig without making any real effort. I can achieve
almost as good results making my own shorts, too. But when it comes to
opens, the nice tight dots I\'m seeing with loads and shorts turns into
an ugly streak; several degress of arc at the left hand edge of the
polar display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone got any
suggestions?

Use the thinnest co-ax you can find. That way the fringe is smaller.

There\'s no coax involved here.These are cal standards.
 
On Sun, 15 Nov 2020 20:59:47 +0100, Gerhard Hoffmann <dk4xp@arcor.de>
wrote:


The theme interests me less now , personally. I have a Z51 electronic
cal kit for my R&S ZVB. I caught myself often before, that I ignored
calibration, but VNA accuracy stands and falls with calibration.

My question relates to user calibration rather than instrument
calibration. I don\'t think I\'ve phrased the question very well at all
on re-reading it so I\'ll take another shot at it during the week.
Getting late here now so..... off to bed... ZZZzzzzzzzzzzz
 
On Sun, 15 Nov 2020 17:44:29 +0000, Cursitor Doom <cd@noreply.com>
wrote:

>Gentlemen,

We are not very gentle. You might mean gentile as in non-Jewish:
<https://en.wikipedia.org/wiki/Gentile>

I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone got any
suggestions?

Elsewhere in this thread, you disclosed that the problem is with an
open circuit termination that you have in your possession. Got any
photos? Maker and model number? Is it built something like this?
<https://www.electronics-notes.com/images/vector-network-analyzer-vna-calibration-kit-open-01.svg>
<https://www.electronics-notes.com/articles/test-methods/rf-vector-network-analyzer-vna/how-to-calibrate-vna.php>
Open circuit: A coaxial open circuit standard has to
use an enclosed approach to provide screening and avoid
the pick-up of stray electromagnetic energy. At the open
end of the inner conductor, a frequency-dependent fringing
capacitance is formed. Even if an open standard could
physically be constructed with zero length, the fringing
capacitance would still result. This creates a negative
imaginary part for S11 at higher frequencies as a result
of the capacitive reactance.

I don\'t know of any method of building a termination that will solve
the fringing capacitance problem over a wide bandwidth except to tune
the load by adjusting the center conductor length so that it\'s
resonant with the inherent fringing capacitance at the frequency range
of interest. That will reduce the useful bandwidth of the VNA to a
very narrow frequency range where it will only be accurate within that
range.



--
Jeff Liebermann jeffl@cruzio.com
150 Felker St #D http://www.LearnByDestroying.com
Santa Cruz CA 95060 http://802.11junk.com
Skype: JeffLiebermann AE6KS 831-336-2558
 
Am 16.11.20 um 01:16 schrieb Cursitor Doom:
On Sun, 15 Nov 2020 20:59:47 +0100, Gerhard Hoffmann <dk4xp@arcor.de
wrote:


The theme interests me less now , personally. I have a Z51 electronic
cal kit for my R&S ZVB. I caught myself often before, that I ignored
calibration, but VNA accuracy stands and falls with calibration.

My question relates to user calibration rather than instrument
calibration. I don\'t think I\'ve phrased the question very well at all
on re-reading it so I\'ll take another shot at it during the week.
Getting late here now so..... off to bed... ZZZzzzzzzzzzzz

That thing is for user calibration. You just connect Port1, 2, 3, 4
( I have only 1 & 2) to the box and the USB cable and the machine
does the rest. No more swapping shorts, opens, 50R, throughs etc.
PC3.5 / SMA has an official lifetime of 100 Plug-ins. and for an
user calibration cycle you spend quite a few. Yes, we all stretch that.
The ecal box makes all the necessary connections internally.

<
https://www.rohde-schwarz.com/in/products/test-and-measurement/network-analyzers/network_analyzer_accessories_2_231228.html

Gerhard
 
On Mon, 16 Nov 2020 00:16:08 +0000, Cursitor Doom <cd@noreply.com>
wrote:

My question relates to user calibration rather than instrument
calibration.

User calibration? I don\'t think I\'ve ever had myself calibrated. Does
it hurt?

--
Jeff Liebermann jeffl@cruzio.com
150 Felker St #D http://www.LearnByDestroying.com
Santa Cruz CA 95060 http://802.11junk.com
Skype: JeffLiebermann AE6KS 831-336-2558
 
On 2020-11-16 01:07, Chris Jones wrote:
On 16/11/2020 07:01, Lasse Langwadt Christensen wrote:
søndag den 15. november 2020 kl. 20.36.36 UTC+1 skrev Jeroen
Belleman:
On 2020-11-15 18:44, Cursitor Doom wrote:
Gentlemen,

If I may return to the subject of electronics, I\'d like to ask
what exactly is so difficult about making open terminations for
calibrating vector network analysers. I can make up loads from
scratch that are good to over a gig without making any real
effort. I can achieve almost as good results making my own
shorts, too. But when it comes to opens, the nice tight dots
I\'m seeing with loads and shorts turns into an ugly streak;
several degress of arc at the left hand edge of the polar
display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone
got any suggestions?
Looking at my N-calibration set for the HP8753D, the open is
merely a hollow cylinder that screws onto the end connector,
completed by a plug-in piece of plastic with a metal tip that
mates with the centre conductor, so the central conductor ends
much earlier than the screen, but the dielectric extends beyond
it. I hope that\'s clear...

However, if you do a SOL single-port calibration, even with
improvised short, open and load, all three should then end up as
tight dots on the Smith chart. That says nothing about the
quality of the standards.

yeh point of the calibration is to make whatever you use as
reference become it dots


No, what you use as the reference should end up measuring as the
values that the cal kit supplier said that the impedances of the
standards are. In most cases they do not say that the standards are
ideal (for the short and open at least), which is why the kits used
to come with a floppy disk with the actual values on it.

Even if they could make an ideal open, there is usually an offset
(length of transmission line) between the reference plane (where the
impedance is measured) and the actual location of the open or short.

If the reference (cal kit) measured as a dot, and the manufacturer of
the reference said that it should be something that is not a dot,
then the calibration has been done wrongly.

The purpose of the calibration kit is to show the VNA what an open,
a short and a load look like at the far end of this bit of cable
used to connect to the DUT, so that it can remove the effects of
that bit of cable. You usually want to know what your DUT looks
like at *its* connector, not at the VNA connector.

Jeroen Belleman
 
On 16/11/2020 19:04, Jeroen Belleman wrote:
On 2020-11-16 01:07, Chris Jones wrote:
On 16/11/2020 07:01, Lasse Langwadt Christensen wrote:
søndag den 15. november 2020 kl. 20.36.36 UTC+1 skrev Jeroen
Belleman:
On 2020-11-15 18:44, Cursitor Doom wrote:
Gentlemen,

If I may return to the subject of electronics, I\'d like to ask
what exactly is so difficult about making open terminations for
calibrating vector network analysers. I can make up loads from
scratch that are good to over a gig without making any real
effort. I can achieve almost as good results making my own
shorts, too. But when it comes to opens, the nice tight dots
I\'m seeing with loads and shorts turns into an ugly streak;
several degress of arc at the left hand edge of the polar
display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone
got any suggestions?
Looking at my N-calibration set for the HP8753D, the open is
merely a hollow cylinder that screws onto the end connector,
completed by a plug-in piece of plastic with a metal tip that
mates with the centre conductor, so the central conductor ends
much earlier than the screen, but the dielectric extends beyond
it. I hope that\'s clear...

However, if you do a SOL single-port calibration, even with
improvised short, open and load, all three should then end up as
tight dots on the Smith chart. That says nothing about the
quality of the standards.

yeh point of the calibration is to make whatever you use as
reference become it dots


No, what you use as the reference should end up measuring as the
values that the cal kit supplier said that the impedances of the
standards are. In most cases they do not say that the standards are
ideal (for the short and open at least), which is why the kits used
to come with a floppy disk with the actual values on it.

Even if they could make an ideal open, there is usually an offset
(length of transmission line) between the reference plane (where the
impedance is measured) and the actual location of the open or short.

If the reference (cal kit) measured as a dot, and the manufacturer of
the reference said that it should be something that is not a dot,
then the calibration has been done wrongly.


The purpose of the calibration kit is to show the VNA what an open,
a short and a load look like at the far end of this bit of cable
used to connect to the DUT, so that it can remove the effects of
that bit of cable. You usually want to know what your DUT looks
like at *its* connector, not at the VNA connector.

Agreed, but my point is that most competent manufacturers of O/S/L cal
kits are aware that the standards that they sell are not perfect,
particularly the open, and they usually provide a model (or measurement)
of the actual impedance at the reference plane. Where such a model is
provided and is different from an ideal open, then after performing a
calibration using that standard, and then re-connecting the \"open\"
standard, one would expect the VNA to display the impedance that the
standard is supposed to be, rather than an ideal open.
 
On 2020-11-16 13:18, Chris Jones wrote:
On 16/11/2020 19:04, Jeroen Belleman wrote:
[Snip!]

The purpose of the calibration kit is to show the VNA what an
open, a short and a load look like at the far end of this bit of
cable used to connect to the DUT, so that it can remove the effects
of that bit of cable. You usually want to know what your DUT looks
like at *its* connector, not at the VNA connector.

Agreed, but my point is that most competent manufacturers of O/S/L
cal kits are aware that the standards that they sell are not perfect,
particularly the open, and they usually provide a model (or
measurement) of the actual impedance at the reference plane. Where
such a model is provided and is different from an ideal open, then
after performing a calibration using that standard, and then
re-connecting the \"open\" standard, one would expect the VNA to
display the impedance that the standard is supposed to be, rather
than an ideal open.

Yes, that makes sense. My N cal kit didn\'t come with such data.

Jeroen Belleman
 
On Sunday, November 15, 2020 at 12:44:38 PM UTC-5, Cursitor Doom wrote:
Gentlemen,

If I may return to the subject of electronics, I\'d like to ask what
exactly is so difficult about making open terminations for calibrating
vector network analysers. I can make up loads from scratch that are
good to over a gig without making any real effort. I can achieve
almost as good results making my own shorts, too. But when it comes to
opens, the nice tight dots I\'m seeing with loads and shorts turns into
an ugly streak; several degress of arc at the left hand edge of the
polar display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone got any
suggestions?


THanks,

CD

First off, this calibration \"error\" is going to only effect phase readings on either S21 or S11. Is this several degrees of phase error something that is important to you? If not then move on.
 
On Monday, November 16, 2020 at 11:48:30 AM UTC-5, Brent Locher wrote:
On Sunday, November 15, 2020 at 12:44:38 PM UTC-5, Cursitor Doom wrote:
Gentlemen,

If I may return to the subject of electronics, I\'d like to ask what
exactly is so difficult about making open terminations for calibrating
vector network analysers. I can make up loads from scratch that are
good to over a gig without making any real effort. I can achieve
almost as good results making my own shorts, too. But when it comes to
opens, the nice tight dots I\'m seeing with loads and shorts turns into
an ugly streak; several degress of arc at the left hand edge of the
polar display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone got any
suggestions?


THanks,

CD
First off, this calibration \"error\" is going to only effect phase readings on either S21 or S11. Is this several degrees of phase error something that is important to you? If not then move on.

Actually, I think it only effects S11 (or S22) readings. are your reflection measurements that critical?
 
\"Cursitor Doom\" wrote in message
news:eek:sp2rftu48qtgfkik6uv7fbuepc4e8dpbv@4ax.com...
If I may return to the subject of electronics, I\'d like to ask what
exactly is so difficult about making open terminations for calibrating
vector network analysers. I can make up loads from scratch that are
good to over a gig without making any real effort. I can achieve
almost as good results making my own shorts, too. But when it comes to
opens, the nice tight dots I\'m seeing with loads and shorts turns into
an ugly streak; several degress of arc at the left hand edge of the
polar display. I\'m given to understand this phenomenon is due to
\"fringing capacitance\" and it\'s a PITA to correct for. Anyone got any
suggestions?

May be another way to look at the problem : A VNA calibration kit is *not* a
set of perfect open, shorts and loads, but a set of stable references, as
close as possible to open/short/loads, with precisely measured
characteristics. As far as I know, cal kit are always supplied with cal data
(was on a floppy disk in the good old days... I guess they are now on an
Eeprom inside the electronic cal kit).

Yours,

Robert Lacoste
www.alciom.com
 
Am 16.11.20 um 17:49 schrieb Brent Locher:
On Monday, November 16, 2020 at 11:48:30 AM UTC-5, Brent Locher wrote:

CD
First off, this calibration \"error\" is going to only effect phase readings on either S21 or S11. Is this several degrees of phase error something that is important to you? If not then move on.


Actually, I think it only effects S11 (or S22) readings. are your reflection measurements that critical?

Actually, it affects just about everything via the error correction.
S-parameters, stability criteria ...

Google \"12 term error correction\".

regards, Gerhard
 

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