PLL tricks

[Bill Sloman]

On 29/09/2014 11:38 PM, dagmargoodboat@yahoo.com wrote:

On Sunday, September 28, 2014 10:21:28 PM UTC-4, Bill Sloman wrote:
On Monday, 29 September 2014 10:57:24 UTC+10, dagmarg...@yahoo.com wrote:
Kevin wrote:
dagmargoo...@yahoo.com wrote:
Kevin wrote:

snip

The (38.88 x 4) is just one oscillator. It has to be better
than an LC oscillator at 150MHz locked on to its input of 10 MHz.
Any LC variation give direct frequency modulation, which is way,
way worse than a tank drifting a bit. The output frequency of a
tank must still be exactly equal to its input for a fixed change
in component values. A tank oscillator will have a fixed steady
state shift.

Right. I'm not suggesting a 155.52 MHz L-C oscillator! I mean a
155.52 MHz 5th-overtone quartz crystal oscillator, Q>=70k.

You bang the tank and it rings--so far so good. But if the tank isn't
*perfectly* tuned, it rings off frequency, and the 'ring' cycles wander
off phase, right?

Wrong. It isn't the tank that generates the harmonics, but the non-linear response of the multiplying diode.

a. Who said anything about a multiplying diode?

All frequency multipliers depend on a non-linear element - pretty much
always a diode through it may be burined in a transistor of some sort

b. If you're using an SRD, there's a nearly infinite comb of frequencies in
the output.

But confined to the harmonics of the frequency being used to drive the
multiplier. The Fourier transform of a "Dirac Spike" which has area, but
no width, is all the harmonics up to infinity. Real spikes out
step-recovery diodes do have a finite width which does limit the maximum
frequency.

The tank can only respond to the frequencies present in the output of the multiplier. It's essentially a linear part, so can't do any kind of frequency multiplication or inter-modulation on its own.

The tank is typically driven with a rectangular wave or a pulse.
If you ping a tank, it rings at its natural frequency. Period. (So to speak.)

An L-C tank doesn't know or care when the next pulse is coming; you're
implicitly arguing that it does.

Sadly for your reputation, real multipliers are pinged repeatedly at a
constant frequency. What the tank circuit does is to sum a lot of pings
over a period determined by it's Q (which is a lot longer than the width
of the spike or the interval between spikes if the tank circuit is going
to serve any useful purpose).

What you see coming out is another periodic waveform

You do know that tank multiplied oscillators are industry used standard
methods in achieving low phase noise in preference to PLLs?

That's not his crucial element of ignorance - or rather of knowing something that ain't quite so.

There's a subtlety I'm not familiar with, apparently, that's why I asked,
but I'm very well acquainted with ordinary r.f. frequency multipliers,
since I studied them and invented a new one. We made millions of them.

No, I didn't, though I believe you.

You'd need a varactor, phase-detector, and a feedback loop to keep the
tank tuned perfectly true, AFAICT, introducing additional problems on
several fronts.

The tank does not have to be perfectly tuned. The tuning doesn't effect the
phase noise. It effects the sub harmonics. For example, tuning at 25 deg C,
then moving to -40 deg, might lose you about 6db from a -50dbc close in
subharmonic.

I'm looking at it in the time domain, and can only imagine you must be
thinking of a different topology than I am.

No, you are not looking at it in the time domain, but rather thinking about
it - rather inaccurately - from a time domain perspective.

Actually I *am* thinking about it from a time domain perspective, not to
mention lots of real-life on-the-bench actual experience. You know, with
notes and everything.

Run some simulations and see what happens.

Yes, you ought to.

Version 4
SHEET 1 880 680
WIRE 16 128 -64 128
WIRE 128 128 16 128
WIRE 256 128 192 128
WIRE -64 160 -64 128
WIRE 256 160 256 128
WIRE 336 160 256 160
WIRE 256 240 256 224
WIRE 336 240 256 240
WIRE -64 272 -64 240
WIRE 256 272 256 240
FLAG -64 272 0
FLAG 256 272 0
FLAG 256 128 f_out
FLAG 16 128 input
SYMBOL voltage -64 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 20n 20n 500n 2.5u)
SYMBOL diode 128 112 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL ind 320 144 R0
SYMATTR InstName L1
SYMATTR Value 20ľH
SYMATTR SpiceLine Rser=.1
SYMBOL cap 240 160 R0
SYMATTR InstName C1
SYMATTR Value 1nF
TEXT -98 296 Left 2 !.tran 20u

Try simulating an actual tank circuit, rather than a circuit in which
the LC tank is clamped by the source while the diode is conducting - 20%
of the time in your fatuous example.

Version 4
SHEET 1 880 680
WIRE -240 -128 -320 -128
WIRE 256 -128 -240 -128
WIRE 256 -96 256 -128
WIRE 256 32 256 -16
WIRE 192 80 80 80
WIRE 80 128 80 80
WIRE -320 160 -320 -128
WIRE 256 160 256 128
WIRE 336 160 256 160
WIRE 256 240 256 224
WIRE 336 240 256 240
WIRE 80 256 80 208
WIRE 256 256 256 240
WIRE 256 256 80 256
WIRE -320 272 -320 240
WIRE 256 272 256 256
FLAG -320 272 0
FLAG 256 272 0
FLAG 256 128 f_out
FLAG -240 -128 input
SYMBOL voltage -320 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 2 0 20n 20n 500n 2.5u)
SYMBOL ind 320 144 R0
SYMATTR InstName L1
SYMATTR Value 20ľH
SYMATTR SpiceLine Rser=.1
SYMBOL cap 240 160 R0
SYMATTR InstName C1
SYMATTR Value 1nF
SYMBOL pnp 192 128 M180
SYMATTR InstName Q1
SYMATTR Value 2N3906
SYMBOL voltage 80 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL res 240 -112 R0
SYMATTR InstName R1
SYMATTR Value 200
TEXT -352 296 Left 2 !.tran 2000u

A collector doesn't bugger up the tank circuit when it is conducting.
The Q of the circuit is unnaturally high - 0.1R in a 20uH inductor is
about 1500, which isn't easy to get in real life. You've got to simulate
it for a long time - more than 1500 cycles - before you get a stable output.

I'd say you'd just produced another of your straw men ...

Wenzel's topology changes things, since it makes 2f very accurately from a
sine wave, not relying on a tuned tank. Ditto 3f, I *think*.

(Wenzel's odd-multiplier might be an excellent low-noise way to square-up
the 10MHz reference.)

I think this is the crucial difference to typical f_multipliers:
Wenzel's topology makes a clean, essentially perfect squarewave directly
from a pure sine input, rather than ringing a tank to produce / select a
desired harmonic, and there aren't any off-time infinite-spectrum impulses
to excite it.

That's different, and it's pretty cool.

Producing a square wave creates all the odd harmonics. "Ringing the
tank" doesn't produce anything that wasn't in the drive waveform.

--
Bill Sloman, Sydney

 

[John Larkin]

On Mon, 29 Sep 2014 07:49:29 -0700 (PDT), dagmargoodboat@yahoo.com
wrote:

On Sunday, September 28, 2014 3:16:53 PM UTC-4, Tauno Voipio wrote:
On 28.9.14 19:06, John Larkin wrote:
On Sun, 28 Sep 2014 13:33:50 +0300, Tauno Voipio wrote:
On 28.9.14 11:45, rickman wrote:

In the clock, how do they detect the difference in frequency of the
multiplied VCXO and the Rubidium transition?

The classical method is to sweep the VCXO slightly and observe the
changes in the Rb cell absorption. A servo balances the sweep to
be symmetrical about the sweet point.

IIRC, there was an article about it in an older HP Journal.

https://dl.dropboxusercontent.com/u/53724080/Gear/Efratom.pdf

Thanks John. So the wiggle is done by phase modulation in the
multiplier chain, so the VCXO stays clean.

Interestingly, the phase modulation is only updated at 127Hz.

The VCXO is made with what looks like an old TTL VCO.


Cheers,
James Arthur

It's a remarkably simple and elegant design, with some lucky math
tricks helping. A more modern version must be even simpler.

(But wouldn't come with schematics, or an explanation of how it
works.)


--

John Larkin Highland Technology, Inc

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

 

[John Larkin]

On Mon, 29 Sep 2014 06:38:52 -0700 (PDT), dagmargoodboat@yahoo.com
wrote:

On Sunday, September 28, 2014 10:21:28 PM UTC-4, Bill Sloman wrote:
On Monday, 29 September 2014 10:57:24 UTC+10, dagmarg...@yahoo.com wrote:
Kevin wrote:
dagmargoo...@yahoo.com wrote:
Kevin wrote:

snip

The (38.88 x 4) is just one oscillator. It has to be better
than an LC oscillator at 150MHz locked on to its input of 10 MHz.
Any LC variation give direct frequency modulation, which is way,
way worse than a tank drifting a bit. The output frequency of a
tank must still be exactly equal to its input for a fixed change
in component values. A tank oscillator will have a fixed steady
state shift.

Right. I'm not suggesting a 155.52 MHz L-C oscillator! I mean a
155.52 MHz 5th-overtone quartz crystal oscillator, Q>=70k.

You bang the tank and it rings--so far so good. But if the tank isn't
*perfectly* tuned, it rings off frequency, and the 'ring' cycles wander
off phase, right?

Wrong. It isn't the tank that generates the harmonics, but the non-linear response of the multiplying diode.

a. Who said anything about a multiplying diode?

b. If you're using an SRD, there's a nearly infinite comb of frequencies in
the output.

The tank can only respond to the frequencies present in the output of the multiplier. It's essentially a linear part, so can't do any kind of frequency multiplication or inter-modulation on its own.

The tank is typically driven with a rectangular wave or a pulse.
If you ping a tank, it rings at its natural frequency. Period. (So to speak.)

An L-C tank doesn't know or care when the next pulse is coming; you're
implicitly arguing that it does.

Imagine pinging an LC at, say, F, with its resonant frequency close
to, say 5F. In the time domain, after each ping it rings at its LC
resonant frequency, which is not precisely 5F. And it loses amplitude
between pings. Both make the ringing wobble and add jitter.

In the frequency domain, the LC lets some other harmonics leak through
(3F, 7F, maybe 4F and 6F if present) so the output is spectrally
dirty, ditto phase noise.


--

John Larkin Highland Technology, Inc

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

 

[Lasse Langwadt Christense]

Den mandag den 29. september 2014 22.20.03 UTC+2 skrev John Larkin:

On Tue, 09 Sep 2014 16:54:53 -0700, John Larkin

jlarkin@highlandtechnology.com> wrote:







If I hypothetically had a 10 MHz reference and wanted to lock a 155.52

MHz VCXO to it, the obvious way would be to divide both down to 80 KHz

(the GCD) and drive a phase detector back into the VCXO. But that's a

pretty low frequency to run the PD at; to get picosecond stability, an

ordinary analog phase detector would need better than 1 PPM analog

accuracy, which ain't gonna happen.



I can build an ECL edge-sensitive phase detector that might work, but

80K is still pretty low.



There must be tricks to run the phase detector at a higher frequency.



I could DDS the 155.52 down to 10 MHz, and phase detect at 10 MHz, but

that sounds jitterey to me, and it looks like I can't hit the exact

frequency ratio anyhow.



Since there don't seem to be any good math tricks, it looks like I

should multiply my VCXO price budget by a few hundred x, get a good

SC-cut OCXO, and go with the 80 KHz bang-bang loop.



The FPGA can do most of the work: select the bb flop 80 KHz edge,

close the PID loop digitally, do lock detection and the seek/lock

thing, report diagnostics.



I should also measure the incoming 10 MHz RMS voltage, just for

checking.



Something like this:



https://dl.dropboxusercontent.com/u/53724080/Circuits/Oscillators/Bang_Bang_2.JPG

what does the "time trim" do? shouldn't it be inside the loop?

-Lasse

 

[Kevin Aylward]

wrote in message
news:1722dff5-a386-4e1d-aadb-604fa1f9f4bd@googlegroups.com...

This is bog standard. Obtain a 155.52 MHz VCXO from a (tank) multiplied
up
from 38.88 MHz or 19.44 MHz VCXO.

As someone who has made 908 MHz from 14.4MHz in production with a
multi-stage tank-based multiplier, I still don't understand how a
tank x4 multiplier can ensure John accurate phase.

Its in a loop.

That's the part I don't understand, though Gerhard's Wenzel paper helps.

This thread is too large for me to understand all of it, but my
understanding is that the task is to lock a 155MHz oscillator with an
incoming external 10MHz reference. Thus, the tanked multiplied up
oscillator, will be LF locked to that reference in a PLL. Therefore close in
noise is not important.

>The multiplier topologies I've most seen are class-C amps driving a pulse

There are better ways that are not so temperature sensitive, ie subharmonic
rejection over temperature.

>into an L-C tank. The tank then rings off, until the next pulse arrives.

Yes, but the output can only have a spectrum the same as its input, although
with different amplitudes. There will be zero component due to the tuned
circuit frequency, even if if grossly off tune. The waveform is repetitive,
therefore can only have a discrete spectrum.

You'd need a varactor, phase-detector, and a feedback loop to keep the
tank tuned perfectly true, AFAICT, introducing additional problems on
several fronts.

The tank does not have to be perfectly tuned. The tuning doesn't effect
the
phase noise. It effects the sub harmonics. For example, tuning at 25 deg
C,
then moving to -40 deg, might lose you about 6db from a -50dbc close in
subharmonic.

I'm looking at it in the time domain, and can only imagine you must be
thinking of a different topology than I am.

Well, at a minimum, its two tuned tanks


Kevin Aylward
www.kevinaylward.co.uk
www.anasoft.co.uk - SuperSpice

 

[Kevin Aylward]

"John Larkin" wrote in message
news:qpvi2ap6vjc0ut9gi2fm4ntfne15h0ifot@4ax.com...

On Mon, 29 Sep 2014 06:38:52 -0700 (PDT), dagmargoodboat@yahoo.com
wrote:

On Sunday, September 28, 2014 10:21:28 PM UTC-4, Bill Sloman wrote:
On Monday, 29 September 2014 10:57:24 UTC+10, dagmarg...@yahoo.com
wrote:
Kevin wrote:
dagmargoo...@yahoo.com wrote:
Kevin wrote:

snip

The (38.88 x 4) is just one oscillator. It has to be better
than an LC oscillator at 150MHz locked on to its input of 10 MHz.
Any LC variation give direct frequency modulation, which is way,
way worse than a tank drifting a bit. The output frequency of a
tank must still be exactly equal to its input for a fixed change
in component values. A tank oscillator will have a fixed steady
state shift.

Right. I'm not suggesting a 155.52 MHz L-C oscillator! I mean a
155.52 MHz 5th-overtone quartz crystal oscillator, Q>=70k.

You bang the tank and it rings--so far so good. But if the tank
isn't
*perfectly* tuned, it rings off frequency, and the 'ring' cycles
wander
off phase, right?

Wrong. It isn't the tank that generates the harmonics, but the non-linear
response of the multiplying diode.

a. Who said anything about a multiplying diode?

b. If you're using an SRD, there's a nearly infinite comb of frequencies in
the output.

The tank can only respond to the frequencies present in the output of the
multiplier. It's essentially a linear part, so can't do any kind of
frequency multiplication or inter-modulation on its own.

The tank is typically driven with a rectangular wave or a pulse.
If you ping a tank, it rings at its natural frequency. Period. (So to
speak.)

An L-C tank doesn't know or care when the next pulse is coming; you're
implicitly arguing that it does.

Imagine pinging an LC at, say, F, with its resonant frequency close
to, say 5F. In the time domain, after each ping it rings at its LC
resonant frequency, which is not precisely 5F. And it loses amplitude
between pings. Both make the ringing wobble and add jitter.

I wouldn't say that it really does that, i.e wobble and cause jitter. As
Bill noted, the only thing that comes out is strictly a repetitive waveform.
A single tuned circuit will, as you say, lose amplitude on each high
frequency cycle and therefore have too much subharmonc content, but decent
multipliers usually/should have at least two tuned circuits per stage. This
keeps the amplitude much more constant.

In the frequency domain, the LC lets some other harmonics leak through
(3F, 7F, maybe 4F and 6F if present) so the output is spectrally
dirty, ditto phase noise.

It has a spectrum, but this is essentially no different to, say a clipped
sine wave. If a square wave clock is ok, so will any waveform with harmonic
content be ok. However, subharmonic sensitivity will depend on applications.
I don't actually know what cases it matters on sub harmonics.

Again, as Bill pointed out, the tank needs to be thought of as a linear
system being feed with a sum of sine waves. It can not produce any
frequencies not in the input. Therefor it cannot produce phase noise other
than that of the discrete frequency spectrum of its input. There is nothing
at say Fo + 3.14159. The only additional noise is that due to the usual
component noise of the circuit, an this can be made low by careful design.

A decently designed multiplier, will have its noise, essentially, determined
by its input oscillator noise over all offset frequencies, excepting for the
before mentioned VLF phase shift noise caused by the temperature
co-efficient of the multiplier. Difficult to beat a xtal for temp co.

Kevin Aylward
www.kevinaylward.co.uk
www.anasoft.co.uk - SuperSpice

 

[Kevin Aylward]

"Bill Sloman" wrote in message
news:ff7f5397-ba31-4b10-a851-56f5124ca131@googlegroups.com...

On Monday, 29 September 2014 13:25:28 UTC+10, John Larkin wrote:

On Mon, 29 Sep 2014 01:54:37 +0200, Gerhard Hoffmann
ghf@hoffmann-hochfrequenz.de> wrote:
Am 28.09.2014 um 18:04 schrieb John Larkin:

The X4 multiplier would have to produce edges that are strictly
periodic to picoseconds. Can that be done?

Seems like you don't use the pointers that I provide.
If it has been done it must be possible.

http://www.wenzel.com/wp-content/uploads/Sub-pico-Multiplier.pdf

Double oven! Looks like a lot of work.

Really?

A couple of Peltier junctions, a couple of thermistors, and a couple of
Peltier thermostat chips and you are done. If you want millidegree
stability - or better, 20-bit sigma->delta A/D converters on the
thermistors and a microprocessor (maybe two) to do the number crunching.
It's not rocket science.

Its rather difficult in a 5mm by 3mm package. Typically, oscillator vendors
don't want any frequency in the package other than the xtal one. Chaotic S-D
A/D does all sort of wonderful things on the supply rails.

How did you get the thermistor to accurately track the xtal temperature to
1mK? Holding the xtal to 1mK is actually quite hard to do package wise.

Regular ovenised crystals don't use anything as complicated, but a
double-oven probably needs a something more ambitious.

Well, I don't think any vendor use cooling. Its all one way at 90 deg.

Kevin Aylward
www.kevinaylward.co.uk
www.anasoft.co.uk - SuperSpice

 

[John Larkin]

On Mon, 29 Sep 2014 18:31:22 +0100, "Kevin Aylward"
<ExtractkevinRemove@kevinaylward.co.uk> wrote:

wrote in message
news:1722dff5-a386-4e1d-aadb-604fa1f9f4bd@googlegroups.com...


This is bog standard. Obtain a 155.52 MHz VCXO from a (tank) multiplied
up
from 38.88 MHz or 19.44 MHz VCXO.

As someone who has made 908 MHz from 14.4MHz in production with a
multi-stage tank-based multiplier, I still don't understand how a
tank x4 multiplier can ensure John accurate phase.

Its in a loop.

That's the part I don't understand, though Gerhard's Wenzel paper helps.

This thread is too large for me to understand all of it, but my
understanding is that the task is to lock a 155MHz oscillator with an
incoming external 10MHz reference. Thus, the tanked multiplied up
oscillator, will be LF locked to that reference in a PLL. Therefore close in
noise is not important.

The problem is not to achieve frequency stability, but time stability.
Anything in the signal path that adds time (aka phase) shift as a
function of temperature or aging is bad news in this application.

The multiplier topologies I've most seen are class-C amps driving a pulse

There are better ways that are not so temperature sensitive, ie subharmonic
rejection over temperature.

into an L-C tank. The tank then rings off, until the next pulse arrives.

Yes, but the output can only have a spectrum the same as its input, although
with different amplitudes. There will be zero component due to the tuned
circuit frequency, even if if grossly off tune. The waveform is repetitive,
therefore can only have a discrete spectrum.

Yes, but if it's not a single spectral line, it will become jitter
once it's squared up. Predictable jitter is as bad as random jitter.


--

John Larkin Highland Technology, Inc

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

 

[John Larkin]

On Tue, 09 Sep 2014 16:54:53 -0700, John Larkin
<jlarkin@highlandtechnology.com> wrote:

If I hypothetically had a 10 MHz reference and wanted to lock a 155.52
MHz VCXO to it, the obvious way would be to divide both down to 80 KHz
(the GCD) and drive a phase detector back into the VCXO. But that's a
pretty low frequency to run the PD at; to get picosecond stability, an
ordinary analog phase detector would need better than 1 PPM analog
accuracy, which ain't gonna happen.

I can build an ECL edge-sensitive phase detector that might work, but
80K is still pretty low.

There must be tricks to run the phase detector at a higher frequency.

I could DDS the 155.52 down to 10 MHz, and phase detect at 10 MHz, but
that sounds jitterey to me, and it looks like I can't hit the exact
frequency ratio anyhow.

Since there don't seem to be any good math tricks, it looks like I
should multiply my VCXO price budget by a few hundred x, get a good
SC-cut OCXO, and go with the 80 KHz bang-bang loop.

The FPGA can do most of the work: select the bb flop 80 KHz edge,
close the PID loop digitally, do lock detection and the seek/lock
thing, report diagnostics.

I should also measure the incoming 10 MHz RMS voltage, just for
checking.

Something like this:

https://dl.dropboxusercontent.com/u/53724080/Circuits/Oscillators/Bang_Bang_2.JPG


--

John Larkin Highland Technology, Inc

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

 

[Maynard A. Philbrook Jr.]

In article <efa115ef-62e7-4d84-be29-7a9390397f63@googlegroups.com>,
bill.sloman@gmail.com says...

Thanks for the feedback.

It didn't address your crucial misconception. Kevin probably knows too much about the subject to be able appreciate how you'd got it wrong. I had my nose rubbed in the subject recently, when I was fooling with my low distortion sine-wave oscillator simulations.

--
Bill Sloman, sydney

Low distortion? you'd be lucky if it even oscillated.


Jamie

 

[John Larkin]

On Mon, 29 Sep 2014 13:55:28 -0700 (PDT), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

Den mandag den 29. september 2014 22.20.03 UTC+2 skrev John Larkin:
On Tue, 09 Sep 2014 16:54:53 -0700, John Larkin

jlarkin@highlandtechnology.com> wrote:







If I hypothetically had a 10 MHz reference and wanted to lock a 155.52

MHz VCXO to it, the obvious way would be to divide both down to 80 KHz

(the GCD) and drive a phase detector back into the VCXO. But that's a

pretty low frequency to run the PD at; to get picosecond stability, an

ordinary analog phase detector would need better than 1 PPM analog

accuracy, which ain't gonna happen.



I can build an ECL edge-sensitive phase detector that might work, but

80K is still pretty low.



There must be tricks to run the phase detector at a higher frequency.



I could DDS the 155.52 down to 10 MHz, and phase detect at 10 MHz, but

that sounds jitterey to me, and it looks like I can't hit the exact

frequency ratio anyhow.



Since there don't seem to be any good math tricks, it looks like I

should multiply my VCXO price budget by a few hundred x, get a good

SC-cut OCXO, and go with the 80 KHz bang-bang loop.



The FPGA can do most of the work: select the bb flop 80 KHz edge,

close the PID loop digitally, do lock detection and the seek/lock

thing, report diagnostics.



I should also measure the incoming 10 MHz RMS voltage, just for

checking.



Something like this:



https://dl.dropboxusercontent.com/u/53724080/Circuits/Oscillators/Bang_Bang_2.JPG



what does the "time trim" do? shouldn't it be inside the loop?

-Lasse

That's an adjustable prop delay that lets us tweak the net delay
tempco. I'd expect some single digits of ps per degree C, and we can
muscle that down by reading the LM71, scaling by a cal factor, and
driving the trim dac.

I guess it could be inside the loop, in the right place. If it
contributes any jitter, it is better inside the loop.




--

John Larkin Highland Technology, Inc

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

 

On Monday, September 29, 2014 11:54:17 AM UTC-4, John Larkin wrote:

On Mon, 29 Sep 2014 06:38:52 -0700 (PDT), dagmargoodboat@yahoo.com

wrote:



On Sunday, September 28, 2014 10:21:28 PM UTC-4, Bill Sloman wrote:

On Monday, 29 September 2014 10:57:24 UTC+10, dagmarg...@yahoo.com wrote:

Kevin wrote:

dagmargoo...@yahoo.com wrote:

Kevin wrote:



snip



The (38.88 x 4) is just one oscillator. It has to be better

than an LC oscillator at 150MHz locked on to its input of 10 MHz.

Any LC variation give direct frequency modulation, which is way,

way worse than a tank drifting a bit. The output frequency of a

tank must still be exactly equal to its input for a fixed change

in component values. A tank oscillator will have a fixed steady

state shift.



Right. I'm not suggesting a 155.52 MHz L-C oscillator! I mean a

155.52 MHz 5th-overtone quartz crystal oscillator, Q>=70k.



You bang the tank and it rings--so far so good. But if the tank isn't

*perfectly* tuned, it rings off frequency, and the 'ring' cycles wander

off phase, right?



Wrong. It isn't the tank that generates the harmonics, but the non-linear response of the multiplying diode.



a. Who said anything about a multiplying diode?



b. If you're using an SRD, there's a nearly infinite comb of frequencies in

the output....

On Monday, September 29, 2014 11:54:17 AM UTC-4, John Larkin wrote:

On Mon, 29 Sep 2014 06:38:52 -0700 (PDT), dagmargoo...@yahoo.com wrote:
On Sunday, September 28, 2014 10:21:28 PM UTC-4, Bill Sloman wrote:
On Monday, 29 September 2014 10:57:24 UTC+10, dagmarg...@yahoo.com wrote:

Right. I'm not suggesting a 155.52 MHz L-C oscillator! I mean a
155.52 MHz 5th-overtone quartz crystal oscillator, Q>=70k.

You bang the tank and it rings--so far so good. But if the tank isn't
*perfectly* tuned, it rings off frequency, and the 'ring' cycles wander
off phase, right?

Wrong. It isn't the tank that generates the harmonics, but the non-linear response of the multiplying diode.

a. Who said anything about a multiplying diode?

b. If you're using an SRD, there's a nearly infinite comb of frequencies in
the output.

The tank can only respond to the frequencies present in the output of the multiplier. It's essentially a linear part, so can't do any kind of frequency multiplication or inter-modulation on its own.

The tank is typically driven with a rectangular wave or a pulse.
If you ping a tank, it rings at its natural frequency. Period. (So to speak.)

An L-C tank doesn't know or care when the next pulse is coming; you're
implicitly arguing that it does.

Imagine pinging an LC at, say, F, with its resonant frequency close
to, say 5F. In the time domain, after each ping it rings at its LC
resonant frequency, which is not precisely 5F. And it loses amplitude
between pings. Both make the ringing wobble and add jitter.

Yes, you've repeated my argument.

Bill doesn't get it. So I supplied a sim file, and he still doesn't get it.
Instead he posts a modified sim with horrible sidebands and phase noise,
as proof it doesn't happen.

Communicating with the written word is remarkably difficult. I don't think it
would be this hard in person.

In the frequency domain, the LC lets some other harmonics leak through
(3F, 7F, maybe 4F and 6F if present) so the output is spectrally
dirty, ditto phase noise.

Cheers,
James Arthur

 

On Monday, September 29, 2014 11:29:41 AM UTC-4, Bill Sloman wrote:

On 29/09/2014 11:38 PM, dagmargoo...@yahoo.com wrote:
On Sunday, September 28, 2014 10:21:28 PM UTC-4, Bill Sloman wrote:
On Monday, 29 September 2014 10:57:24 UTC+10, dagmarg...@yahoo.com wrote:
Kevin wrote:
dagmargoo...@yahoo.com wrote:
Kevin wrote:

snip

The (38.88 x 4) is just one oscillator. It has to be better
than an LC oscillator at 150MHz locked on to its input of 10 MHz.
Any LC variation give direct frequency modulation, which is way,
way worse than a tank drifting a bit. The output frequency of a
tank must still be exactly equal to its input for a fixed change
in component values. A tank oscillator will have a fixed steady
state shift.

Right. I'm not suggesting a 155.52 MHz L-C oscillator! I mean a
155.52 MHz 5th-overtone quartz crystal oscillator, Q>=70k.

You bang the tank and it rings--so far so good. But if the tank isn't
*perfectly* tuned, it rings off frequency, and the 'ring' cycles wander
off phase, right?

Wrong. It isn't the tank that generates the harmonics, but the non-linear response of the multiplying diode.

a. Who said anything about a multiplying diode?

All frequency multipliers depend on a non-linear element - pretty much
always a diode through it may be burined in a transistor of some sort

b. If you're using an SRD, there's a nearly infinite comb of frequencies in
the output.

But confined to the harmonics of the frequency being used to drive the
multiplier. The Fourier transform of a "Dirac Spike" which has area, but
no width, is all the harmonics up to infinity. Real spikes out
step-recovery diodes do have a finite width which does limit the maximum
frequency.

The tank can only respond to the frequencies present in the output of the multiplier. It's essentially a linear part, so can't do any kind of frequency multiplication or inter-modulation on its own.

The tank is typically driven with a rectangular wave or a pulse.
If you ping a tank, it rings at its natural frequency. Period. (So to speak.)

An L-C tank doesn't know or care when the next pulse is coming; you're
implicitly arguing that it does.

Sadly for your reputation, real multipliers are pinged repeatedly at a
constant frequency. What the tank circuit does is to sum a lot of pings
over a period determined by it's Q (which is a lot longer than the width
of the spike or the interval between spikes if the tank circuit is going
to serve any useful purpose).

My reputation's not in danger. Your understanding of real multipliers is
in great danger of being improved, however.

What you see coming out is another periodic waveform

You do know that tank multiplied oscillators are industry used standard
methods in achieving low phase noise in preference to PLLs?

That's not his crucial element of ignorance - or rather of knowing something that ain't quite so.

There's a subtlety I'm not familiar with, apparently, that's why I asked,
but I'm very well acquainted with ordinary r.f. frequency multipliers,
since I studied them and invented a new one. We made millions of them.

No, I didn't, though I believe you.

You'd need a varactor, phase-detector, and a feedback loop to keep the
tank tuned perfectly true, AFAICT, introducing additional problems on
several fronts.

The tank does not have to be perfectly tuned. The tuning doesn't effect the
phase noise. It effects the sub harmonics. For example, tuning at 25 deg C,
then moving to -40 deg, might lose you about 6db from a -50dbc close in
subharmonic.

I'm looking at it in the time domain, and can only imagine you must be
thinking of a different topology than I am.

No, you are not looking at it in the time domain, but rather thinking about
it - rather inaccurately - from a time domain perspective.

Actually I *am* thinking about it from a time domain perspective, not to
mention lots of real-life on-the-bench actual experience. You know, with
notes and everything.

Run some simulations and see what happens.

Yes, you ought to.

Version 4
SHEET 1 880 680
WIRE 16 128 -64 128
WIRE 128 128 16 128
WIRE 256 128 192 128
WIRE -64 160 -64 128
WIRE 256 160 256 128
WIRE 336 160 256 160
WIRE 256 240 256 224
WIRE 336 240 256 240
WIRE -64 272 -64 240
WIRE 256 272 256 240
FLAG -64 272 0
FLAG 256 272 0
FLAG 256 128 f_out
FLAG 16 128 input
SYMBOL voltage -64 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 20n 20n 500n 2.5u)
SYMBOL diode 128 112 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL ind 320 144 R0
SYMATTR InstName L1
SYMATTR Value 20�H
SYMATTR SpiceLine Rser=.1
SYMBOL cap 240 160 R0
SYMATTR InstName C1
SYMATTR Value 1nF
TEXT -98 296 Left 2 !.tran 20u

Try simulating an actual tank circuit, rather than a circuit in which
the LC tank is clamped by the source while the diode is conducting - 20%
of the time in your fatuous example.

I chose that example deliberately, to illustrate quite clearly that the
next excitation pulse does not perfectly coincide with the tank waveform
if the tank is off-tune.

It's also not far off *actual* multiplier circuits driven from a
transistor collector. The Efratom rubidium standard John posted uses
a similar scheme.

Last, a switched current source has the same problem, just harder to
spot by inspection.

IOW it's not the slightest bit fatuous. You're way out of bounds.

Version 4
SHEET 1 880 680
WIRE -240 -128 -320 -128
WIRE 256 -128 -240 -128
WIRE 256 -96 256 -128
WIRE 256 32 256 -16
WIRE 192 80 80 80
WIRE 80 128 80 80
WIRE -320 160 -320 -128
WIRE 256 160 256 128
WIRE 336 160 256 160
WIRE 256 240 256 224
WIRE 336 240 256 240
WIRE 80 256 80 208
WIRE 256 256 256 240
WIRE 256 256 80 256
WIRE -320 272 -320 240
WIRE 256 272 256 256
FLAG -320 272 0
FLAG 256 272 0
FLAG 256 128 f_out
FLAG -240 -128 input
SYMBOL voltage -320 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 2 0 20n 20n 500n 2.5u)
SYMBOL ind 320 144 R0
SYMATTR InstName L1
SYMATTR Value 20�H
SYMATTR SpiceLine Rser=.1
SYMBOL cap 240 160 R0
SYMATTR InstName C1
SYMATTR Value 1nF
SYMBOL pnp 192 128 M180
SYMATTR InstName Q1
SYMATTR Value 2N3906
SYMBOL voltage 80 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL res 240 -112 R0
SYMATTR InstName R1
SYMATTR Value 200
TEXT -352 296 Left 2 !.tran 2000u

A collector doesn't bugger up the tank circuit when it is conducting.
The Q of the circuit is unnaturally high - 0.1R in a 20uH inductor is
about 1500, which isn't easy to get in real life. You've got to simulate
it for a long time - more than 1500 cycles - before you get a stable output.

I'd say you'd just produced another of your straw men ...

Did you bother looking at the irregular spacing of your circuit's output
peaks? 810nS, 910nS, 810nS.

That's 100nS jitter. Q.E.D.

But thanks for the posturing (and the insults). What amazes me, if I might
digress, is how you're so confident.

Wenzel's topology changes things, since it makes 2f very accurately from a
sine wave, not relying on a tuned tank. Ditto 3f, I *think*.
(Wenzel's odd-multiplier might be an excellent low-noise way to square-up
the 10MHz reference.)

I think this is the crucial difference to typical f_multipliers:
Wenzel's topology makes a clean, essentially perfect squarewave directly
from a pure sine input, rather than ringing a tank to produce / select a
desired harmonic, and there aren't any off-time infinite-spectrum impulses
to excite it.

That's different, and it's pretty cool.

Producing a square wave creates all the odd harmonics.

Yes.

"Ringing the tank" doesn't produce anything that wasn't in the
drive waveform.

Absolutely FALSE.

Cheers,
James Arthur

 

[Maynard A. Philbrook Jr.]

In article <fvjj2a923vrq61dpd76s4g7ktac8gq98c5@4ax.com>,
jlarkin@highlandtechnology.com says...

what does the "time trim" do? shouldn't it be inside the loop?

-Lasse

That's an adjustable prop delay that lets us tweak the net delay
tempco. I'd expect some single digits of ps per degree C, and we can
muscle that down by reading the LM71, scaling by a cal factor, and
driving the trim dac.

I guess it could be inside the loop, in the right place. If it
contributes any jitter, it is better inside the loop.




--

John Larkin Highland Technology, Inc

I've been following this thread and find it interesting
in many parts, especially the BB PD, I was familiar with it but
I never knew that was the acronym for it."Bang Bang" that is.

Years ago I modified a pre-existing PLL that used a BB PD and
past the output pairs to a uC where I was looking for and forcing
a even alternating output. The output aided, not replaced, the
control voltage for a VCO. This help get the PLL to bring the VCO
on target on one end of the spectrum, due to lack of gain the PLL
loop PD.

Anyway, I was wondering if you plan on maintaining the control loop
signal to the VXO at the current state if you lose the GPS for a
short time? or are you depending on the reference from the GPS receiver
to do that for you if signal is lost? This is something we had to do
at the lab to maintain a 1 Mhz reference to the production floor.

Jamie

 

[John Larkin]

On Mon, 29 Sep 2014 19:44:38 -0400, "Maynard A. Philbrook Jr."
<jamie_ka1lpa@charter.net> wrote:

In article <fvjj2a923vrq61dpd76s4g7ktac8gq98c5@4ax.com>,
jlarkin@highlandtechnology.com says...
what does the "time trim" do? shouldn't it be inside the loop?

-Lasse

That's an adjustable prop delay that lets us tweak the net delay
tempco. I'd expect some single digits of ps per degree C, and we can
muscle that down by reading the LM71, scaling by a cal factor, and
driving the trim dac.

I guess it could be inside the loop, in the right place. If it
contributes any jitter, it is better inside the loop.




--

John Larkin Highland Technology, Inc

I've been following this thread and find it interesting
in many parts, especially the BB PD, I was familiar with it but
I never knew that was the acronym for it."Bang Bang" that is.

Years ago I modified a pre-existing PLL that used a BB PD and
past the output pairs to a uC where I was looking for and forcing
a even alternating output. The output aided, not replaced, the
control voltage for a VCO. This help get the PLL to bring the VCO
on target on one end of the spectrum, due to lack of gain the PLL
loop PD.

Anyway, I was wondering if you plan on maintaining the control loop
signal to the VXO at the current state if you lose the GPS for a
short time? or are you depending on the reference from the GPS receiver
to do that for you if signal is lost? This is something we had to do
at the lab to maintain a 1 Mhz reference to the production floor.

Jamie

I can talk to the customer about this. Losing the 10 MHz and
especially the 1 PPS would be a big deal. I think they would suspend
operations until everything was fixed.

The easiest thing to do would be to go back into acquire mode if we
lose 10 MHz. I suppose we could freeze the VCXO DAC value while the
10M is down... why not? But when it comes back up, we'll have to do
the cold-start acquire-and-lock sequence.


--

John Larkin Highland Technology, Inc

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

 

On Monday, September 29, 2014 10:48:38 PM UTC-4, Bill Sloman wrote:

On 30/09/2014 11:51 AM, dagmargoo...@yahoo.com wrote:
On Monday, September 29, 2014 11:54:17 AM UTC-4, John Larkin wrote:
On Mon, 29 Sep 2014 06:38:52 -0700 (PDT), dagmargoo...@yahoo.com
wrote:
On Sunday, September 28, 2014 10:21:28 PM UTC-4, Bill Sloman wrote:

The tank can only respond to the frequencies present in the output of the multiplier. It's essentially a linear
part, so can't do any kind of frequency multiplication or inter-modulation on its own.

The tank is typically driven with a rectangular wave or a pulse.
If you ping a tank, it rings at its natural frequency. Period. (So to speak.)

An L-C tank doesn't know or care when the next pulse is coming; you're
implicitly arguing that it does.

Imagine pinging an LC at, say, F, with its resonant frequency close
to, say 5F. In the time domain, after each ping it rings at its LC
resonant frequency, which is not precisely 5F. And it loses amplitude
between pings. Both make the ringing wobble and add jitter.

Yes, you've repeated my argument.

Bill doesn't get it. So I supplied a sim file, and he still doesn't get it.

The sim file simulates a a high-Q tank circuit whose natural resonance
is heavily damped by the forward impedance of the diode and the voltage
source for 20% of the time - the 0.5usec that the drive current is on in
the 2.5usec period.

It's not simulating anything useful.

Useful? For Pete's sake, it's pretty close to what people do in real life
multipliers.

Instead he posts a modified sim with horrible sidebands and phase noise,
as proof it doesn't happen.

Did you run an DFT on the stable output after it had settled down? I
didn't - it was after midnight and I wanted to go to bed.

I've now done it - a DFT on the stretch from 2msec to 10msec, with a
Blackman-Harris window.

The strongest line was at 1.2MHz (the third harmonic of the forcing
current) at -14dB, with 800kHz second at -22dB, 400kHz third at -32dB
and 1.6MHz fourth at -35dB.

There is a peak in the noise floor at 1.125MHz - the resonant frequency
of the tank circuit, but it's at -87dB - and it reflects the noise
injected by the rounding error in the numerical modelling. Real-life
noise levels would be rather lower.

You need to scrape the egg of your face and start thinking, rather than
banging kerosene cans against your chest.

Communicating with the written word is remarkably difficult. I don't think it
would be this hard in person.

Probably not. The phrase "let's see what it really looks like" does
avoid a lot of foolish posturing.

You're lecturing someone who has actually done this, and you don't know
what you're about.

In the frequency domain, the LC lets some other harmonics leak through
(3F, 7F, maybe 4F and 6F if present) so the output is spectrally
dirty, ditto phase noise.

Run the simulation for yourself and do the DFT. 3F is dominant - as I've
mentioned, followed by 2F, F and 4F. 6F and 7F are the next lowest peaks.

Of course I ran the FFT, and I looked at the sidebands. You're blithely
assuming everyone else is dumber than you.

That you can look at the spectrum and not see the problem is why I posted
an example (and description) in the time domain--to make it plain to every
'scope driver on the planet--but which so far only John has understood.

Just look at YOUR OWN CIRCUIT's zero-crossing spacings. They're AWFUL.

This may strike you as "spectrally dirty" and the zero crossings will
presumably be all over the shop, but an intelligent designer would have
tuned his tank circuit rather closer to a specific harmonic than you have.

Well that's been my whole bleeping point. The thing you said didn't
matter--tank-tuning--does matter, doesn't it?

Which now you admit, but suggest it's my fault for not tuning the tank
better? THAT WAS THE POINT. IF THE TANK IS OFF-TUNE, THE ZERO CROSSINGS
AREN'T *EXACTLY* WHERE YOU WANT THEM.

Then you try to suggest it's okay. Tell that to John's customers when
they try firing their lasers off those zero-crossings!

I chose an exaggerated example, you quibbled about extraneous stuff, ran
your own sim, and still argue.

And presume to lecture. Simply amazing.


Cheers,
James Arthur

 

[Bill Sloman]

On 30/09/2014 3:42 AM, Kevin Aylward wrote:

"Bill Sloman" wrote in message
news:ff7f5397-ba31-4b10-a851-56f5124ca131@googlegroups.com...

On Monday, 29 September 2014 13:25:28 UTC+10, John Larkin wrote:
On Mon, 29 Sep 2014 01:54:37 +0200, Gerhard Hoffmann
ghf@hoffmann-hochfrequenz.de> wrote:
Am 28.09.2014 um 18:04 schrieb John Larkin:

The X4 multiplier would have to produce edges that are strictly
periodic to picoseconds. Can that be done?

Seems like you don't use the pointers that I provide.
If it has been done it must be possible.

http://www.wenzel.com/wp-content/uploads/Sub-pico-Multiplier.pdf

Double oven! Looks like a lot of work.

Really?

A couple of Peltier junctions, a couple of thermistors, and a couple
of Peltier thermostat chips and you are done. If you want millidegree
stability - or better, 20-bit sigma->delta A/D converters on the
thermistors and a microprocessor (maybe two) to do the number
crunching. It's not rocket science.

Its rather difficult in a 5mm by 3mm package.

Joerg could probably manage it, but not for only eight packages.

John would presumably build a double oven around a 5mm by 3mm package

Typically, oscillator vendors don't want any frequency in the package
other than the xtal one. Chaotic S-D A/D does all sort of wonderful
things on the supply rails.

I had the same problem with my millidegree temperature controller, and
really didn't want to use a switching driver to control the current
through the Peltier junction, but used careful analog design to confine
the switching currents to a very small patch of printed circuit board.

During testing the engineer who finished the job reverted to the linear
current drive we'd put together for the initial testing and development
and could not see any difference in performance.

Sloman A.W., Buggs P., Molloy J., and Stewart D. “A
microcontroller-based driver to stabilise the temperature of an optical
stage to 1mK in the range 4C to 38C, using a Peltier heat pump and a
thermistor sensor” Measurement Science and Technology, 7 1653-64 (1996)

How did you get the thermistor to accurately track the xtal temperature
to 1mK? Holding the xtal to 1mK is actually quite hard to do package wise.

Put the thermistor as close as possible to the crystal and the Peltier
junction - in the aluminium plate/heat-spreader that couples the two
together. Double ovens help there - they minimise the temperature
gradients in the inner oven.

Regular ovenised crystals don't use anything as complicated, but a
double-oven probably needs a something more ambitious.

Well, I don't think any vendor use cooling. Its all one way at 90 deg.

Peltier junctions are expensive, but having the crystal at 25C means
that it won't age as fast.

--
Bill Sloman, Sydney

 

[David Platt]

In article <mlrj2a1r1h8kres22eqs2n0lssrnmocfq1@4ax.com>,
John Larkin <jlarkin@highlandtechnology.com> wrote:

Anyway, I was wondering if you plan on maintaining the control loop
signal to the VXO at the current state if you lose the GPS for a
short time? or are you depending on the reference from the GPS receiver
to do that for you if signal is lost? This is something we had to do
at the lab to maintain a 1 Mhz reference to the production floor.

I can talk to the customer about this. Losing the 10 MHz and
especially the 1 PPS would be a big deal. I think they would suspend
operations until everything was fixed.

The easiest thing to do would be to go back into acquire mode if we
lose 10 MHz. I suppose we could freeze the VCXO DAC value while the
10M is down... why not? But when it comes back up, we'll have to do
the cold-start acquire-and-lock sequence.

Losing GPS lock is a not-uncommon occurrance, in industrial-
timing applications (e.g. cellphone tower timing controllers). It's
quite common to have a secondary or even tertiary timing source to
"tide you through" when the GPS signal and the resulting PPS go
"off-line" for a while. Cellphone-tower timing-and-frequency
controllers often include(d) a rubidium oscillator for this
purpose... and a bunch of these have come on the "used" market over
the past few years (many from China) as a result of cell-tower
upgrades.

I recently fixed up (and sold off at a ham flea market) a set of
ex-navy 5 MHz time-and-frequency distribution boxes our club
inherited from a silent key. They were pretty impressive...
high-stability ovenized VXCOs that could phase-lock to an external 1
MHz or 5 MHz signal (I fed 'em from my GPSDO), and then "freeze" the
VXCO voltage the moment the phase-lock reference signal was lost. The
drift, even after an hour or more, was quite small. Quite handy for
field applications (they could run on AC or on external DC or on an
internal 12-volt pack). The two guys who eagerly bought them clearly
knew what they were getting... microwave enthusiasts, I suspect. If I
didn't already have a GPSDO and a rubidium I'd have bought one of them
from the club myself.

What with random electronic noise, kids playing with "GPS jammers",
the occasional solar storm, and so forth, I think you're likely to
find the need for a local high-stability "holdover" time/PPS source to
be quite important in your application.

 

[Bill Sloman]

On 30/09/2014 11:51 AM, dagmargoodboat@yahoo.com wrote:

On Monday, September 29, 2014 11:54:17 AM UTC-4, John Larkin wrote:
On Mon, 29 Sep 2014 06:38:52 -0700 (PDT), dagmargoodboat@yahoo.com
wrote:
On Sunday, September 28, 2014 10:21:28 PM UTC-4, Bill Sloman wrote:
On Monday, 29 September 2014 10:57:24 UTC+10, dagmarg...@yahoo.com wrote:
Kevin wrote:
dagmargoo...@yahoo.com wrote:
Kevin wrote:

snip

The (38.88 x 4) is just one oscillator. It has to be better
than an LC oscillator at 150MHz locked on to its input of 10 MHz.
Any LC variation give direct frequency modulation, which is way,
way worse than a tank drifting a bit. The output frequency of a
tank must still be exactly equal to its input for a fixed change
in component values. A tank oscillator will have a fixed steady
state shift.

Right. I'm not suggesting a 155.52 MHz L-C oscillator! I mean a
155.52 MHz 5th-overtone quartz crystal oscillator, Q>=70k.

You bang the tank and it rings--so far so good. But if the tank isn't
*perfectly* tuned, it rings off frequency, and the 'ring' cycles wander
off phase, right?

Wrong. It isn't the tank that generates the harmonics, but the non-linear response of the multiplying diode.

a. Who said anything about a multiplying diode?

b. If you're using an SRD, there's a nearly infinite comb of frequencies in
the output....

Right. I'm not suggesting a 155.52 MHz L-C oscillator! I mean a
155.52 MHz 5th-overtone quartz crystal oscillator, Q>=70k.

You bang the tank and it rings--so far so good. But if the tank isn't
*perfectly* tuned, it rings off frequency, and the 'ring' cycles wander
off phase, right?

Wrong. It isn't the tank that generates the harmonics, but the non-linear response of the multiplying diode.

a. Who said anything about a multiplying diode?

b. If you're using an SRD, there's a nearly infinite comb of frequencies in
the output.

The tank can only respond to the frequencies present in the output of the multiplier. It's essentially a linear
part, so can't do any kind of frequency multiplication or inter-modulation on its own.

The tank is typically driven with a rectangular wave or a pulse.
If you ping a tank, it rings at its natural frequency. Period. (So to speak.)

An L-C tank doesn't know or care when the next pulse is coming; you're
implicitly arguing that it does.

Imagine pinging an LC at, say, F, with its resonant frequency close
to, say 5F. In the time domain, after each ping it rings at its LC
resonant frequency, which is not precisely 5F. And it loses amplitude
between pings. Both make the ringing wobble and add jitter.

Yes, you've repeated my argument.

Bill doesn't get it. So I supplied a sim file, and he still doesn't get it.

The sim file simulates a a high-Q tank circuit whose natural resonance
is heavily damped by the forward impedance of the diode and the voltage
source for 20% of the time - the 0.5usec that the drive current is on in
the 2.5usec period.

It's not simulating anything useful.

Instead he posts a modified sim with horrible sidebands and phase noise,
as proof it doesn't happen.

Did you run an DFT on the stable output after it had settled down? I
didn't - it was after midnight and I wanted to go to bed.

I've now done it - a DFT on the stretch from 2msec to 10msec, with a
Blackman-Harris window.

The strongest line was at 1.2MHz (the third harmonic of the forcing
current) at -14dB, with 800kHz second at -22dB, 400kHz third at -32dB
and 1.6MHz fourth at -35dB.

There is a peak in the noise floor at 1.125MHz - the resonant frequency
of the tank circuit, but it's at -87dB - and it reflects the noise
injected by the rounding error in the numerical modelling. Real-life
noise levels would be rather lower.

You need to scrape the egg of your face and start thinking, rather than
banging kerosene cans against your chest.

Communicating with the written word is remarkably difficult. I don't think it
would be this hard in person.

Probably not. The phrase "let's see what it really looks like" does
avoid a lot of foolish posturing.

In the frequency domain, the LC lets some other harmonics leak through
(3F, 7F, maybe 4F and 6F if present) so the output is spectrally
dirty, ditto phase noise.

Run the simulation for yourself and do the DFT. 3F is dominant - as I've
mentioned, followed by 2F, F and 4F. 6F and 7F are the next lowest peaks.

This may strike you as "spectrally dirty" and the zero crossings will
presumably be all over the shop, but an intelligent designer would have
tuned his tank circuit rather closer to a specific harmonic than you have.

Switching the period of the excitation pulse to 2.67usec and increasing
the emitter resistor to 1K gives the third harmonic at -7dB and 2F and
and 4F at - 40dB. This shows up on the waveform as the peak-to-peak
amplitude wobbling between +/-690mV and +/-660mV (which isn't giving the
transistor a lot of head-room - not that it made much difference when I
gave it more, as 3F just moved up to -6dB).

If John was working with a linear phase detector this sort of
fluctuation wouldn't matter. A bang-bang detector might not be so forgiving.

--
Bill Sloman, Sydney

 

[Bill Sloman]

On 30/09/2014 7:27 AM, Maynard A. Philbrook Jr. wrote:

In article <efa115ef-62e7-4d84-be29-7a9390397f63@googlegroups.com>,
bill.sloman@gmail.com says...
Thanks for the feedback.

It didn't address your crucial misconception. Kevin probably knows

too much about the subject to be able appreciate how you'd got it wrong.
I had my nose rubbed in the subject recently, when I was fooling with my
low distortion sine-wave oscillator simulations.

Low distortion? you'd be lucky if it even oscillated.

Your intuition is probably leading you astray. The simulation oscillates
happily enough. And my clever friend in London does seem to share my
opinion that the real thing will oscillate if I ever get around to
soldering the bits together.

--
Bill Sloman, Sydney