PLL tricks

On 19/09/2014 11:38 PM, dagmargoodboat@yahoo.com wrote:
On Friday, September 12, 2014 7:28:21 PM UTC-4, Phil Hobbs wrote:
On 9/12/2014 3:58 PM, dagmargoo...@yahoo.com wrote:
On Friday, September 12, 2014 2:11:10 PM UTC-4, Phil Hobbs wrote:
On 09/11/2014 10:59 PM, dagmargoo...@yahoo.com wrote:
On Thursday, September 11, 2014 8:24:15 PM UTC-4, John Larkin wrote:

Equations seldom design stuff.

Yep. Equations usually describe stuff someone already did, help
others duplicate, and sometimes refine it.

That's unduly pessimistic. Before designing an instrument, I always
calculate how good it _could_ be, from first principles where possible.

That way I can (a) select the best possible approach, and (b) know when
it isn't there yet. I couldn't do my job without crunching a fair bit
of math. My rule of thumb is that the final result gets within 1 dB of
the theory most of the time, and within 3 dB almost always (i.e. unless
I've made a math blunder or failed to think of some physical effect that
turns out to be important).

Granted, in your situation.

More often I'm trying to solve novel problems. A long time ago, it was
making clean BPSK SS UHF cheaply from a cheap crystal, at micropower,
fast-settling, with a lot of other constraints. There simply isn't an
equation that outputs a novel topology.

Quite so. OTOH calculating the fundamental limits as a function of the
crystal Q and transistor noise can be pretty illuminating. A few years
ago when I was building stabilized lasers for downhole applications, I
had to go into a lot of that stuff, and learned a lot. (Leeson's
equation for oscillator noise is sort of the electronic analogue of the
Schawlow-Townes minimum line width of a laser.)

If you can't calculate how good it _could_ be, how do you know when
you're done?

Right, but that's usually a later stage, isn't it?

To answer more directly, here's my process here--we already know (I think)
that oscillator phase performance is limited by resonator Q and flicker
noise in the BJT, and that crystals have the highest Q available in this
frequency range.

Robert J. Matthys wrote extensively about VHF crystal oscillator design
in RF Design in two articles in the '80s. (buried in my dungeon somewhere)
IIRC, the jist of it was that very, very high performance was attainable
at VHF using over-tone crystals, the trick being not to spoil the
crystal's inherent Q, which most people do.

So, as a first approximation, we 'know' the lowest phase-noise solution is
likely to involve a quartz crystal and the best transistor we can find.

We also know that multiplying up x1944 from 80KHz--essentially John's
problem--is a mother (of invention), and that a lower multiplier would
help a great deal on several fronts.

All of that qualitative logic led me to propose:

Reference Generator Master Oscillator
.------------------------------. .------------------------.
| VCXO | 720 | VCXO |
| .---. .---. .---. .----. | KHz | .---. .---. .---. |
10MHz >---| x |->|LPF|->| ~ |-+-|/125|--------->| X |->|LPF|->| ~ |-+---> 155.52MHz
| '---' '---' '---' | '----' | | '---' '---' '---' | |
| ^ 90 MHz | | | ^ .------. | |
| '-----------------' | | '----| /216 |-----' |
'------------------------------' | '------' |
'-----------------------'

The reference generator's phase detector runs at 10MHz and its VCXO
output is at least as good as the Master Oscillator's VCXO, so this
block doesn't, to a first order, limit performance.

It degrades it a bit. There are two phase detectors in series. There's
nothing to stop John running a third phase detector at 80KHz (between
the 155.52MHz VCXO and the external 10MHz and feeding that into the
block you've labelled LPF which probably ought to include an integrator)
and organising the system so that the third phase detector dominates
the feedback to the 155.52MHZ VCXO at very low frequencies.

I tend to think that using a DDS or a fractional-N system with a product
phase-detector at 10MHz is going to be simpler and cheaper than
adding a second VCXO and PLL, and would probably work just as well -
perhaps better, in the proportion 720kHz to 10MHz.

The second VCXO running at 90MHz is certainly a cute idea, if a touch
extravagant.

John's opinions to the contrary, DDS outputs don't "jitter". They may
have very small systematic phase fluctuations, but unless you are silly
enough to feed them into a thoroughly non-linear bang-bang phase
detector, they'll get low pass-filtered out - they should repeat at at
least 80kHz in this instance, and that's a long way above the 500Hz
3dB point that John has in mind for his PPL feedback path.

I believe it's a lot better than Kevin's passive multiplier because the
crystal is so much better than any other [passive selection filter +
amplifier] scheme. I think. Maybe Kevin will correct me.

I would have thought that the passive multiplier would only have made
sense if you wanted a master oscillator running at a couple of GHz to
feed into something like an AD9915 from which you could derive better
155.52MHz and 10MHz waveforms by DDS.

So that's my typical stream-of-consciousness, birthed whilst jogging.

The next step is usually "Dang--fatal flaw--that won't work because..."

Computations come next, e.g., "Am I getting the theoretical performance
from this crystal with this magnificent Q?"

If that weren't good enough I might also look at other high-factor
multiplier topologies (such as those used for microwave sources) and
evaluate them.

If anybody still makes YIG-tuned GHz oscillators, I'd love to hear about
it. I had couple of potential applications for these devices in the
1980's (when a number of people sold them) but the suppliers all seemed
to have gone away when I last looked (which was quite a while ago).

--
Bill Sloman, Sydney
 
On 20/09/2014 12:11 AM, dagmargoodboat@yahoo.com wrote:
On Friday, September 12, 2014 9:18:41 PM UTC-4, mrob...@att.net wrote:
Jan Panteltje wrote:

You do not, as bird, use take off weight, calculate needed runway
length, get weather report, fuel..., vectors, you just flap the wings
and go.

Sort of related: European starlings (Sturnus vulgaris) develop about
10 to 15 W of metabolic power, and deliver about 1 to 2.5 W at the
wings. I hadn't thought about it much before I read the paper, but I
was suprised at how small those numbers are. It's almost like the
design has been iterated for millions of years, or something. :)

(Reference: http://jeb.biologists.org/content/204/19/3311 )

Pretty neat that a 100g critter makes 15W. Also neat that going from
23Km/hr to 52Km/hr only increases draw from 10.4 to 14.9W.

Now if we only had those figures for other species, we could compute the
air speed velocity of a laden swallow. ("African or European swallow,"
you ask...)

Actually, I'm more puzzled about what an "air speed velocity" might be.

"Air speed" is a familiar term, and "flight velocity" might be one
that a physicist might use, but the mixed term sounds odd.

--
Bill Sloman, Sydney
 
On Fri, 19 Sep 2014 07:33:00 -0700 (PDT), Lasse Langwadt Christensen
<langwadt@fonz.dk> Gave us:

Den fredag den 19. september 2014 16.11.10 UTC+2 skrev dagmarg...@yahoo.com:
On Friday, September 12, 2014 9:18:41 PM UTC-4, mrob...@att.net wrote:

Jan Panteltje wrote:



You do not, as bird, use take off weight, calculate needed runway

length, get weather report, fuel..., vectors, you just flap the wings

and go.



Sort of related: European starlings (Sturnus vulgaris) develop about

10 to 15 W of metabolic power, and deliver about 1 to 2.5 W at the

wings. I hadn't thought about it much before I read the paper, but I

was suprised at how small those numbers are. It's almost like the

design has been iterated for millions of years, or something. :)



(Reference: http://jeb.biologists.org/content/204/19/3311 )



Pretty neat that a 100g critter makes 15W. Also neat that going from

23Km/hr to 52Km/hr only increases draw from 10.4 to 14.9W.


the Tour de France riders put around 6W/kg in the pedals all day, in
the sprint the best can do around 22W/kg for a few seconds


-Lasse

That 100g critter does it... and keeps going. On a small amount of
organic fuel and lots of Oxygen!

Most folks cannot jog, much less run full tilt for much more than 100
yards.

The whole planet should be on bicycles!

Cars made slobs out of men and women who get educated, then forget it
all behind the wheel. And lets not forget to shove a phone in one's
face and make it even worse than it already was.
 
On Fri, 19 Sep 2014 08:49:43 -0700 (PDT), dagmargoodboat@yahoo.com Gave
us:

On Friday, September 19, 2014 11:01:36 AM UTC-4, Bill Sloman wrote:
On 20/09/2014 12:11 AM, dagmargoo...@yahoo.com wrote:
On Friday, September 12, 2014 9:18:41 PM UTC-4, mrob...@att.net wrote:
Jan Panteltje wrote:

You do not, as bird, use take off weight, calculate needed runway
length, get weather report, fuel..., vectors, you just flap the wings
and go.

Sort of related: European starlings (Sturnus vulgaris) develop about
10 to 15 W of metabolic power, and deliver about 1 to 2.5 W at the
wings. I hadn't thought about it much before I read the paper, but I
was suprised at how small those numbers are. It's almost like the
design has been iterated for millions of years, or something. :)

(Reference: http://jeb.biologists.org/content/204/19/3311 )

Pretty neat that a 100g critter makes 15W. Also neat that going from
23Km/hr to 52Km/hr only increases draw from 10.4 to 14.9W.

Now if we only had those figures for other species, we could compute the
air speed velocity of a laden swallow. ("African or European swallow,"
you ask...)

Actually, I'm more puzzled about what an "air speed velocity" might be.

"Air speed" is a familiar term, and "flight velocity" might be one
that a physicist might use, but the mixed term sounds odd.

https://www.youtube.com/watch?gl=IL&hl=en&v=9JJPBVwc1iM

Cheers,
James Arthur

Yeah, but what is that chirpin' twerp laden with?

There is a comedy routine, over there, by Monty Python, IIRC...

Except *that* was an "UNladend swallow".

http://www.youtube.com/watch?v=liIlW-ovx0Y

I like the coconut shell horse trot stuff. :)
 
On Fri, 19 Sep 2014 08:49:43 -0700 (PDT), dagmargoodboat@yahoo.com Gave
us:

Cheers,
James Arthur

You are phooly ladend...

Now swallow.


BRL!!
 
wrote in message
news:91f1dab0-a3a0-4b9a-8a7d-3baaf6b90bf9@googlegroups.com...

If you can't calculate how good it _could_ be, how do you know when
you're done?

Right, but that's usually a later stage, isn't it?

To answer more directly, here's my process here--we already know (I think)
that oscillator phase performance is limited by resonator Q and flicker
noise in the BJT, and that crystals have the highest Q available in this
frequency range.

Yes. I agree that close in noise (LF) is limited, and is a basic function of
the xtal Q and the 1/f noise of the oscillator transistor.

For cases where the processing requires the oscillator to be squared up,
e.g. not where a sine wave oscillator is multiplied by anther sine in a pure
continuous demodulate, then the squarer/limiter may be the dominant noise
source.

There is a theorem that says a band limited signal going into a limiter
which is band limited on its output, has the same output phase noise S/N as
its input. i.e. the limier does not increase the noise. The flaw in that
theorem is that it is impossible to band limit the intrinsic noise of the
input transistors of the limiter.

Simulations (I am lazy) show that an ideal comparator, will, at the minimum,
increase its internal noise by 12dB. Additionally, in practice, an xtal
oscillator is already massively band limited such that you can't
realistically, band limit it again. The result is that if a limiter is used,
it tends to dominates the noise floor.

http://www.kevinaylward.co.uk/ee/phasenoise/PhaseNoiseTutorial.xht

Robert J. Matthys wrote extensively about VHF crystal oscillator design
in RF Design in two articles in the '80s. (buried in my dungeon somewhere)
IIRC, the jist of it was that very, very high performance was attainable
at VHF using over-tone crystals, the trick being not to spoil the
crystal's inherent Q, which most people do.

Yes, but it is essentially, impossible to not significantly lower its Q in
practice. Base current noise dropped across the impedance at its base is a
dominant noise source if the impedance is too large. A bias resistor must be
there to bias the transistor. There is therefore a compromise, as low as
possible to minimise base current noise and its thermal noise, but high as
possible to maximise Q. An inductor can be placed across the resistor to
reduce LF noise, but its limited in practice to avoid parasitic
oscillations.

So, as a first approximation, we 'know' the lowest phase-noise solution is
likely to involve a quartz crystal and the best transistor we can find.

We also know that multiplying up x1944 from 80KHz--essentially John's
problem--is a mother (of invention), and that a lower multiplier would
help a great deal on several fronts.

All of that qualitative logic led me to propose:

Reference Generator Master Oscillator
.------------------------------. .------------------------.
| VCXO | 720 | VCXO |
| .---. .---. .---. .----. | KHz | .---. .---. .---. |
10MHz >---| x |->|LPF|->| ~ |-+-|/125|--------->| X |->|LPF|->| ~ |-+--->
155.52MHz
| '---' '---' '---' | '----' | | '---' '---' '---' | |
| ^ 90 MHz | | | ^ .------. | |
| '-----------------' | | '----| /216 |-----' |
'------------------------------' | '------' |
'-----------------------'

The reference generator's phase detector runs at 10MHz and its VCXO
output is at least as good as the Master Oscillator's VCXO, so this
block doesn't, to a first order, limit performance.

I believe it's a lot better than Kevin's passive multiplier because the

Actually its not mine, many xtal oscillator vendors use the technique.
Second its not passive. Multiple stages are done actively, with processing,
but I am not at liberty to say what processing :)

In fact, in contrast to Steve Jobs who was an expert in stealing peoples
ideas, and getting other people to do them better, I steal the ideas, and do
them better myself.

crystal is so much better than any other [passive selection filter +
amplifier] scheme. I think. Maybe Kevin will correct me.

Indeed.

Detailed simulations on actual designs using that very expensive Cadence R.F
Phase noise analysis, which measurements on real hardware have shown to be
very accurate, show that the multiplication part of the system does not
really dominate the noise. That is, low frequency, close in noise, is
insignificant, and flatband noise is not dominated by the tanked multiplier
itself. i.e, its largely the theoretical, input noise X N

Principle noise is still due to the input oscillator, and oscillator
limiter. So, the tank method can get you pretty close to the theoretical
limit, meaning the incentive to investigate better alternatives is not that
great. Its the diminishing returns thing.

Kevin Aylward
www.kevinaylward.co.uk
www.anasoft.co.uk - SuperSpice
 
"Phil Hobbs" wrote in message news:54138195.8000608@electrooptical.net...

Granted, in your situation.

More often I'm trying to solve novel problems. A long time ago, it was
making clean BPSK SS UHF cheaply from a cheap crystal, at micropower,
fast-settling, with a lot of other constraints. There simply isn't an
equation that outputs a novel topology.

Quite so. OTOH calculating the fundamental limits as a function of the
crystal Q and transistor noise can be pretty illuminating. A few years ago
when I was building stabilized lasers for downhole applications, I had to
go into a lot of that stuff, and learned a lot. (Leeson's equation for
oscillator noise is sort of the electronic analogue of the Schawlow-Townes
minimum line width of a laser.)

Leesons equation is only qualitatively, useful. Its F is unknown, so its
useless to actually calculate LF PN noise from.

If you can't calculate how good it _could_ be, how do you know when you're
done? It's a pity to declare victory and leave, when there's another 20 dB
available with affordable devices.

In fact, you can't calculate PN manually in practice, for real systems. The
equations are way too intractable. The only realistic way to design for low
phase noise is to use a phase noise simulation tools, e.g. Cadence RF or
Agilent.

I have paper on my site by A. Demir
(http://www.kevinaylward.co.uk/ee/phasenoise/phasenoise.html) which
irrefutably shows that techniques such as the Hajimiri-Lee ISF approach is
toilet paper.

The idea of using pen and paper to try and calculate closed form solutions
to todays problems is dead. It is a fact that the percentage of systems with
closed form solutions compared to systems without, is the limit as x->0.

Its a paradigm shift to understand that using simulation tools to get the
answers is the best way and only way. I can an answer and gain real
understanding of a problem in minutes compared to pissing about with a
pencil and pad for months.

Kevin Aylward
www.kevinaylward.co.uk
www.anasoft.co.uk - SuperSpice
 
On Fri, 19 Sep 2014 19:45:56 +0100, "Kevin Aylward"
<ExtractkevinRemove@kevinaylward.co.uk> wrote:

"Phil Hobbs" wrote in message news:54138195.8000608@electrooptical.net...


Granted, in your situation.

More often I'm trying to solve novel problems. A long time ago, it was
making clean BPSK SS UHF cheaply from a cheap crystal, at micropower,
fast-settling, with a lot of other constraints. There simply isn't an
equation that outputs a novel topology.

Quite so. OTOH calculating the fundamental limits as a function of the
crystal Q and transistor noise can be pretty illuminating. A few years ago
when I was building stabilized lasers for downhole applications, I had to
go into a lot of that stuff, and learned a lot. (Leeson's equation for
oscillator noise is sort of the electronic analogue of the Schawlow-Townes
minimum line width of a laser.)

Leesons equation is only qualitatively, useful. Its F is unknown, so its
useless to actually calculate LF PN noise from.

If you can't calculate how good it _could_ be, how do you know when you're
done? It's a pity to declare victory and leave, when there's another 20 dB
available with affordable devices.

In fact, you can't calculate PN manually in practice, for real systems. The
equations are way too intractable. The only realistic way to design for low
phase noise is to use a phase noise simulation tools, e.g. Cadence RF or
Agilent.

I have paper on my site by A. Demir
(http://www.kevinaylward.co.uk/ee/phasenoise/phasenoise.html) which
irrefutably shows that techniques such as the Hajimiri-Lee ISF approach is
toilet paper.

The idea of using pen and paper to try and calculate closed form solutions
to todays problems is dead. It is a fact that the percentage of systems with
closed form solutions compared to systems without, is the limit as x->0.

Its a paradigm shift to understand that using simulation tools to get the
answers is the best way and only way. I can an answer and gain real
understanding of a problem in minutes compared to pissing about with a
pencil and pad for months.

Kevin Aylward
www.kevinaylward.co.uk
www.anasoft.co.uk - SuperSpice

There is still, I think, an academic-leftover prejudice for equations.
In a practical, complex, nonlinear system, the math may be
enlightening but not practical for quantitative solutions.

Simulation can be enlightening, too.

But then, some physical systems aren't well suited to simulation
either, so people still breadboard.


--

John Larkin Highland Technology, Inc

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
 
On a sunny day (Fri, 19 Sep 2014 12:16:41 -0700) it happened John Larkin
<jlarkin@highlandtechnology.com> wrote in
<120p1a1o20l3o1q4htcib1k38v8s1isno5@4ax.com>:

There is still, I think, an academic-leftover prejudice for equations.
In a practical, complex, nonlinear system, the math may be
enlightening but not practical for quantitative solutions.

Simulation can be enlightening, too.

But then, some physical systems aren't well suited to simulation
either, so people still breadboard.

I completely agree.
Take my DVB-S circuit for example.
I designed it, build it, its basically simple,
and it did not work.
DVB-S (satellite) receiver did not work on it, no lock, signal strength yes, plenty.

So watsit????
I did not know, so I decided to read the chip registers of the receiver demodulator chipset,
to find out what problems the demodulator had.
Well, it did not (could not lock)...

So what would be the reason?
Step aside, mm could be phase instability, frequencies and processing math, the software, are OK.
Mind you I wrote all the soft, nobody is releasing source, I was the first one,
but could check output against a close source program.
But how instability? I filtered VCO control voltages.
Maybe supply?
Yes supply was noisy, logic spikes... Added an inductor and big capacitor.
Things worked right away, as indicated pico second (2 degrees phase error at 1.something GHz,.
Now I have a working circuit, that I can replicate as many times as I like.

Slimulations were never any part of it, and you could not get the models anyways.
now I also have a good constellation vectorscope for QAM.

EVEN if the simulation was there, you would wind up with a few "makes you get that warm feeling"
screen of 'it should be like this', with no hardware,
and you would be exactly where I was before I started.
Slimulation is for NASA pictures of alien planets,
we all know they are dead and without a ride on a Russian spacecraft
they cannot even get it up (uche) for a hundred miles.
Pictures of alien planets with cows grazing.

No, that is not going anywhere.
Reality is always just a little bit different.

And a zilion(tm) neurons with more than half a century experience cannot be beaten by a couple of incomplete
by design formulas.
Never.

I can get microwave layout software, but for Gods sake, try brain first.
The consensus is not (very often actually) what really is.
Take the ground plains fetish for example.
:)
 
On 9/19/2014 2:44 PM, Kevin Aylward wrote:
wrote in message
news:91f1dab0-a3a0-4b9a-8a7d-3baaf6b90bf9@googlegroups.com...


If you can't calculate how good it _could_ be, how do you know when
you're done?

Right, but that's usually a later stage, isn't it?

To answer more directly, here's my process here--we already know (I
think)
that oscillator phase performance is limited by resonator Q and flicker
noise in the BJT, and that crystals have the highest Q available in this
frequency range.

Yes. I agree that close in noise (LF) is limited, and is a basic
function of the xtal Q and the 1/f noise of the oscillator transistor.

For cases where the processing requires the oscillator to be squared up,
e.g. not where a sine wave oscillator is multiplied by anther sine in a
pure continuous demodulate, then the squarer/limiter may be the dominant
noise source.

There is a theorem that says a band limited signal going into a limiter
which is band limited on its output, has the same output phase noise S/N
as its input. i.e. the limier does not increase the noise. The flaw in
that theorem is that it is impossible to band limit the intrinsic noise
of the input transistors of the limiter.

Simulations (I am lazy) show that an ideal comparator, will, at the
minimum, increase its internal noise by 12dB. Additionally, in practice,
an xtal oscillator is already massively band limited such that you can't
realistically, band limit it again. The result is that if a limiter is
used, it tends to dominates the noise floor.

http://www.kevinaylward.co.uk/ee/phasenoise/PhaseNoiseTutorial.xht

Robert J. Matthys wrote extensively about VHF crystal oscillator design
in RF Design in two articles in the '80s. (buried in my dungeon
somewhere)
IIRC, the jist of it was that very, very high performance was attainable
at VHF using over-tone crystals, the trick being not to spoil the
crystal's inherent Q, which most people do.

Yes, but it is essentially, impossible to not significantly lower its Q
in practice. Base current noise dropped across the impedance at its base
is a dominant noise source if the impedance is too large. A bias
resistor must be there to bias the transistor. There is therefore a
compromise, as low as possible to minimise base current noise and its
thermal noise, but high as possible to maximise Q. An inductor can be
placed across the resistor to reduce LF noise, but its limited in
practice to avoid parasitic oscillations.

So, as a first approximation, we 'know' the lowest phase-noise
solution is
likely to involve a quartz crystal and the best transistor we can find.

We also know that multiplying up x1944 from 80KHz--essentially John's
problem--is a mother (of invention), and that a lower multiplier would
help a great deal on several fronts.

All of that qualitative logic led me to propose:

Reference Generator Master Oscillator
.------------------------------. .------------------------.
| VCXO | 720 | VCXO |
| .---. .---. .---. .----. | KHz | .---. .---. .---. |
10MHz >---| x |->|LPF|->| ~ |-+-|/125|--------->| X |->|LPF|->| ~
|-+---> 155.52MHz
| '---' '---' '---' | '----' | | '---' '---' '---' | |
| ^ 90 MHz | | | ^ .------. | |
| '-----------------' | | '----| /216 |-----' |
'------------------------------' | '------' |
'-----------------------'

The reference generator's phase detector runs at 10MHz and its VCXO
output is at least as good as the Master Oscillator's VCXO, so this
block doesn't, to a first order, limit performance.

I believe it's a lot better than Kevin's passive multiplier because the

Actually its not mine, many xtal oscillator vendors use the technique.
Second its not passive. Multiple stages are done actively, with
processing, but I am not at liberty to say what processing :)

In fact, in contrast to Steve Jobs who was an expert in stealing peoples
ideas, and getting other people to do them better, I steal the ideas,
and do them better myself.

crystal is so much better than any other [passive selection filter +
amplifier] scheme. I think. Maybe Kevin will correct me.

Indeed.

Detailed simulations on actual designs using that very expensive Cadence
R.F Phase noise analysis, which measurements on real hardware have shown
to be very accurate, show that the multiplication part of the system
does not really dominate the noise. That is, low frequency, close in
noise, is insignificant, and flatband noise is not dominated by the
tanked multiplier itself. i.e, its largely the theoretical, input noise X N

Principle noise is still due to the input oscillator, and oscillator
limiter. So, the tank method can get you pretty close to the theoretical
limit, meaning the incentive to investigate better alternatives is not
that great. Its the diminishing returns thing.

Kevin Aylward
www.kevinaylward.co.uk
www.anasoft.co.uk - SuperSpice

But the Leeson equation predicts that the oscillator exhibits a huge
noise gain close in, which the comparator doesn't.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net
 
"John Larkin" wrote in message
news:120p1a1o20l3o1q4htcib1k38v8s1isno5@4ax.com...

On Fri, 19 Sep 2014 19:45:56 +0100, "Kevin Aylward"
<ExtractkevinRemove@kevinaylward.co.uk> wrote:

"Phil Hobbs" wrote in message news:54138195.8000608@electrooptical.net...


Granted, in your situation.

More often I'm trying to solve novel problems. A long time ago, it was
making clean BPSK SS UHF cheaply from a cheap crystal, at micropower,
fast-settling, with a lot of other constraints. There simply isn't an
equation that outputs a novel topology.

Quite so. OTOH calculating the fundamental limits as a function of the
crystal Q and transistor noise can be pretty illuminating. A few years
ago
when I was building stabilized lasers for downhole applications, I had to
go into a lot of that stuff, and learned a lot. (Leeson's equation for
oscillator noise is sort of the electronic analogue of the Schawlow-Townes
minimum line width of a laser.)

Leesons equation is only qualitatively, useful. Its F is unknown, so its
useless to actually calculate LF PN noise from.

If you can't calculate how good it _could_ be, how do you know when you're
done? It's a pity to declare victory and leave, when there's another 20
dB
available with affordable devices.

In fact, you can't calculate PN manually in practice, for real systems. The
equations are way too intractable. The only realistic way to design for low
phase noise is to use a phase noise simulation tools, e.g. Cadence RF or
Agilent.

I have paper on my site by A. Demir
(http://www.kevinaylward.co.uk/ee/phasenoise/phasenoise.html) which
irrefutably shows that techniques such as the Hajimiri-Lee ISF approach is
toilet paper.

The idea of using pen and paper to try and calculate closed form solutions
to todays problems is dead. It is a fact that the percentage of systems
with
closed form solutions compared to systems without, is the limit as x->0.

Its a paradigm shift to understand that using simulation tools to get the
answers is the best way and only way. I can an answer and gain real
understanding of a problem in minutes compared to pissing about with a
pencil and pad for months.

>There is still, I think, an academic-leftover prejudice for equations.

Yes. Its job security. What would they do if they did not produce equations
10 lines long.

It took me a while to eliminate my own prejudice. I once spent an inordinate
amount of time learning all sorts of ways to solve differentia equations.

In a practical, complex, nonlinear system, the math may be
enlightening but not practical for quantitative solutions.

Enlightening sometimes, often one cant see the forest because the trees are
in the way. The equations are usually unmanageable. Middlebrook appreciated
and stressed this, illustrated by his reduced element theorem. He didn't go
far enough.

>Simulation can be enlightening, too.

Very enlightening. Regarding phase noise, bench work simply can not compete
with the tests you can do in the virtual world. e.g. the sims spit out the
value of each contributing noise noise value, in order.

But then, some physical systems aren't well suited to simulation either, so
people still breadboard.

Yes. Simulation only works when the individual models accurately reflect
reality, and correct theory expressed in a numerical solvable equations
exist. The reverse/forward recovery diode thread shows that there are still
areas lacking.

Kevin Aylward
www.kevinaylward.co.uk
www.anasoft.co.uk - SuperSpice
 
On 9/16/14, 10:27 AM, John Larkin wrote:
On Tue, 16 Sep 2014 00:21:44 -0500, ChesterW <iamsnoozin@yahoo.com
wrote:

On 9/15/14, 4:55 PM, Phil Hobbs wrote:
snip



*----------------<----------------------------------------*
| |
VCXO *-----* *-----* *-------* |
155.52 MHz ->-- /1944 ->-|D Q|------|D Q|---| LOOP |----*
| | | | | |FILTER |
V *--^--* *--^--* *-------*
| | |
*------->-------* *---<----10MHz REF
Resynch B-B phase det

With maybe a second DFF stage between the phase detector and the loop
filter, to get rid of any noise caused by metastability.

Cheers

Phil Hobbs

It's elegant, but it seems counter-intuitive that the rather tough specs
can be met when throwing away over 99% of the phase comparison
information (1-1/125).

ChesterW

For a constant loop bandwidth, you should get some noise averaging by
doing the phase comparison faster, I agree. However, since you have to
crank down the BW to filter out the gross amounts of ripple from a
bang-bang phase detector, I expect that it won't be that different
inside the BW.

Of course, losing all that loop bandwidth does mean that the VCXO has to
be a lot better than it would with a 10 MHz comparison frequency.

Using local feedback, i.e. a DDS-based or fractional-N loop (wide loop
BW but probably fairly horrible drift) inside an 80-kHz bang-bang loop
would relax the requirements on the VCXO proper.

This is all such fun that I may have to try building something like that.

Cheers

Phil Hobbs


Yes, John Larkin gets the prize for the most interesting project of the
week. Lucky dog.

Here's a possible idea for evaluating the feasibility of different
schemes. Calculate the entropy of the 155.52 MHz signal. Estimate the
frequency drift of the VCXO and represent it as the number of bits of
information lost per 12.5 us update period. Then the feedback needs to
supply at least this number of bits of information to be a possible
solution. If the required feedback SNR is too high, then you know you
need to use the information from more phase comparisons, not just the
easy 12.5 us ones.


Something like that. We'll probably lay out a nice multilayer proto
board with a few candidate VCXO locations, 10 MHz filters, and
dipswitches and trimpots in the loop lowpass filter to make it easy to
tune. Seed that with SMA connectors for analysis, and experiment. Good
intern sort of project.

Putting a cover over the XO, to keep air currents off it, can reduce
jitter a lot.


This is cool:

https://dl.dropboxusercontent.com/u/53724080/Software/PhaseNoise.exe

It was done by one of the s.e.d. guys some time ago; Jeroen? It lets
you convert a phase noise curve to RMS jitter.
Whatever gets results is good. I wonder how intern errors sum. I don't
think it's a half power law, although I suppose it depends on the
intern. Maybe you can hire the re-incarnation of Claude Shannon.

I'm biased toward lots calculation and simulation before building and
fiddling - for complicated systems anyhow. I think it's from working
early in my career without much theory. That was frustrating as hell.

Anyway, I make your 155.52 MHz oscillator with 0.2 ps rms jitter as
containing 15.0 bits of information. When it degrades to 12.7 bits
you're on the edge of your 1 ps error budget. That and how fast it
degrades should set the performance requirements on the feedback loop.

ChesterW
 
On Fri, 19 Sep 2014 15:32:07 -0500, ChesterW <iamsnoozin@yahoo.com>
wrote:

On 9/16/14, 10:27 AM, John Larkin wrote:
On Tue, 16 Sep 2014 00:21:44 -0500, ChesterW <iamsnoozin@yahoo.com
wrote:

On 9/15/14, 4:55 PM, Phil Hobbs wrote:
snip



*----------------<----------------------------------------*
| |
VCXO *-----* *-----* *-------* |
155.52 MHz ->-- /1944 ->-|D Q|------|D Q|---| LOOP |----*
| | | | | |FILTER |
V *--^--* *--^--* *-------*
| | |
*------->-------* *---<----10MHz REF
Resynch B-B phase det

With maybe a second DFF stage between the phase detector and the loop
filter, to get rid of any noise caused by metastability.

Cheers

Phil Hobbs

It's elegant, but it seems counter-intuitive that the rather tough specs
can be met when throwing away over 99% of the phase comparison
information (1-1/125).

ChesterW

For a constant loop bandwidth, you should get some noise averaging by
doing the phase comparison faster, I agree. However, since you have to
crank down the BW to filter out the gross amounts of ripple from a
bang-bang phase detector, I expect that it won't be that different
inside the BW.

Of course, losing all that loop bandwidth does mean that the VCXO has to
be a lot better than it would with a 10 MHz comparison frequency.

Using local feedback, i.e. a DDS-based or fractional-N loop (wide loop
BW but probably fairly horrible drift) inside an 80-kHz bang-bang loop
would relax the requirements on the VCXO proper.

This is all such fun that I may have to try building something like that.

Cheers

Phil Hobbs


Yes, John Larkin gets the prize for the most interesting project of the
week. Lucky dog.

Here's a possible idea for evaluating the feasibility of different
schemes. Calculate the entropy of the 155.52 MHz signal. Estimate the
frequency drift of the VCXO and represent it as the number of bits of
information lost per 12.5 us update period. Then the feedback needs to
supply at least this number of bits of information to be a possible
solution. If the required feedback SNR is too high, then you know you
need to use the information from more phase comparisons, not just the
easy 12.5 us ones.


Something like that. We'll probably lay out a nice multilayer proto
board with a few candidate VCXO locations, 10 MHz filters, and
dipswitches and trimpots in the loop lowpass filter to make it easy to
tune. Seed that with SMA connectors for analysis, and experiment. Good
intern sort of project.

Putting a cover over the XO, to keep air currents off it, can reduce
jitter a lot.


This is cool:

https://dl.dropboxusercontent.com/u/53724080/Software/PhaseNoise.exe

It was done by one of the s.e.d. guys some time ago; Jeroen? It lets
you convert a phase noise curve to RMS jitter.


Whatever gets results is good. I wonder how intern errors sum. I don't
think it's a half power law, although I suppose it depends on the
intern. Maybe you can hire the re-incarnation of Claude Shannon.

I'm biased toward lots calculation and simulation before building and
fiddling - for complicated systems anyhow. I think it's from working
early in my career without much theory. That was frustrating as hell.

Anyway, I make your 155.52 MHz oscillator with 0.2 ps rms jitter as
containing 15.0 bits of information. When it degrades to 12.7 bits
you're on the edge of your 1 ps error budget. That and how fast it
degrades should set the performance requirements on the feedback loop.

ChesterW

Seems to me that more modulation of a sine wave carries more
information, not less.

Does a perfect sine wave convey an infinite amount of information?


--

John Larkin Highland Technology, Inc

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
 
On 9/19/2014 5:21 PM, John Larkin wrote:
On Fri, 19 Sep 2014 15:32:07 -0500, ChesterW <iamsnoozin@yahoo.com
wrote:

On 9/16/14, 10:27 AM, John Larkin wrote:
On Tue, 16 Sep 2014 00:21:44 -0500, ChesterW <iamsnoozin@yahoo.com
wrote:

On 9/15/14, 4:55 PM, Phil Hobbs wrote:
snip



*----------------<----------------------------------------*
| |
VCXO *-----* *-----* *-------* |
155.52 MHz ->-- /1944 ->-|D Q|------|D Q|---| LOOP |----*
| | | | | |FILTER |
V *--^--* *--^--* *-------*
| | |
*------->-------* *---<----10MHz REF
Resynch B-B phase det

With maybe a second DFF stage between the phase detector and the loop
filter, to get rid of any noise caused by metastability.

Cheers

Phil Hobbs

It's elegant, but it seems counter-intuitive that the rather tough specs
can be met when throwing away over 99% of the phase comparison
information (1-1/125).

ChesterW

For a constant loop bandwidth, you should get some noise averaging by
doing the phase comparison faster, I agree. However, since you have to
crank down the BW to filter out the gross amounts of ripple from a
bang-bang phase detector, I expect that it won't be that different
inside the BW.

Of course, losing all that loop bandwidth does mean that the VCXO has to
be a lot better than it would with a 10 MHz comparison frequency.

Using local feedback, i.e. a DDS-based or fractional-N loop (wide loop
BW but probably fairly horrible drift) inside an 80-kHz bang-bang loop
would relax the requirements on the VCXO proper.

This is all such fun that I may have to try building something like that.

Cheers

Phil Hobbs


Yes, John Larkin gets the prize for the most interesting project of the
week. Lucky dog.

Here's a possible idea for evaluating the feasibility of different
schemes. Calculate the entropy of the 155.52 MHz signal. Estimate the
frequency drift of the VCXO and represent it as the number of bits of
information lost per 12.5 us update period. Then the feedback needs to
supply at least this number of bits of information to be a possible
solution. If the required feedback SNR is too high, then you know you
need to use the information from more phase comparisons, not just the
easy 12.5 us ones.


Something like that. We'll probably lay out a nice multilayer proto
board with a few candidate VCXO locations, 10 MHz filters, and
dipswitches and trimpots in the loop lowpass filter to make it easy to
tune. Seed that with SMA connectors for analysis, and experiment. Good
intern sort of project.

Putting a cover over the XO, to keep air currents off it, can reduce
jitter a lot.


This is cool:

https://dl.dropboxusercontent.com/u/53724080/Software/PhaseNoise.exe

It was done by one of the s.e.d. guys some time ago; Jeroen? It lets
you convert a phase noise curve to RMS jitter.


Whatever gets results is good. I wonder how intern errors sum. I don't
think it's a half power law, although I suppose it depends on the
intern. Maybe you can hire the re-incarnation of Claude Shannon.

I'm biased toward lots calculation and simulation before building and
fiddling - for complicated systems anyhow. I think it's from working
early in my career without much theory. That was frustrating as hell.

Anyway, I make your 155.52 MHz oscillator with 0.2 ps rms jitter as
containing 15.0 bits of information. When it degrades to 12.7 bits
you're on the edge of your 1 ps error budget. That and how fast it
degrades should set the performance requirements on the feedback loop.

ChesterW


Seems to me that more modulation of a sine wave carries more
information, not less.

Does a perfect sine wave convey an infinite amount of information?

I think your approach would suggest that total broadband noise would
convey infinite information.

He is talking about the loss of info from the presence of noise.
Remember that guy Shannon?

--

Rick
 
On 9/19/2014 5:37 PM, rickman wrote:
On 9/19/2014 5:21 PM, John Larkin wrote:
On Fri, 19 Sep 2014 15:32:07 -0500, ChesterW <iamsnoozin@yahoo.com
wrote:

On 9/16/14, 10:27 AM, John Larkin wrote:
On Tue, 16 Sep 2014 00:21:44 -0500, ChesterW <iamsnoozin@yahoo.com
wrote:

On 9/15/14, 4:55 PM, Phil Hobbs wrote:
snip



*----------------<----------------------------------------*
| |
VCXO *-----* *-----* *-------* |
155.52 MHz ->-- /1944 ->-|D Q|------|D Q|---| LOOP |----*
| | | | | |FILTER |
V *--^--* *--^--* *-------*
| | |
*------->-------* *---<----10MHz REF
Resynch B-B phase det

With maybe a second DFF stage between the phase detector and the
loop
filter, to get rid of any noise caused by metastability.

Cheers

Phil Hobbs

It's elegant, but it seems counter-intuitive that the rather
tough specs
can be met when throwing away over 99% of the phase comparison
information (1-1/125).

ChesterW

For a constant loop bandwidth, you should get some noise averaging by
doing the phase comparison faster, I agree. However, since you
have to
crank down the BW to filter out the gross amounts of ripple from a
bang-bang phase detector, I expect that it won't be that different
inside the BW.

Of course, losing all that loop bandwidth does mean that the VCXO
has to
be a lot better than it would with a 10 MHz comparison frequency.

Using local feedback, i.e. a DDS-based or fractional-N loop (wide
loop
BW but probably fairly horrible drift) inside an 80-kHz bang-bang
loop
would relax the requirements on the VCXO proper.

This is all such fun that I may have to try building something
like that.

Cheers

Phil Hobbs


Yes, John Larkin gets the prize for the most interesting project of
the
week. Lucky dog.

Here's a possible idea for evaluating the feasibility of different
schemes. Calculate the entropy of the 155.52 MHz signal. Estimate the
frequency drift of the VCXO and represent it as the number of bits of
information lost per 12.5 us update period. Then the feedback needs to
supply at least this number of bits of information to be a possible
solution. If the required feedback SNR is too high, then you know you
need to use the information from more phase comparisons, not just the
easy 12.5 us ones.


Something like that. We'll probably lay out a nice multilayer proto
board with a few candidate VCXO locations, 10 MHz filters, and
dipswitches and trimpots in the loop lowpass filter to make it easy to
tune. Seed that with SMA connectors for analysis, and experiment. Good
intern sort of project.

Putting a cover over the XO, to keep air currents off it, can reduce
jitter a lot.


This is cool:

https://dl.dropboxusercontent.com/u/53724080/Software/PhaseNoise.exe

It was done by one of the s.e.d. guys some time ago; Jeroen? It lets
you convert a phase noise curve to RMS jitter.


Whatever gets results is good. I wonder how intern errors sum. I don't
think it's a half power law, although I suppose it depends on the
intern. Maybe you can hire the re-incarnation of Claude Shannon.

I'm biased toward lots calculation and simulation before building and
fiddling - for complicated systems anyhow. I think it's from working
early in my career without much theory. That was frustrating as hell.

Anyway, I make your 155.52 MHz oscillator with 0.2 ps rms jitter as
containing 15.0 bits of information. When it degrades to 12.7 bits
you're on the edge of your 1 ps error budget. That and how fast it
degrades should set the performance requirements on the feedback loop.

ChesterW


Seems to me that more modulation of a sine wave carries more
information, not less.

Does a perfect sine wave convey an infinite amount of information?

I think your approach would suggest that total broadband noise would
convey infinite information.

That's actually right, if you're the source of the noise. ;)

Efficient modulation schemes have spectra that look a lot like noise.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net
 
On Fri, 19 Sep 2014 17:40:51 -0400, Phil Hobbs
<hobbs@electrooptical.net> wrote:

On 9/19/2014 5:37 PM, rickman wrote:
On 9/19/2014 5:21 PM, John Larkin wrote:
On Fri, 19 Sep 2014 15:32:07 -0500, ChesterW <iamsnoozin@yahoo.com
wrote:

On 9/16/14, 10:27 AM, John Larkin wrote:
On Tue, 16 Sep 2014 00:21:44 -0500, ChesterW <iamsnoozin@yahoo.com
wrote:

On 9/15/14, 4:55 PM, Phil Hobbs wrote:
snip



*----------------<----------------------------------------*
| |
VCXO *-----* *-----* *-------* |
155.52 MHz ->-- /1944 ->-|D Q|------|D Q|---| LOOP |----*
| | | | | |FILTER |
V *--^--* *--^--* *-------*
| | |
*------->-------* *---<----10MHz REF
Resynch B-B phase det

With maybe a second DFF stage between the phase detector and the
loop
filter, to get rid of any noise caused by metastability.

Cheers

Phil Hobbs

It's elegant, but it seems counter-intuitive that the rather
tough specs
can be met when throwing away over 99% of the phase comparison
information (1-1/125).

ChesterW

For a constant loop bandwidth, you should get some noise averaging by
doing the phase comparison faster, I agree. However, since you
have to
crank down the BW to filter out the gross amounts of ripple from a
bang-bang phase detector, I expect that it won't be that different
inside the BW.

Of course, losing all that loop bandwidth does mean that the VCXO
has to
be a lot better than it would with a 10 MHz comparison frequency.

Using local feedback, i.e. a DDS-based or fractional-N loop (wide
loop
BW but probably fairly horrible drift) inside an 80-kHz bang-bang
loop
would relax the requirements on the VCXO proper.

This is all such fun that I may have to try building something
like that.

Cheers

Phil Hobbs


Yes, John Larkin gets the prize for the most interesting project of
the
week. Lucky dog.

Here's a possible idea for evaluating the feasibility of different
schemes. Calculate the entropy of the 155.52 MHz signal. Estimate the
frequency drift of the VCXO and represent it as the number of bits of
information lost per 12.5 us update period. Then the feedback needs to
supply at least this number of bits of information to be a possible
solution. If the required feedback SNR is too high, then you know you
need to use the information from more phase comparisons, not just the
easy 12.5 us ones.


Something like that. We'll probably lay out a nice multilayer proto
board with a few candidate VCXO locations, 10 MHz filters, and
dipswitches and trimpots in the loop lowpass filter to make it easy to
tune. Seed that with SMA connectors for analysis, and experiment. Good
intern sort of project.

Putting a cover over the XO, to keep air currents off it, can reduce
jitter a lot.


This is cool:

https://dl.dropboxusercontent.com/u/53724080/Software/PhaseNoise.exe

It was done by one of the s.e.d. guys some time ago; Jeroen? It lets
you convert a phase noise curve to RMS jitter.


Whatever gets results is good. I wonder how intern errors sum. I don't
think it's a half power law, although I suppose it depends on the
intern. Maybe you can hire the re-incarnation of Claude Shannon.

I'm biased toward lots calculation and simulation before building and
fiddling - for complicated systems anyhow. I think it's from working
early in my career without much theory. That was frustrating as hell.

Anyway, I make your 155.52 MHz oscillator with 0.2 ps rms jitter as
containing 15.0 bits of information. When it degrades to 12.7 bits
you're on the edge of your 1 ps error budget. That and how fast it
degrades should set the performance requirements on the feedback loop.

ChesterW


Seems to me that more modulation of a sine wave carries more
information, not less.

Does a perfect sine wave convey an infinite amount of information?

I think your approach would suggest that total broadband noise would
convey infinite information.

That's actually right, if you're the source of the noise. ;)

Efficient modulation schemes have spectra that look a lot like noise.

Cheers

Phil Hobbs

I was thinking about weather records, as in "the highest temperature
in Mule Kick Arizona on this date in recorded history".

Start observing gaussian noise on a storage scope. The longer you
wait, the more likely you'll see a record peak. The more recently you
started saving data, the more likely you'll see spikes.

Weather stations used to be widely scattered and infrequently read,
and there was a start date for "historical records." So naturally, as
time goes on, and more weather stations report more often, new records
will be set, here and there.


--

John Larkin Highland Technology, Inc

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
 
Am 19.09.2014 um 16:11 schrieb dagmargoodboat@yahoo.com:
to 52Km/hr only increases draw from 10.4 to 14.9W.
Now if we only had those figures for other species, we could compute the
air speed velocity of a laden swallow. ("African or European swallow,"
you ask...)

Cheers,
James Arthur

Arthur, as a king you are are supposed to know these things!

:) Gerhard
 
In article <lvg5iv$dbr$1@dont-email.me>, gnuarm@gmail.com says...
As much as I would love to help you, I can't believe the
lack of insight here.

Experienced people can see what the circuit is, even if
there was some minor hand slip in the drawing, which I didn't
see any btw.

Why not just give up beating the dead horse?

If you can't explain such a simple circuit, I think I am not the only
one who had a lack of insight... and a few other qualities.
You can attempt to steer the subject to any direction you wish, but
you'll fail miserably.

The question was reading of the schematic, not understanding
how it works. I understand how it works and there for I saw no
mistakes nor did I see a problem with the drawing.

Trying to move the goal post to blur your lack of understanding isn't
doing much for your image.

Suck it up..


Jamie
 
On 9/19/14, 4:21 PM, John Larkin wrote:
On Fri, 19 Sep 2014 15:32:07 -0500, ChesterW <iamsnoozin@yahoo.com
wrote:

On 9/16/14, 10:27 AM, John Larkin wrote:
On Tue, 16 Sep 2014 00:21:44 -0500, ChesterW <iamsnoozin@yahoo.com
wrote:

On 9/15/14, 4:55 PM, Phil Hobbs wrote:
snip



*----------------<----------------------------------------*
| |
VCXO *-----* *-----* *-------* |
155.52 MHz ->-- /1944 ->-|D Q|------|D Q|---| LOOP |----*
| | | | | |FILTER |
V *--^--* *--^--* *-------*
| | |
*------->-------* *---<----10MHz REF
Resynch B-B phase det

With maybe a second DFF stage between the phase detector and the loop
filter, to get rid of any noise caused by metastability.

Cheers

Phil Hobbs

It's elegant, but it seems counter-intuitive that the rather tough specs
can be met when throwing away over 99% of the phase comparison
information (1-1/125).

ChesterW

For a constant loop bandwidth, you should get some noise averaging by
doing the phase comparison faster, I agree. However, since you have to
crank down the BW to filter out the gross amounts of ripple from a
bang-bang phase detector, I expect that it won't be that different
inside the BW.

Of course, losing all that loop bandwidth does mean that the VCXO has to
be a lot better than it would with a 10 MHz comparison frequency.

Using local feedback, i.e. a DDS-based or fractional-N loop (wide loop
BW but probably fairly horrible drift) inside an 80-kHz bang-bang loop
would relax the requirements on the VCXO proper.

This is all such fun that I may have to try building something like that.

Cheers

Phil Hobbs


Yes, John Larkin gets the prize for the most interesting project of the
week. Lucky dog.

Here's a possible idea for evaluating the feasibility of different
schemes. Calculate the entropy of the 155.52 MHz signal. Estimate the
frequency drift of the VCXO and represent it as the number of bits of
information lost per 12.5 us update period. Then the feedback needs to
supply at least this number of bits of information to be a possible
solution. If the required feedback SNR is too high, then you know you
need to use the information from more phase comparisons, not just the
easy 12.5 us ones.


Something like that. We'll probably lay out a nice multilayer proto
board with a few candidate VCXO locations, 10 MHz filters, and
dipswitches and trimpots in the loop lowpass filter to make it easy to
tune. Seed that with SMA connectors for analysis, and experiment. Good
intern sort of project.

Putting a cover over the XO, to keep air currents off it, can reduce
jitter a lot.


This is cool:

https://dl.dropboxusercontent.com/u/53724080/Software/PhaseNoise.exe

It was done by one of the s.e.d. guys some time ago; Jeroen? It lets
you convert a phase noise curve to RMS jitter.


Whatever gets results is good. I wonder how intern errors sum. I don't
think it's a half power law, although I suppose it depends on the
intern. Maybe you can hire the re-incarnation of Claude Shannon.

I'm biased toward lots calculation and simulation before building and
fiddling - for complicated systems anyhow. I think it's from working
early in my career without much theory. That was frustrating as hell.

Anyway, I make your 155.52 MHz oscillator with 0.2 ps rms jitter as
containing 15.0 bits of information. When it degrades to 12.7 bits
you're on the edge of your 1 ps error budget. That and how fast it
degrades should set the performance requirements on the feedback loop.

ChesterW


Seems to me that more modulation of a sine wave carries more
information, not less.

Does a perfect sine wave convey an infinite amount of information?

The answer depends on un-supplied details.

In the sense of sending data using a carrier, then more modulation can
mean more information content. It depends on the determinism of the
modulation.

In the sense of sending data using a carrier, then a perfect sine wave
with infinite extent in time conveys zero information.

In the sense of a time reference, a perfect sine wave with zero error
conveys infinite information.

So how about that, the same signal conveys both zero and infinite
information, depending on the question. Reminds me of a story about
imaginary cows that I may post later.

In your oscillator problem I modeled the system as a clock with each
reference tick happening at 1/155.52 MHz. The 0.2 ps rms jitter is the
uncertainty in the time measurement. For these numbers, that's about 1
part in 32k, which requires about 15.0 bits to specify. Since the jitter
is random from cycle to cycle, this represents the maximum precision of
the system which I take as the information content of the (perfectly
aligned) system related to timing.

When the error from sources besides jitter accumulates to your spec of 1
ps, then the system is precise to about 1 part in 6400, or about 12.7
bits. So, when random occurrences cause your system to drift from
perfectly aligned to just out of spec, the time reference has lost about
2.3 bits of information.

So, if you know the drift rate of the timing of the system, then you can
calculate the data loss rate in bits per second. Since bits per second,
bandwidth, and SNR are related in the channel capacity formula, this may
be a tool to evaluate feedback schemes. If the feedback can't supply
enough bps, then it can't control the loop. I think this might set a
necessary but not sufficient condition, which at least may keep you from
wasting time building something that has no chance of working, which of
course is the purpose of analysis in engineering.

ChesterW
 
On 9/19/14, 4:37 PM, rickman wrote:
On 9/19/2014 5:21 PM, John Larkin wrote:
On Fri, 19 Sep 2014 15:32:07 -0500, ChesterW <iamsnoozin@yahoo.com
wrote:

On 9/16/14, 10:27 AM, John Larkin wrote:
On Tue, 16 Sep 2014 00:21:44 -0500, ChesterW <iamsnoozin@yahoo.com
wrote:

On 9/15/14, 4:55 PM, Phil Hobbs wrote:
snip



*----------------<----------------------------------------*
| |
VCXO *-----* *-----* *-------* |
155.52 MHz ->-- /1944 ->-|D Q|------|D Q|---| LOOP |----*
| | | | | |FILTER |
V *--^--* *--^--* *-------*
| | |
*------->-------* *---<----10MHz REF
Resynch B-B phase det

With maybe a second DFF stage between the phase detector and the
loop
filter, to get rid of any noise caused by metastability.

Cheers

Phil Hobbs

It's elegant, but it seems counter-intuitive that the rather
tough specs
can be met when throwing away over 99% of the phase comparison
information (1-1/125).

ChesterW

For a constant loop bandwidth, you should get some noise averaging by
doing the phase comparison faster, I agree. However, since you
have to
crank down the BW to filter out the gross amounts of ripple from a
bang-bang phase detector, I expect that it won't be that different
inside the BW.

Of course, losing all that loop bandwidth does mean that the VCXO
has to
be a lot better than it would with a 10 MHz comparison frequency.

Using local feedback, i.e. a DDS-based or fractional-N loop (wide
loop
BW but probably fairly horrible drift) inside an 80-kHz bang-bang
loop
would relax the requirements on the VCXO proper.

This is all such fun that I may have to try building something
like that.

Cheers

Phil Hobbs


Yes, John Larkin gets the prize for the most interesting project of
the
week. Lucky dog.

Here's a possible idea for evaluating the feasibility of different
schemes. Calculate the entropy of the 155.52 MHz signal. Estimate the
frequency drift of the VCXO and represent it as the number of bits of
information lost per 12.5 us update period. Then the feedback needs to
supply at least this number of bits of information to be a possible
solution. If the required feedback SNR is too high, then you know you
need to use the information from more phase comparisons, not just the
easy 12.5 us ones.


Something like that. We'll probably lay out a nice multilayer proto
board with a few candidate VCXO locations, 10 MHz filters, and
dipswitches and trimpots in the loop lowpass filter to make it easy to
tune. Seed that with SMA connectors for analysis, and experiment. Good
intern sort of project.

Putting a cover over the XO, to keep air currents off it, can reduce
jitter a lot.


This is cool:

https://dl.dropboxusercontent.com/u/53724080/Software/PhaseNoise.exe

It was done by one of the s.e.d. guys some time ago; Jeroen? It lets
you convert a phase noise curve to RMS jitter.


Whatever gets results is good. I wonder how intern errors sum. I don't
think it's a half power law, although I suppose it depends on the
intern. Maybe you can hire the re-incarnation of Claude Shannon.

I'm biased toward lots calculation and simulation before building and
fiddling - for complicated systems anyhow. I think it's from working
early in my career without much theory. That was frustrating as hell.

Anyway, I make your 155.52 MHz oscillator with 0.2 ps rms jitter as
containing 15.0 bits of information. When it degrades to 12.7 bits
you're on the edge of your 1 ps error budget. That and how fast it
degrades should set the performance requirements on the feedback loop.

ChesterW


Seems to me that more modulation of a sine wave carries more
information, not less.

Does a perfect sine wave convey an infinite amount of information?

I think your approach would suggest that total broadband noise would
convey infinite information.

He is talking about the loss of info from the presence of noise.
Remember that guy Shannon?

Dear Rick,

Your posts make we want to be a better man, and specifically one
who has learned to use the filters in his news reader.

ChesterW
 

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