PalmChip Patent

N

Neeraj Varma

Guest
Hi - just finished reading this...
http://www.us.design-reuse.com/news/news6026.html
triggered by some discussions with peers.

Does anybody think this affects the FPGAs with on-chip busses?

--neeraj
 
"Neeraj Varma" <neeraj@cg-coreel.com> wrote in message
news:606fb9ef.0308120312.6093c2da@posting.google.com...
Hi - just finished reading this...
http://www.us.design-reuse.com/news/news6026.html
triggered by some discussions with peers.

Does anybody think this affects the FPGAs with on-chip busses?
Ha flippin' ha. Here we go again.

Perhaps some of these turkeys should read the AMBA bus spec,
or find out about what Inmos were doing and writing in the
late 70s.

Not all prior art originates in the USA, despite what some
USPTO patent examiners seem to think :)

Just one delightful snippet from the "Background" section
of this patent on the USPTO website:

Static timing analysis is preferably awkward, ...

Well, no; but patent lawyers, now, there's quite another thing.
--

Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * Perl * Tcl/Tk * Verification * Project Services

Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, Hampshire, BH24 1AW, UK
Tel: +44 (0)1425 471223 mail: jonathan.bromley@doulos.com
Fax: +44 (0)1425 471573 Web: http://www.doulos.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
In article <bhampo$eu0$1$8300dec7@news.demon.co.uk>,
Jonathan Bromley <jonathan.bromley@doulos.com> wrote:
Not all prior art originates in the USA, despite what some
USPTO patent examiners seem to think :)
Come on, the USPTO patent examiners wouldn't know prior art if it came
up and bit them on the ass, mostly because the system largely relies
on what the patent filer cites!
--
Nicholas C. Weaver nweaver@cs.berkeley.edu
 
Which is, of course, a BIG &@#$2#$)(ing problem, as the inventor may
lie, gloss over, or just through ignorance, neglect huge hunks of
prior art.

And without a cost-effective way of interested third parties to attack
the patent after being granted, one gets this huge minefield of
garbage.
--
Yes big problem. An inventor should think "if my patent is worth anything
someone will find all the prior art." There is a point after the patent is
accepted and when it is issued that would be a good time for that some kind
of public flogging of the patent.

Steve
 
In article <Bhf_a.212$Ub5.29202718@newssvr21.news.prodigy.com>,
Steve Casselman <sc_nospam@vcc.com> wrote:

Come on, the USPTO patent examiners wouldn't know prior art if it came
up and bit them on the ass, mostly because the system largely relies
on what the patent filer cites!
--
Nicholas C. Weaver nweaver@cs.berkeley.edu

It is not up to the examiner to know all the prior art in a field it is up
to the inventor. The inventor is supposed to be such an expert in his field
that he's gone and invented something. The inventor is obliged to collect
all the prior art and present it to the examiner. The examiner also has
prior art at his disposal but is only presumed to know enough of the art to
determine if this is a new and useful invention.
Which is, of course, a BIG &@#$2#$)(ing problem, as the inventor may
lie, gloss over, or just through ignorance, neglect huge hunks of
prior art.

And without a cost-effective way of interested third parties to attack
the patent after being granted, one gets this huge minefield of
garbage.
--
Nicholas C. Weaver nweaver@cs.berkeley.edu
 

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