New invention: Systematic method of coding wave pipelined ci

On Monday, March 30, 2015 at 2:18:41 AM UTC-7, diog...@gmail.com wrote:
On Sunday, March 29, 2015 at 5:47:01 PM UTC+13, Daniel Kho wrote:
On Saturday, 28 March 2015 19:16:38 UTC+8, Weng Tianxiang wrote:

Why currently VHDL committee has so many difficulties financially to get industries into its activities? One most important reason is that VHDL is now free to use for all related companies and they don't have to make their contributions.


That's the reason why standard bodies have by-laws that make sure any information submitted or discussed within working groups are not encumbered by patents. If you are trying to discuss your patent idea within a working group, you need to declare that the information has been patented. In which case, the Chair will tell the whole group to not use that information in the standardization process. I think this is how it goes for most standard bodies.


See http://www.eda.org/vasg/docs/Patent_disc_appropriate_topics.pdf Page 4:

* The DASC will only accept patented material
under paragraph (a) of IEEE Patent Policy

Where paragraph (a) is found on PDF Page 2 (Slide #1):

a) A general disclaimer to the effect that the patentee will not enforce
any of its present or future patent(s) whose use would be required to
implement either mandatory or optional potions of the proposed IEEE
standard against any person or entity complying with the standard; or


The VASG P1076 effort falls under these conditions, no one is going to get rich on a standard essential patent required to implement the VHDL standard (nor either Verilog standards also under the auspices of DASC).

Also note Page 3 (slide #2):

Inappropriate Topics for IEEE WG Meetings
* Don't discuss licensing terms or conditions
...

-dio,
Thank you for your good information.

No matter whether or not I get rich through it, I will perfect my invented method to make contribution to science.

I will have another two successive patent applications about the same topics to publish in this group to perfect "the systematic method of coding wave pipelined circuits in HDL" so that it will be used universally in all modern 4-core processors someday, not mention in FPGA.

If someone is tired of reading new inventions, please stay away and you are not forced or flirted to read those "confusing and snotty" inventions.

Weng


Here are some important sections in my patent application:

New concurrent link statement in HDL

[0137] In order to let a synthesizer identify which code is a wave-pipelining ready code and help check the correctness of connections and paired type between a WPC instantiation and a CPC instantiation, three versions of new concurrent link statement are suggested to be introduced into HDL.

[0138] Here is the definition of new concurrent link statement in bold type based on VHDL-2002:

concurrent_statement ::block_statement
| link_statement
| process_statement
| concurrent_procedure_call_statement
| concurrent_assertion_statement
| concurrent_signal_assignment_statement
| component_instantiation_statement
| generate_statement

link_statement ::[ link_label : ] link_name ( wave_pipelining_component_label ,
critical_path_component_label [ , alias_wave_constant_list ] ) ;

link_label ::= label
link_name ::= link1 | link2 | link3

wave_pipelining_component_label ::= label

critical_path_component_label ::=
series_component_label
|input_delay_component_label
|multiple_copy_component_label

series_component_label ::= label
input_delay_component_label ::= label
multiple_copy_component_label ::= generate_label , copy_component_label
copy_component_label ::= label

label ::= identifier

[0139] The set of following rules is called link statement mechanism:

* Link1 statement links a WPC series_module instantiation with a series CPC instantiation and optional alias wave constants whose initial value is wave constant series_clock_number and which share the wave constant value of the linked WPC series_module.

* Link2 statement links a WPC input_delay_module instantiation with a series or a feedback CPC instantiation, and optional alias wave constants whose initial value is either wave constant series_clock_number or input_clock_number and which share the wave constant value of the linked WPC input_delay_module.

* Link3 statement links a WPC multiple_copy_module instantiation with a generate statement, a series or a feedback CPC instantiation, and optional alias wave constants whose initial value is either wave constant series_clock_number or multiple_copy_number and which share the wave constant value of the linked WPC multiple_copy_module.

* Wave_pipelining_component_label is the label marking the instantiation of a WPC series_module, input_delay_module or multiple_copy_module.

* Critical_path_component_label is the label marking a CPC instantiation.
o Series_component_label is the label marking the instantiation of a series CPC linked by a link1 statement.
o Input_delay_component_label is the label marking the instantiation of a series or a feedback CPC linked by a link2 statement.
o Multiple_copy_component_label contains two labels, the first one is generate_label marking a generate statement which generates multiple copied CPCs, the second is copy_component_label marking the instantiation of one of multiple copied series or feedback CPCs and linked by a link3 statement.

* Both wave_pipelining_component_label and critical_path_component_label must be located within the concurrent statement area of same architecture based on VHDL-2002, and can be referenced before they are defined in a link statement which is located in the same concurrent statement area.

* An alias wave constant must be visible to the link statement it involves.

* When a WPC multiple_copy_module is instantiated and linked with a generate statement through a link3 statement, the wave constant multiple_copy_number in the multiple_copy_module receives its new initial value through wave constant mechanism under slow mode and target mode, respectively, and the linked generate statement uses the wave constant multiple_copy_number constant value to generate 1 or more CPC under slow mode and target mode, respectively. The range used in the generate statement is fixed and must be from 0 to multiple_copy_number-1 or multiple_copy_number-1 downto 0.

The following several sections will not be published because it is related to synthesizing technology:

How a synthesizer determines wave constant values for a linked pair of a WPC and a CPC.

How a synthesizer gets wave constant values of a WPC under target mode.

How a synthesizer gets an alias wave constant value under target mode.

How a designer generates a successful wave-pipelined design in HDL.



Thank you for your patient reading.

Weng
 
On Tuesday, March 31, 2015 at 11:31:35 AM UTC-4, Weng Tianxiang wrote:
On Tuesday, March 24, 2015 at 7:24:11 PM UTC-7, KJ wrote:
On Tuesday, March 24, 2015 at 2:24:31 PM UTC-4, Weng Tianxiang wrote:

Here I publish all source code for public confirmation.


What exactly would you like the public to confirm? Do you have made some specific claims?

Given that you have not claimed anything specific, I can only confirm the following:
- It does compile (Modelsim 10.3c)
- It does synthesize to something (Quartus 14.0; Top level entity=CPC1; 56 Max II logic elements)


You may copy this part of code to do simulation by yourself.


Why would I want to simulate it?

Kevin Jennings

Here is how I claim to increase very-hard-implemented wave pipelined circuits to 100% successful rate.

Since you had requested 'public confirmation', the 'public' states that your claim can be refuted, not confirmed. Maybe you'll have better luck at USPTO. Then again, you may actually have a requirement now to disclose this thread to USPTO as being relevant background information regarding your proposed invention.

Kevin
 
On Thursday, April 2, 2015 at 3:48:44 AM UTC+13, hssig wrote:
> Please spare us. I am so tired of reading your confusing and snotty postings.

hssig -

Water off a ducks back. He didn't take the hint. It seems no matter how anyone attempts to discourage him he continues on like some dreary (in an Edgar Allan Poe sense) Energizer bunny.
 
On Tuesday, February 24, 2015 at 12:09:40 PM UTC-5, Weng Tianxiang wrote:
Hi Jim, glen, JK, rickman, Mike, Andy,

I have filed a provisional patent application: "Systematic method of coding wave pipelined circuits in HDL". If it is proved correct, the patent will introduce 1 keyword, 3 permanent constants, 1 concurrent statement and four source code modules for a new library in HDL and thoroughly resolve a pending problem so that every digital designer can code wave-pipelined circuits in HDL.

Here is the abstract of the invention:

The present invention classifies all critical paths into two basic types: a series critical path and a feedback critical path, and divides each of wave-pipelined circuits into two components: a static logic part, called critical path component (CPC), and a dynamic logic part, formalized into four wave-pipelining components (WPC) shared by all wave-pipelined circuits. Each wave-pipelining ready code in HDL comprises two components: a WPC instantiation and a CPC instantiation wire-connected and linked by a new link statement. Each WPC has new wave constants which play the same role as generic constants do, but whose initial values are determined and assigned by a synthesizer after code analysis, so designers can use after-synthesization information in their code before synthesization for wave-pipelining technology. The responsibility of analyzing and manipulating wave-pipelining ready code, generating and implementing wave-pipelined circuits on a design-wide or chip-wide scale in HDL is shifted from designers to synthesizers.

Anyone who are interested in its content is welcome to send a email request to the following email address: wtx wtx @ gmail . com with title "Systematic" and he will receive the full documents: one specification, 9 drawings and one text file in VHDL.

If one reviews the files and feels that it would be a good thing to recommend the application to his company to buy it, the first person to do it after his recommended company does so will receive $10,000 commission fee.

Did you ever get your patent? I'm curious.

--

Rick C.

-- Get a 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209
 
Le lundi 25 mars 2019 18:29:39 UTC-4, gnuarm.del...@gmail.com a Êcrit :
On Tuesday, February 24, 2015 at 12:09:40 PM UTC-5, Weng Tianxiang wrote:
Hi Jim, glen, JK, rickman, Mike, Andy,

I have filed a provisional patent application: "Systematic method of coding wave pipelined circuits in HDL". If it is proved correct, the patent will introduce 1 keyword, 3 permanent constants, 1 concurrent statement and four source code modules for a new library in HDL and thoroughly resolve a pending problem so that every digital designer can code wave-pipelined circuits in HDL.

Here is the abstract of the invention:

The present invention classifies all critical paths into two basic types: a series critical path and a feedback critical path, and divides each of wave-pipelined circuits into two components: a static logic part, called critical path component (CPC), and a dynamic logic part, formalized into four wave-pipelining components (WPC) shared by all wave-pipelined circuits. Each wave-pipelining ready code in HDL comprises two components: a WPC instantiation and a CPC instantiation wire-connected and linked by a new link statement. Each WPC has new wave constants which play the same role as generic constants do, but whose initial values are determined and assigned by a synthesizer after code analysis, so designers can use after-synthesization information in their code before synthesization for wave-pipelining technology. The responsibility of analyzing and manipulating wave-pipelining ready code, generating and implementing wave-pipelined circuits on a design-wide or chip-wide scale in HDL is shifted from designers to synthesizers.

Anyone who are interested in its content is welcome to send a email request to the following email address: wtx wtx @ gmail . com with title "Systematic" and he will receive the full documents: one specification, 9 drawings and one text file in VHDL.

If one reviews the files and feels that it would be a good thing to recommend the application to his company to buy it, the first person to do it after his recommended company does so will receive $10,000 commission fee.

Did you ever get your patent? I'm curious.

--

Rick C.

-- Get a 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209

No grant so far...
 
On Wednesday, March 27, 2019 at 10:09:25 AM UTC-4, Benjamin Couillard wrote:
Le lundi 25 mars 2019 18:29:39 UTC-4, gnuarm.del...@gmail.com a Êcrit :
On Tuesday, February 24, 2015 at 12:09:40 PM UTC-5, Weng Tianxiang wrote:
Hi Jim, glen, JK, rickman, Mike, Andy,

I have filed a provisional patent application: "Systematic method of coding wave pipelined circuits in HDL". If it is proved correct, the patent will introduce 1 keyword, 3 permanent constants, 1 concurrent statement and four source code modules for a new library in HDL and thoroughly resolve a pending problem so that every digital designer can code wave-pipelined circuits in HDL.

Here is the abstract of the invention:

The present invention classifies all critical paths into two basic types: a series critical path and a feedback critical path, and divides each of wave-pipelined circuits into two components: a static logic part, called critical path component (CPC), and a dynamic logic part, formalized into four wave-pipelining components (WPC) shared by all wave-pipelined circuits. Each wave-pipelining ready code in HDL comprises two components: a WPC instantiation and a CPC instantiation wire-connected and linked by a new link statement. Each WPC has new wave constants which play the same role as generic constants do, but whose initial values are determined and assigned by a synthesizer after code analysis, so designers can use after-synthesization information in their code before synthesization for wave-pipelining technology. The responsibility of analyzing and manipulating wave-pipelining ready code, generating and implementing wave-pipelined circuits on a design-wide or chip-wide scale in HDL is shifted from designers to synthesizers.

Anyone who are interested in its content is welcome to send a email request to the following email address: wtx wtx @ gmail . com with title "Systematic" and he will receive the full documents: one specification, 9 drawings and one text file in VHDL.

If one reviews the files and feels that it would be a good thing to recommend the application to his company to buy it, the first person to do it after his recommended company does so will receive $10,000 commission fee..

Did you ever get your patent? I'm curious.

--

Rick C.

-- Get a 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209

No grant so far...

Ok, good luck.

--

Rick C.

- Get a 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209
 
Le mercredi 27 mars 2019 14:12:00 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Wednesday, March 27, 2019 at 10:09:25 AM UTC-4, Benjamin Couillard wrote:
Le lundi 25 mars 2019 18:29:39 UTC-4, gnuarm.del...@gmail.com a Êcrit :
On Tuesday, February 24, 2015 at 12:09:40 PM UTC-5, Weng Tianxiang wrote:
Hi Jim, glen, JK, rickman, Mike, Andy,

I have filed a provisional patent application: "Systematic method of coding wave pipelined circuits in HDL". If it is proved correct, the patent will introduce 1 keyword, 3 permanent constants, 1 concurrent statement and four source code modules for a new library in HDL and thoroughly resolve a pending problem so that every digital designer can code wave-pipelined circuits in HDL.

Here is the abstract of the invention:

The present invention classifies all critical paths into two basic types: a series critical path and a feedback critical path, and divides each of wave-pipelined circuits into two components: a static logic part, called critical path component (CPC), and a dynamic logic part, formalized into four wave-pipelining components (WPC) shared by all wave-pipelined circuits. Each wave-pipelining ready code in HDL comprises two components: a WPC instantiation and a CPC instantiation wire-connected and linked by a new link statement. Each WPC has new wave constants which play the same role as generic constants do, but whose initial values are determined and assigned by a synthesizer after code analysis, so designers can use after-synthesization information in their code before synthesization for wave-pipelining technology. The responsibility of analyzing and manipulating wave-pipelining ready code, generating and implementing wave-pipelined circuits on a design-wide or chip-wide scale in HDL is shifted from designers to synthesizers..

Anyone who are interested in its content is welcome to send a email request to the following email address: wtx wtx @ gmail . com with title "Systematic" and he will receive the full documents: one specification, 9 drawings and one text file in VHDL.

If one reviews the files and feels that it would be a good thing to recommend the application to his company to buy it, the first person to do it after his recommended company does so will receive $10,000 commission fee.

Did you ever get your patent? I'm curious.

--

Rick C.

-- Get a 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209

No grant so far...

Ok, good luck.

--

Rick C.

- Get a 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

Well I highly doubt the OP will get a grant.
 
On Wednesday, March 27, 2019 at 5:29:08 PM UTC-4, Benjamin Couillard wrote:
Le mercredi 27 mars 2019 14:12:00 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Wednesday, March 27, 2019 at 10:09:25 AM UTC-4, Benjamin Couillard wrote:
Le lundi 25 mars 2019 18:29:39 UTC-4, gnuarm.del...@gmail.com a Êcrit :
On Tuesday, February 24, 2015 at 12:09:40 PM UTC-5, Weng Tianxiang wrote:
Hi Jim, glen, JK, rickman, Mike, Andy,

I have filed a provisional patent application: "Systematic method of coding wave pipelined circuits in HDL". If it is proved correct, the patent will introduce 1 keyword, 3 permanent constants, 1 concurrent statement and four source code modules for a new library in HDL and thoroughly resolve a pending problem so that every digital designer can code wave-pipelined circuits in HDL.

Here is the abstract of the invention:

The present invention classifies all critical paths into two basic types: a series critical path and a feedback critical path, and divides each of wave-pipelined circuits into two components: a static logic part, called critical path component (CPC), and a dynamic logic part, formalized into four wave-pipelining components (WPC) shared by all wave-pipelined circuits. Each wave-pipelining ready code in HDL comprises two components: a WPC instantiation and a CPC instantiation wire-connected and linked by a new link statement. Each WPC has new wave constants which play the same role as generic constants do, but whose initial values are determined and assigned by a synthesizer after code analysis, so designers can use after-synthesization information in their code before synthesization for wave-pipelining technology. The responsibility of analyzing and manipulating wave-pipelining ready code, generating and implementing wave-pipelined circuits on a design-wide or chip-wide scale in HDL is shifted from designers to synthesizers.

Anyone who are interested in its content is welcome to send a email request to the following email address: wtx wtx @ gmail . com with title "Systematic" and he will receive the full documents: one specification, 9 drawings and one text file in VHDL.

If one reviews the files and feels that it would be a good thing to recommend the application to his company to buy it, the first person to do it after his recommended company does so will receive $10,000 commission fee.

Did you ever get your patent? I'm curious.

--

Rick C.

-- Get a 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209

No grant so far...

Ok, good luck.

--

Rick C.

- Get a 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

Well I highly doubt the OP will get a grant.

Don't know. I would like to see the application.

--

Rick C.

+ Get a 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209
 
Le mercredi 27 mars 2019 19:36:23 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Wednesday, March 27, 2019 at 5:29:08 PM UTC-4, Benjamin Couillard wrote:
Le mercredi 27 mars 2019 14:12:00 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Wednesday, March 27, 2019 at 10:09:25 AM UTC-4, Benjamin Couillard wrote:
Le lundi 25 mars 2019 18:29:39 UTC-4, gnuarm.del...@gmail.com a Êcrit :
On Tuesday, February 24, 2015 at 12:09:40 PM UTC-5, Weng Tianxiang wrote:
Hi Jim, glen, JK, rickman, Mike, Andy,

I have filed a provisional patent application: "Systematic method of coding wave pipelined circuits in HDL". If it is proved correct, the patent will introduce 1 keyword, 3 permanent constants, 1 concurrent statement and four source code modules for a new library in HDL and thoroughly resolve a pending problem so that every digital designer can code wave-pipelined circuits in HDL.

Here is the abstract of the invention:

The present invention classifies all critical paths into two basic types: a series critical path and a feedback critical path, and divides each of wave-pipelined circuits into two components: a static logic part, called critical path component (CPC), and a dynamic logic part, formalized into four wave-pipelining components (WPC) shared by all wave-pipelined circuits. Each wave-pipelining ready code in HDL comprises two components: a WPC instantiation and a CPC instantiation wire-connected and linked by a new link statement. Each WPC has new wave constants which play the same role as generic constants do, but whose initial values are determined and assigned by a synthesizer after code analysis, so designers can use after-synthesization information in their code before synthesization for wave-pipelining technology. The responsibility of analyzing and manipulating wave-pipelining ready code, generating and implementing wave-pipelined circuits on a design-wide or chip-wide scale in HDL is shifted from designers to synthesizers.

Anyone who are interested in its content is welcome to send a email request to the following email address: wtx wtx @ gmail . com with title "Systematic" and he will receive the full documents: one specification, 9 drawings and one text file in VHDL.

If one reviews the files and feels that it would be a good thing to recommend the application to his company to buy it, the first person to do it after his recommended company does so will receive $10,000 commission fee.

Did you ever get your patent? I'm curious.

--

Rick C.

-- Get a 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209

No grant so far...

Ok, good luck.

--

Rick C.

- Get a 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

Well I highly doubt the OP will get a grant.

Don't know. I would like to see the application.

--

Rick C.

+ Get a 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209

https://patents.google.com/patent/US9747252B2/en
 
Le jeudi 28 mars 2019 08:10:38 UTC-4, Benjamin Couillard a Êcrit :
Le mercredi 27 mars 2019 19:36:23 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Wednesday, March 27, 2019 at 5:29:08 PM UTC-4, Benjamin Couillard wrote:
Le mercredi 27 mars 2019 14:12:00 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Wednesday, March 27, 2019 at 10:09:25 AM UTC-4, Benjamin Couillard wrote:
Le lundi 25 mars 2019 18:29:39 UTC-4, gnuarm.del...@gmail.com a Êcrit :
On Tuesday, February 24, 2015 at 12:09:40 PM UTC-5, Weng Tianxiang wrote:
Hi Jim, glen, JK, rickman, Mike, Andy,

I have filed a provisional patent application: "Systematic method of coding wave pipelined circuits in HDL". If it is proved correct, the patent will introduce 1 keyword, 3 permanent constants, 1 concurrent statement and four source code modules for a new library in HDL and thoroughly resolve a pending problem so that every digital designer can code wave-pipelined circuits in HDL.

Here is the abstract of the invention:

The present invention classifies all critical paths into two basic types: a series critical path and a feedback critical path, and divides each of wave-pipelined circuits into two components: a static logic part, called critical path component (CPC), and a dynamic logic part, formalized into four wave-pipelining components (WPC) shared by all wave-pipelined circuits. Each wave-pipelining ready code in HDL comprises two components: a WPC instantiation and a CPC instantiation wire-connected and linked by a new link statement. Each WPC has new wave constants which play the same role as generic constants do, but whose initial values are determined and assigned by a synthesizer after code analysis, so designers can use after-synthesization information in their code before synthesization for wave-pipelining technology. The responsibility of analyzing and manipulating wave-pipelining ready code, generating and implementing wave-pipelined circuits on a design-wide or chip-wide scale in HDL is shifted from designers to synthesizers.

Anyone who are interested in its content is welcome to send a email request to the following email address: wtx wtx @ gmail . com with title "Systematic" and he will receive the full documents: one specification, 9 drawings and one text file in VHDL.

If one reviews the files and feels that it would be a good thing to recommend the application to his company to buy it, the first person to do it after his recommended company does so will receive $10,000 commission fee.

Did you ever get your patent? I'm curious.

--

Rick C.

-- Get a 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209

No grant so far...

Ok, good luck.

--

Rick C.

- Get a 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

Well I highly doubt the OP will get a grant.

Don't know. I would like to see the application.

--

Rick C.

+ Get a 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209

https://patents.google.com/patent/US9747252B2/en

My bad, apparently he did get his patent accepted if I understandarc correctly...
 
On Thursday, March 28, 2019 at 8:10:38 AM UTC-4, Benjamin Couillard wrote:
Le mercredi 27 mars 2019 19:36:23 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Wednesday, March 27, 2019 at 5:29:08 PM UTC-4, Benjamin Couillard wrote:
Le mercredi 27 mars 2019 14:12:00 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Wednesday, March 27, 2019 at 10:09:25 AM UTC-4, Benjamin Couillard wrote:
Le lundi 25 mars 2019 18:29:39 UTC-4, gnuarm.del...@gmail.com a Êcrit :
On Tuesday, February 24, 2015 at 12:09:40 PM UTC-5, Weng Tianxiang wrote:
Hi Jim, glen, JK, rickman, Mike, Andy,

I have filed a provisional patent application: "Systematic method of coding wave pipelined circuits in HDL". If it is proved correct, the patent will introduce 1 keyword, 3 permanent constants, 1 concurrent statement and four source code modules for a new library in HDL and thoroughly resolve a pending problem so that every digital designer can code wave-pipelined circuits in HDL.

Here is the abstract of the invention:

The present invention classifies all critical paths into two basic types: a series critical path and a feedback critical path, and divides each of wave-pipelined circuits into two components: a static logic part, called critical path component (CPC), and a dynamic logic part, formalized into four wave-pipelining components (WPC) shared by all wave-pipelined circuits. Each wave-pipelining ready code in HDL comprises two components: a WPC instantiation and a CPC instantiation wire-connected and linked by a new link statement. Each WPC has new wave constants which play the same role as generic constants do, but whose initial values are determined and assigned by a synthesizer after code analysis, so designers can use after-synthesization information in their code before synthesization for wave-pipelining technology. The responsibility of analyzing and manipulating wave-pipelining ready code, generating and implementing wave-pipelined circuits on a design-wide or chip-wide scale in HDL is shifted from designers to synthesizers.

Anyone who are interested in its content is welcome to send a email request to the following email address: wtx wtx @ gmail . com with title "Systematic" and he will receive the full documents: one specification, 9 drawings and one text file in VHDL.

If one reviews the files and feels that it would be a good thing to recommend the application to his company to buy it, the first person to do it after his recommended company does so will receive $10,000 commission fee.

Did you ever get your patent? I'm curious.

--

Rick C.

-- Get a 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209

No grant so far...

Ok, good luck.

--

Rick C.

- Get a 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

Well I highly doubt the OP will get a grant.

Don't know. I would like to see the application.

--

Rick C.

+ Get a 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209

https://patents.google.com/patent/US9747252B2/en

When I replied I didn't notice you weren't him.

Looks like he got two on this topic.

https://patents.google.com/patent/US9575929B2/en

--

Rick C.

-+ Get a 1,000 miles of free Supercharging
-+ Tesla referral code - https://ts.la/richard11209
 
Le jeudi 28 mars 2019 09:47:06 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Thursday, March 28, 2019 at 8:10:38 AM UTC-4, Benjamin Couillard wrote:
Le mercredi 27 mars 2019 19:36:23 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Wednesday, March 27, 2019 at 5:29:08 PM UTC-4, Benjamin Couillard wrote:
Le mercredi 27 mars 2019 14:12:00 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Wednesday, March 27, 2019 at 10:09:25 AM UTC-4, Benjamin Couillard wrote:
Le lundi 25 mars 2019 18:29:39 UTC-4, gnuarm.del...@gmail.com a Êcrit :
On Tuesday, February 24, 2015 at 12:09:40 PM UTC-5, Weng Tianxiang wrote:
Hi Jim, glen, JK, rickman, Mike, Andy,

I have filed a provisional patent application: "Systematic method of coding wave pipelined circuits in HDL". If it is proved correct, the patent will introduce 1 keyword, 3 permanent constants, 1 concurrent statement and four source code modules for a new library in HDL and thoroughly resolve a pending problem so that every digital designer can code wave-pipelined circuits in HDL.

Here is the abstract of the invention:

The present invention classifies all critical paths into two basic types: a series critical path and a feedback critical path, and divides each of wave-pipelined circuits into two components: a static logic part, called critical path component (CPC), and a dynamic logic part, formalized into four wave-pipelining components (WPC) shared by all wave-pipelined circuits. Each wave-pipelining ready code in HDL comprises two components: a WPC instantiation and a CPC instantiation wire-connected and linked by a new link statement. Each WPC has new wave constants which play the same role as generic constants do, but whose initial values are determined and assigned by a synthesizer after code analysis, so designers can use after-synthesization information in their code before synthesization for wave-pipelining technology. The responsibility of analyzing and manipulating wave-pipelining ready code, generating and implementing wave-pipelined circuits on a design-wide or chip-wide scale in HDL is shifted from designers to synthesizers.

Anyone who are interested in its content is welcome to send a email request to the following email address: wtx wtx @ gmail . com with title "Systematic" and he will receive the full documents: one specification, 9 drawings and one text file in VHDL.

If one reviews the files and feels that it would be a good thing to recommend the application to his company to buy it, the first person to do it after his recommended company does so will receive $10,000 commission fee.

Did you ever get your patent? I'm curious.

--

Rick C.

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No grant so far...

Ok, good luck.

--

Rick C.

- Get a 1,000 miles of free Supercharging
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Well I highly doubt the OP will get a grant.

Don't know. I would like to see the application.

--

Rick C.

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+ Tesla referral code - https://ts.la/richard11209

https://patents.google.com/patent/US9747252B2/en

When I replied I didn't notice you weren't him.

Looks like he got two on this topic.

https://patents.google.com/patent/US9575929B2/en

--

Rick C.

-+ Get a 1,000 miles of free Supercharging
-+ Tesla referral code - https://ts.la/richard11209

But then again, someone got a patent for a combover... Not every patent is worth something

https://patents.google.com/patent/US4022227A/en
 
On Thursday, March 28, 2019 at 10:51:21 AM UTC-4, Benjamin Couillard wrote:
Le jeudi 28 mars 2019 09:47:06 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Thursday, March 28, 2019 at 8:10:38 AM UTC-4, Benjamin Couillard wrote:
Le mercredi 27 mars 2019 19:36:23 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Wednesday, March 27, 2019 at 5:29:08 PM UTC-4, Benjamin Couillard wrote:
Le mercredi 27 mars 2019 14:12:00 UTC-4, gnuarm.de...@gmail.com a Êcrit :
On Wednesday, March 27, 2019 at 10:09:25 AM UTC-4, Benjamin Couillard wrote:
Le lundi 25 mars 2019 18:29:39 UTC-4, gnuarm.del...@gmail.com a Êcrit :
On Tuesday, February 24, 2015 at 12:09:40 PM UTC-5, Weng Tianxiang wrote:
Hi Jim, glen, JK, rickman, Mike, Andy,

I have filed a provisional patent application: "Systematic method of coding wave pipelined circuits in HDL". If it is proved correct, the patent will introduce 1 keyword, 3 permanent constants, 1 concurrent statement and four source code modules for a new library in HDL and thoroughly resolve a pending problem so that every digital designer can code wave-pipelined circuits in HDL.

Here is the abstract of the invention:

The present invention classifies all critical paths into two basic types: a series critical path and a feedback critical path, and divides each of wave-pipelined circuits into two components: a static logic part, called critical path component (CPC), and a dynamic logic part, formalized into four wave-pipelining components (WPC) shared by all wave-pipelined circuits. Each wave-pipelining ready code in HDL comprises two components: a WPC instantiation and a CPC instantiation wire-connected and linked by a new link statement. Each WPC has new wave constants which play the same role as generic constants do, but whose initial values are determined and assigned by a synthesizer after code analysis, so designers can use after-synthesization information in their code before synthesization for wave-pipelining technology. The responsibility of analyzing and manipulating wave-pipelining ready code, generating and implementing wave-pipelined circuits on a design-wide or chip-wide scale in HDL is shifted from designers to synthesizers.

Anyone who are interested in its content is welcome to send a email request to the following email address: wtx wtx @ gmail . com with title "Systematic" and he will receive the full documents: one specification, 9 drawings and one text file in VHDL.

If one reviews the files and feels that it would be a good thing to recommend the application to his company to buy it, the first person to do it after his recommended company does so will receive $10,000 commission fee.

Did you ever get your patent? I'm curious.

--

Rick C.

-- Get a 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209

No grant so far...

Ok, good luck.

--

Rick C.

- Get a 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

Well I highly doubt the OP will get a grant.

Don't know. I would like to see the application.

--

Rick C.

+ Get a 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209

https://patents.google.com/patent/US9747252B2/en

When I replied I didn't notice you weren't him.

Looks like he got two on this topic.

https://patents.google.com/patent/US9575929B2/en

--

Rick C.

-+ Get a 1,000 miles of free Supercharging
-+ Tesla referral code - https://ts.la/richard11209

But then again, someone got a patent for a combover... Not every patent is worth something

https://patents.google.com/patent/US4022227A/en

I won't argue that. I really never saw the utility of his patent or even that it described anything "novel". He sort of said wave pipelined circuits need these basic tools and someone needs to provide them. All the while not actually appreciating nuance of what has to be done to make them work.

--

Rick C.

+- Get a 1,000 miles of free Supercharging
+- Tesla referral code - https://ts.la/richard11209
 
On Thursday, March 28, 2019 at 8:10:38 AM UTC-4, Benjamin Couillard wrote:
https://patents.google.com/patent/US9747252B2/en

Weng apparently doesn't understand how standards committees work. He states "What the present invention hopes to do is: Invent a wave-pipelining coding system as new part of HDL standards...", but standards organizations are not going to accept patented info to put it into a standard since the patent holder can then claim infringement by any user. If he plans to 'donate' the patent so that the standard organization could use it, then he could have simply published it and put it into the public domain that way...he didn't. Now with the patent, he will need to submit a 'Letter of Assurance' to the standards committees to move it forward [1].

But he does have a plan, coercion. He states "If the coding system becomes new part of HDL standards all synthesizer manufactures will automatically be forced to implement..."

But maybe he has no particular time frame in mind. In 20 years when the patent is no longer valid, the HDL standards could decide to pick it up. Ten years later the HDL standard gets updated [2], [3], [4], and another ten years later the synthesis vendors pick it up and incorporate it. Given that time frame, I'm probably not the only one who could reasonably state "That will happen over my dead body".

If the plan is to get it into the HDL standards, then it would not seem likely that anyone would license the technology from him so there is no patent revenue to be expected...not the best business plan.

As for what the patent says technically, well that is suspect as well based on what he put out in this group earlier but I haven't reviewed the actual patent enough at this point.

Kevin Jennings

[1] https://standards.ieee.org/about/policies/bylaws/sect6-7.html
[2] The last VHDL update was 11 years ago in 2008.
[3] The group that is putting together the next revision has been going at it for about eight years now and is still not 'done'. They are in the balloting stage but have been so for quite a while.
[4] The Twiki site for the proposed new standard labels it as "VHDL-2017", so it's already two years old and has yet to hit the bookshelves (http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/WebHome)
 

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