Moving Sum

[Christos]

"Tom Seim" <soar2morrow@yahoo.com> wrote in message
news:6c71b322.0309021211.522fed48@posting.google.com...

The processes that will go up to 100s will take an average of 8 values
and
store that value to the external memory. In that way the data are
minimised
by a factor of 8 and the system error is negligible.
The SRAM that was found can be used in the architecture of 1M x 72bit,
so 8
accesses in parallel times two in 40 us seems to be more than ok
One problem now is how to implement this! my experience do go that far!
You've said something about instantiating a processor (I guess something
like NIOS), are you sure that this will not complicate things more?
Is there something ready to implement a circular buffer to the external
ram?

The second problem, and the reason why I asked for help in this group,
is
that those SRAMS are quite expensive and having in mind that 2000 of
them
will be needed, it increases the cost significantly. So they are
pressing me
to find some other way to implement it. (usual stuff: we want the pie
and
the dog fed!)

I don't understand why you need 2000 SRAMs.

25 KHz x 16 x 100 = 40 MB

or 8 SRAMs.

In the first paragraph I explain that saving the average values of 8 samples
the data are minimised by a factor of 8. So 5 MB have to be stored for this
system (up to 100s) which fit together with the data of the first system (up
to 10ms) in one SRAM. On the card there are 2 more to hold other data. And
650 of these cards are needed, that gives ~2000 SRAMs.

Sorry for not been that clear but the mail was already too long and I didn't
want to kill you with
boredom completely!

Christos