MachXO2 pin mismatch error...

P

Piotr Wyderski

Guest
Hi,

I am trying to use a PMI ROM memory block in Lattice Diamond/VHDL:

decoder_rom0 : pmi_rom generic map (

pmi_addr_width => 3,
pmi_data_width => decoder_rom_data\'length,
pmi_regmode => \"noreg\",
pmi_gsr => \"disable\",
pmi_resetmode => \"sync\",
pmi_optimization => \"area\",
pmi_init_file => \"i2c_decoder_rom.mem\",
pmi_init_file_format => \"binary\"

) port map (

Address => std_logic_vector(decoder_rom_address),
OutClock => clk,
OutClockEn => trigger,
Reset => reset,
Q => decoder_rom_data
);

At a later stage the compiler fails with:

Loading NGO design \'lngotmp/pmi_romebi2c_decoder_romasdn43512db0f16b.ngo\'...
ERROR - Pin mismatch between block
\'i2c0/pmi_romECbinaryi2c_decoder_rom.memareasyncdisablenoreg43512\',
TYPE=\'pmi_romEbi2c_decoder_romasdn43512db0f16b\', and file
\'lngotmp/pmi_romebi2c_decoder_romasdn43512db0f16b.ngo\' at pin
\'Address[2:0](2)\'.
Done: error code 2

Synplify synthesizes the bitstream without a warning, so the issue must
be related to the LSE. What can I do with it?

Best regards, Piotr
 
On 11/03/2021 13:33, Piotr Wyderski wrote:
Hi,

I am trying to use a PMI ROM memory block in Lattice Diamond/VHDL:

    decoder_rom0 : pmi_rom generic map (

       pmi_addr_width => 3,
       pmi_data_width => decoder_rom_data\'length,
       pmi_regmode => \"noreg\",
       pmi_gsr => \"disable\",
       pmi_resetmode => \"sync\",
       pmi_optimization => \"area\",
       pmi_init_file => \"i2c_decoder_rom.mem\",
       pmi_init_file_format => \"binary\"

    ) port map (

        Address => std_logic_vector(decoder_rom_address),
        OutClock => clk,
        OutClockEn => trigger,
        Reset => reset,
        Q => decoder_rom_data
    );

At a later stage the compiler fails with:

Loading NGO design
\'lngotmp/pmi_romebi2c_decoder_romasdn43512db0f16b.ngo\'...
ERROR - Pin mismatch between block
\'i2c0/pmi_romECbinaryi2c_decoder_rom.memareasyncdisablenoreg43512\',
TYPE=\'pmi_romEbi2c_decoder_romasdn43512db0f16b\', and file
\'lngotmp/pmi_romebi2c_decoder_romasdn43512db0f16b.ngo\' at pin
\'Address[2:0](2)\'.
Done: error code 2

Synplify synthesizes the bitstream without a warning, so the issue must
be related to the LSE. What can I do with it?

    Best regards, Piotr

I assume you are running the latest version of Diamond and have checked
the port mapping. The first thing I would do is to log an issue with
Lattice. Next start modifying the code to see if you can make it work, I
would start by changing the \'length attribute on your generic.

Good luck,

Hans.
www.ht-lab.com
 
On 11/03/2021 13:33, Piotr Wyderski wrote:
Hi,

I am trying to use a PMI ROM memory block in Lattice Diamond/VHDL:

    decoder_rom0 : pmi_rom generic map (

       pmi_addr_width => 3,
       pmi_data_width => decoder_rom_data\'length,
       pmi_regmode => \"noreg\",
       pmi_gsr => \"disable\",
       pmi_resetmode => \"sync\",
       pmi_optimization => \"area\",
       pmi_init_file => \"i2c_decoder_rom.mem\",
       pmi_init_file_format => \"binary\"

    ) port map (

        Address => std_logic_vector(decoder_rom_address),
        OutClock => clk,
        OutClockEn => trigger,
        Reset => reset,
        Q => decoder_rom_data
    );

At a later stage the compiler fails with:

Loading NGO design
\'lngotmp/pmi_romebi2c_decoder_romasdn43512db0f16b.ngo\'...
ERROR - Pin mismatch between block
\'i2c0/pmi_romECbinaryi2c_decoder_rom.memareasyncdisablenoreg43512\',
TYPE=\'pmi_romEbi2c_decoder_romasdn43512db0f16b\', and file
\'lngotmp/pmi_romebi2c_decoder_romasdn43512db0f16b.ngo\' at pin
\'Address[2:0](2)\'.
Done: error code 2

Synplify synthesizes the bitstream without a warning, so the issue must
be related to the LSE. What can I do with it?

    Best regards, Piotr

I assume you are running the latest version of Diamond and have checked
the port mapping. The first thing I would do is to log an issue with
Lattice. Next start modifying the code to see if you can make it work, I
would start by changing the \'length attribute on your generic.

Good luck,

Hans.
www.ht-lab.com
 

Welcome to EDABoard.com

Sponsor

Back
Top