keywords versus language complexity

[HT-Lab]

For those who haven't seen this article (edacafe.com):

http://www10.edacafe.com/blogs/realintent/2015/11/12/is-systemverilog-the-cobol-of-electronic-design/

Regarding the stackoverflow question, I counted 129 reserved words in
VHDL (14 for PSL, excluded VHPI), which is not bad ;-)

Hans
www.ht-lab.com

 

[Chris Higgs]

Another proxy for complexity - language specification length: http://www.fivecomputers.com/language-specification-length.html

 

[HT-Lab]

On 16/11/2015 14:01, Chris Higgs wrote:

Another proxy for complexity - language specification length: http://www.fivecomputers.com/language-specification-length.html

Hi Chris,

Yes the LRM could also be a good indicator of language complexity. I
just checked a draft 1076-2008 standard which comes in at 636 pages,
however, if I take the VHPI part out (the largest section) and the BNF
pages then we end up with about 290 pages of pure VHDL goodness. Which
again is not bad compared to SV distilled 899 pages (according to your
link).

I actually mentioned the article as most of us don't realise the pain
parser and tool developers have to go through to support all the
esoteric feature mentioned in an LRM. SV is clearly a complex language
and with the small user base you will pay through the nose for tools
that fully support it.

We are lucky to have Jim Lewis driving the next VHDL standard so I am
sure VHDL will remain lean and mean (well at least in terms of RTL
standards ;-)

Regards,
Hans.
www.ht-lab.com

 

[Nicholas Collin Paul de G]

HT-Lab submitted:
|-----------------------------------------------------------------------------|
|"[. . .] |
|[. . .] if I |
|take [out . . .] the BNF pages then we end up |
|with about 290 pages of pure VHDL goodness. [. . .] |
|[. . .] |
| |
|I actually mentioned the article as most of us don't realise the pain parser |
|and tool developers have to go through to support all the esoteric feature |
|mentioned in an LRM. [. . .] |
|[. . .]" |
|-----------------------------------------------------------------------------|

Hi Hans,

Without a BNF there is no parser.

|-----------------------------------------------------------------------------|
|"We are lucky to have Jim Lewis driving the next VHDL standard [. . .] |
|[. . .] |
| |
|Regards, |
|Hans. |
| www.ht-lab.com " |
|-----------------------------------------------------------------------------|

True.

Regards,
Nicholas Collin Paul de Gloucester