HDLC Clocking

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Is there a standard for the clocking in HDLC? I have seen examples where data is transmitted on rising edge of TXCLK and sampled on falling edge ... as well as examples where data is transmitted on falling edge of TXCLK and sampled on rising edge.

I can't seem to find any mention in the HDLC standard.
 
On Saturday, August 17, 2019 at 11:01:46 AM UTC-4, digita...@gmail.com wrote:
Is there a standard for the clocking in HDLC? I have seen examples where data is transmitted on rising edge of TXCLK and sampled on falling edge ... as well as examples where data is transmitted on falling edge of TXCLK and sampled on rising edge.

I can't seem to find any mention in the HDLC standard.

HDLC doesn't seem to specify the clock. I would expect the clock to be specified at a lower level protocol. HDLC can be used over async links where no clock is transmitted. So clearly no clock edge could be specified in that case.

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Rick C.

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On 8/17/19 11:01 AM, digitalguy33@gmail.com wrote:
Is there a standard for the clocking in HDLC? I have seen examples where data is transmitted on rising edge of TXCLK and sampled on falling edge ... as well as examples where data is transmitted on falling edge of TXCLK and sampled on rising edge.

I can't seem to find any mention in the HDLC standard.

I think the issue is that is a detail at a different level than the HDLC
standard, dealing with the physical transport layer. HDLC doesn't even
imply that there IS a clock transferred between units to worry about
what edge to use, and in fact has pieces that make sure there is enough
data transitions to allow for clock recovery operation in the receiver.
 

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