EMAC in EDK...

[Terry Andersen]

Hi I am using EDK 3.2 and I have the Memec board MB1000 with the P160
communication module.
I would like to send and receive Ethernet frames. Has anyone have any luck
doing this?
What should I setup (in code that is)?

Best Regards
Terry

 

[Erik Hansen]

Hi Terry, <BR>
have your read Xilinx's Application Note xapp663 "TCP/IP on Virtex-II Pro <BR>
Devices Using lwIP"? <BR>
They have implemented an light-weight IP stack. Perhaps you an see from <BR>
their sources how to send and receive Ethernet frame. <BR>
The Application Note and the source code is availble form Xilinx's hompage <BR>
Regards <BR>
Erik

 

[Terry Andersen]

"Erik Hansen" &lt;hansen@shf.biz&gt; wrote in message
news:ee7fb33.0@WebX.sUN8CHnE...
Hi Terry,
have your read Xilinx's Application Note xapp663 "TCP/IP on Virtex-II Pro
Devices Using lwIP"?
They have implemented an light-weight IP stack. Perhaps you an see from
their sources how to send and receive Ethernet frame.
The Application Note and the source code is availble form Xilinx's
hompage
Regards
Erik

Hi Erik. Thanks a lot for the reply. Here is my MHS:

# Parameters
PARAMETER VERSION = 2.0.0

# Global Ports

PORT sys_clk_raw = sys_clk_raw, DIR = IN, SIGIS = CLK
PORT ddr_clk_fb = ddr_clk_fb, DIR = IN, SIGIS = CLK
PORT rx = rx, DIR = IN
PORT tx = tx, DIR = OUT
PORT IAD_GP = IAD_GP, DIR = INOUT, VEC = [0:15]
PORT IDMA_CNTL_GP = IDMA_CNTL_GP, DIR = INOUT, VEC = [0:7]
PORT Buttons_GP = Buttons_GP, DIR = INOUT, VEC = [0:1]
PORT pwm0 = pwm0, DIR = OUT
PORT ddr_clk = ddr_clk, DIR = OUT
PORT ddr_clkn = ddr_clkn, DIR = OUT
PORT ddr_clke = ddr_clke, DIR = OUT
PORT ddr_csn = ddr_csn, DIR = OUT
PORT ddr_rasn = ddr_rasn, DIR = OUT
PORT ddr_casn = ddr_casn, DIR = OUT
PORT ddr_wen = ddr_wen, DIR = OUT
PORT ddr_dqm = ddr_dqm, DIR = OUT, VEC = [0:1]
PORT ddr_ba = ddr_ba, DIR = OUT, VEC = [0:1]
PORT ddr_addr = ddr_addr, DIR = OUT, VEC = [0:12]
PORT ddr_dq = ddr_dq, DIR = INOUT, VEC = [0:15]
PORT ddr_dqs = ddr_dqs, DIR = INOUT, VEC = [0:1]
PORT RESET_GP = RESET_GP, DIR = INOUT, VEC = [0:1]
PORT system_reset = system_reset, DIR = IN

# Sub Components


BEGIN dcm_ip
PARAMETER INSTANCE = mydcm1_dcm_ip
PORT sys_clk = sys_clk_raw
PORT clk0_out = sys_clk
PORT clk90_out = sys_clk_90
END

BEGIN dcm_ip
PARAMETER INSTANCE = mydcm2_dcm_ip
PORT sys_clk = ddr_clk_fb
PORT clk90_out = ddr_clk_90
END

BEGIN lmb_bram_if_cntlr
PARAMETER INSTANCE = islmb
PARAMETER HW_VER = 1.00.b
PARAMETER C_BASEADDR = 0x00000000
PARAMETER C_HIGHADDR = 0x0000FFFF
BUS_INTERFACE SLMB = i_lmb
BUS_INTERFACE BRAM_PORT = porta
END

BEGIN lmb_bram_if_cntlr
PARAMETER INSTANCE = dslmb
PARAMETER HW_VER = 1.00.b
PARAMETER C_BASEADDR = 0x00000000
PARAMETER C_HIGHADDR = 0x0000FFFF
BUS_INTERFACE SLMB = d_lmb
BUS_INTERFACE BRAM_PORT = portb
END

BEGIN bram_block
PARAMETER INSTANCE = bram1
PARAMETER HW_VER = 1.00.a
PARAMETER C_MEMSIZE = 131072
PARAMETER C_PORT_DWIDTH = 32
PARAMETER C_PORT_AWIDTH = 32
PARAMETER C_NUM_WE = 4
BUS_INTERFACE PORTA = porta
BUS_INTERFACE PORTB = portb
END

BEGIN microblaze
PARAMETER INSTANCE = mblaze
PARAMETER HW_VER = 1.00.c
PARAMETER C_DATA_SIZE = 32
PARAMETER C_USE_BARREL = 0
PARAMETER C_FSL_LINKS = 0
PARAMETER C_FSL_DATA_SIZE = 32
PORT CLK = sys_clk
PORT INTERRUPT = the_interrupt
BUS_INTERFACE DLMB = d_lmb
BUS_INTERFACE ILMB = i_lmb
BUS_INTERFACE DOPB = myopb
END

BEGIN opb_uartlite
PARAMETER INSTANCE = myuart
PARAMETER HW_VER = 1.00.b
PARAMETER C_DATA_BITS = 8
PARAMETER C_CLK_FREQ = 100000000
PARAMETER C_BAUDRATE = 19200
PARAMETER C_USE_PARITY = 0
PARAMETER C_BASEADDR = 0xFFFF8100
PARAMETER C_HIGHADDR = 0xFFFF81FF
PORT RX = rx
PORT TX = tx
BUS_INTERFACE SOPB = myopb
END

BEGIN opb_gpio
PARAMETER INSTANCE = IAD
PARAMETER HW_VER = 1.00.a
PARAMETER C_GPIO_WIDTH = 16
PARAMETER C_ALL_INPUTS = 0
PARAMETER C_BASEADDR = 0xFFFF9000
PARAMETER C_HIGHADDR = 0xFFFF90FF
PORT GPIO_IO = IAD_GP
BUS_INTERFACE SOPB = myopb
END

BEGIN opb_gpio
PARAMETER INSTANCE = IDMA_CNTL
PARAMETER HW_VER = 1.00.a
PARAMETER C_GPIO_WIDTH = 8
PARAMETER C_ALL_INPUTS = 0
PARAMETER C_BASEADDR = 0xFFFFA000
PARAMETER C_HIGHADDR = 0xFFFFA0FF
PORT GPIO_IO = IDMA_CNTL_GP
BUS_INTERFACE SOPB = myopb
END

BEGIN opb_gpio
PARAMETER INSTANCE = Buttons
PARAMETER HW_VER = 1.00.a
PARAMETER C_GPIO_WIDTH = 2
PARAMETER C_ALL_INPUTS = 0
PARAMETER C_BASEADDR = 0xFFFFB000
PARAMETER C_HIGHADDR = 0xFFFFB0FF
PORT GPIO_IO = Buttons_GP
BUS_INTERFACE SOPB = myopb
END

BEGIN opb_timer
PARAMETER INSTANCE = Sampling_Timer
PARAMETER HW_VER = 1.00.b
PARAMETER C_BASEADDR = 0xFFFFC000
PARAMETER C_HIGHADDR = 0xFFFFC0FF
PORT CaptureTrig0 = net_gnd
PORT CaptureTrig1 = net_gnd
PORT PWM0 = pwm0
PORT Interrupt = timer1_interrupt
BUS_INTERFACE SOPB = myopb
END

BEGIN opb_jtag_uart
PARAMETER INSTANCE = myjtag
PARAMETER HW_VER = 1.00.b
PARAMETER C_BASEADDR = 0xFFFFD000
PARAMETER C_HIGHADDR = 0xFFFFD0FF
PORT OPB_Clk = sys_clk
BUS_INTERFACE SOPB = myopb
END

BEGIN opb_ddr
PARAMETER INSTANCE = my_opb_ddr
PARAMETER HW_VER = 1.00.b
PARAMETER C_DDR_TMRD = 15000
PARAMETER C_DDR_TWR = 15000
PARAMETER C_DDR_TWTR = 1
PARAMETER C_DDR_TRAS = 40000
PARAMETER C_DDR_TRC = 65000
PARAMETER C_DDR_TRFC = 75000
PARAMETER C_DDR_TRCD = 20000
PARAMETER C_DDR_TRRD = 15000
PARAMETER C_DDR_TREFC = 70000000
PARAMETER C_DDR_TREFI = 7800000
PARAMETER C_DDR_TRP = 20000
PARAMETER C_DDR_CAS_LAT = 2
PARAMETER C_DDR_DWIDTH = 16
PARAMETER C_DDR_AWIDTH = 13
PARAMETER C_DDR_COL_AWIDTH = 9
PARAMETER C_BASEADDR = 0xFE000000
PARAMETER C_HIGHADDR = 0xFEFFFFFF
PORT OPB_Clk = sys_clk
PORT DDR_Clk = ddr_clk
PORT DDR_Clkn = ddr_clkn
PORT DDR_CKE = ddr_clke
PORT DDR_CSn = ddr_csn
PORT DDR_RASn = ddr_rasn
PORT DDR_CASn = ddr_casn
PORT DDR_WEn = ddr_wen
PORT DDR_DM = ddr_dqm
PORT DDR_BankAddr = ddr_ba
PORT DDR_Addr = ddr_addr
PORT DDR_DQ = ddr_dq
PORT DDR_DQS = ddr_dqs
PORT Clk90_in = sys_clk_90
PORT DDR_Clk90_in = ddr_clk_90
BUS_INTERFACE SOPB = myopb
END

BEGIN opb_gpio
PARAMETER INSTANCE = RESET
PARAMETER HW_VER = 1.00.a
PARAMETER C_GPIO_WIDTH = 2
PARAMETER C_ALL_INPUTS = 0
PARAMETER C_BASEADDR = 0xFFFFE000
PARAMETER C_HIGHADDR = 0xFFFFE0FF
PORT GPIO_IO = RESET_GP
BUS_INTERFACE SOPB = myopb
END

BEGIN opb_intc
PARAMETER INSTANCE = interrupt_controller
PARAMETER HW_VER = 1.00.c
PARAMETER C_BASEADDR = 0xFFFFF000
PARAMETER C_HIGHADDR = 0xFFFFF0FF
PORT Intr = timer1_interrupt
PORT Irq = the_interrupt
BUS_INTERFACE SOPB = myopb
END

BEGIN lmb_v10
PARAMETER INSTANCE = d_lmb
PARAMETER HW_VER = 1.00.a
PARAMETER C_EXT_RESET_HIGH = 0
PORT LMB_Clk = sys_clk
PORT SYS_Rst = system_reset
END

BEGIN lmb_v10
PARAMETER INSTANCE = i_lmb
PARAMETER HW_VER = 1.00.a
PARAMETER C_EXT_RESET_HIGH = 0
PORT LMB_Clk = sys_clk
PORT SYS_Rst = system_reset
END

BEGIN opb_v20
PARAMETER INSTANCE = myopb
PARAMETER HW_VER = 1.10.a
PARAMETER C_EXT_RESET_HIGH = 0
PORT SYS_Rst = system_reset
PORT OPB_Clk = sys_clk
END