Current source design (tricky?)

Michael A. Terrell wrote:
Rich Grise wrote:

"Let's keep the X in Xvestite!"

;-P



Are you trying to tell us something? :)
clearly she is :)

Cheers
Terry
 
Larry Brasfield wrote:

That helps, but you are still looking at 18 W dissipation under
"normal" circumstances. (I rely on the 3 Amp output you mentioned in
your earlier post and battery charging voltage of 16V.) During a
load dump transient, that could briefly go to 75W. (The transient is
brief enough that you need not size the heatsink for it, but it may
mean that you want to keep the junction cooler to provide some
headroom for the thermal transient.) Whether that can be managed
with a small heatsink is questionable. I would rely on the heatsink
vendor's datasheet.
You are the most worthless pseudo-intellectual p.o.s. on this NG- you
don't even know what a load dump is.


So, the response to a voltage transient must stay within that bound.
This makes the design a little more interesting and likely makes it a
good idea to low pass filter the incoming supply for both the FET and
op-amp. You will likely want to put a resistor in series with the
integrator feedback capacitor to improve the transient response of
the current feedback loop.
Who says the transient response needs "improving"? What circuit are you
referring to?- Certainly nothing posted by you, bullshit boy.


I was not trying to quibble about the meaning of "DC". Ignition
transients are pretty easy to filter out before they hit the active
part of your circuit.
That's what you say, mouse, but as usual absolutely no details are
forthcoming.

The load dump transients change much faster than you appear to
suspect. You will need to research them.
Isn't that what he's doing now? Why don't /you/ research them and tell
him what they are- what kind of bs non-informational statement is "You
will need to research them"...p.o.s.


Yes. Maybe.
Hmmm- another highly learned and considered response- what an incredibly
complex mind you have...


I will not claim these are the most cost effective parts, but they
will do the job:
http://ec.irf.com/v6/en/US/adirect/ir?cmd=catProductDetailFrame&produ-
ctID=IRF9Z24 http://www.national.com/pf/LM/LM8261.html
Both of those parts are unsuitable for this app.

This op-amp, suggested by Mr. Hill, is well suited for this
application due to its positive rail input range and capacitive load
tolerance.
Oh- I'm sure WH was anxiously awaiting your bs approval on that parts
list- what a p.o.s.

Just a few tips for your design:
Oooh- here we go- more bs from the fake:

Be sure to zener protect the op-amp supply. Transients on an
automobile "12V" rail can be surprisingly large due to quickly
changing loads,
"suprisingly large"- well what kind of engineering terminology is that,
fruity boy? I don't recall ever seeing "suprisingly" anything in any
datasheet specification. What a total p.o.s....

especially removed loads, and the way alternators are regulated.
(This effect is often called "load dump".)
Nope- you're wrong about that.



I would use a 24 or 27 Volt zener diode, grounded at one end.
Really? How much transient power should this generic "zener" be able to
absorb without damage? Or do you intend to sacrifice it at the first blast?

Unless you are willing to see an output current spike sometimes,
"willing"? There you go again with your "girlie man" descriptors. You
think that damned circuit gives a damn about what he's "willing to see"?
What a pathetic little worm joke and incapable piss ant you are!
Unbelievable...

the MOSFET output stage should get similar protection. I would use a
power rectifier from the low end of the current sense resistor to
the zener mentioned above.
A power rectifier?

You should satisfy yourself that the zener's power rating is
sufficient to absorb a load dump transient. (I would have to
research this to know what that might be.)
He should "satisfy himself"- what a waffling p.o.s. moron! And you're damn
right you will have to do some research to find out what that "might"
be...waffling p.o.s.

Your op-amp circuit will be operating with inputs at the positive
(filtered, protected) rail, and its output is referenced to that rail
by the feedback condition, so be sure not to ground reference those
parts of the circuit that influence the controlled current.
More pseudo- theoretical generalistic non-informational PISS. You
haven't provided a stitch of specifics to back a single one of your
bullshit "hints"- friggin wishy-washy pseudo-intellectual worm.

thanks again for the responses!

You're still welcome.
Yeah- right. GFOAD and stay off this NG if that is the kind of weak,
pretentious, non-informational, non-engineering, flake post you offer.
 
On Fri, 11 Mar 2005 12:04:32 GMT, Fred Bloggs <nospam@nospam.com>
wrote:

Larry Brasfield wrote:


That helps, but you are still looking at 18 W dissipation under
"normal" circumstances. (I rely on the 3 Amp output you mentioned in
your earlier post and battery charging voltage of 16V.) During a
load dump transient, that could briefly go to 75W. (The transient is
brief enough that you need not size the heatsink for it, but it may
mean that you want to keep the junction cooler to provide some
headroom for the thermal transient.) Whether that can be managed
with a small heatsink is questionable. I would rely on the heatsink
vendor's datasheet.

You are the most worthless pseudo-intellectual p.o.s. on this NG- you
don't even know what a load dump is.


So, the response to a voltage transient must stay within that bound.
This makes the design a little more interesting and likely makes it a
good idea to low pass filter the incoming supply for both the FET and
op-amp. You will likely want to put a resistor in series with the
integrator feedback capacitor to improve the transient response of
the current feedback loop.

Who says the transient response needs "improving"? What circuit are you
referring to?- Certainly nothing posted by you, bullshit boy.



I was not trying to quibble about the meaning of "DC". Ignition
transients are pretty easy to filter out before they hit the active
part of your circuit.

That's what you say, mouse, but as usual absolutely no details are
forthcoming.

The load dump transients change much faster than you appear to
suspect. You will need to research them.

Isn't that what he's doing now? Why don't /you/ research them and tell
him what they are- what kind of bs non-informational statement is "You
will need to research them"...p.o.s.


Yes. Maybe.

Hmmm- another highly learned and considered response- what an incredibly
complex mind you have...


I will not claim these are the most cost effective parts, but they
will do the job:
http://ec.irf.com/v6/en/US/adirect/ir?cmd=catProductDetailFrame&produ-
ctID=IRF9Z24 http://www.national.com/pf/LM/LM8261.html

Both of those parts are unsuitable for this app.

This op-amp, suggested by Mr. Hill, is well suited for this
application due to its positive rail input range and capacitive load
tolerance.

Oh- I'm sure WH was anxiously awaiting your bs approval on that parts
list- what a p.o.s.


Just a few tips for your design:

Oooh- here we go- more bs from the fake:


Be sure to zener protect the op-amp supply. Transients on an
automobile "12V" rail can be surprisingly large due to quickly
changing loads,

"suprisingly large"- well what kind of engineering terminology is that,
fruity boy? I don't recall ever seeing "suprisingly" anything in any
datasheet specification. What a total p.o.s....

especially removed loads, and the way alternators are regulated.
(This effect is often called "load dump".)

Nope- you're wrong about that.



I would use a 24 or 27 Volt zener diode, grounded at one end.

Really? How much transient power should this generic "zener" be able to
absorb without damage? Or do you intend to sacrifice it at the first blast?


Unless you are willing to see an output current spike sometimes,

"willing"? There you go again with your "girlie man" descriptors. You
think that damned circuit gives a damn about what he's "willing to see"?
What a pathetic little worm joke and incapable piss ant you are!
Unbelievable...

the MOSFET output stage should get similar protection. I would use a
power rectifier from the low end of the current sense resistor to
the zener mentioned above.

A power rectifier?

You should satisfy yourself that the zener's power rating is
sufficient to absorb a load dump transient. (I would have to
research this to know what that might be.)

He should "satisfy himself"- what a waffling p.o.s. moron! And you're damn
right you will have to do some research to find out what that "might"
be...waffling p.o.s.


Your op-amp circuit will be operating with inputs at the positive
(filtered, protected) rail, and its output is referenced to that rail
by the feedback condition, so be sure not to ground reference those
parts of the circuit that influence the controlled current.

More pseudo- theoretical generalistic non-informational PISS. You
haven't provided a stitch of specifics to back a single one of your
bullshit "hints"- friggin wishy-washy pseudo-intellectual worm.



thanks again for the responses!

You're still welcome.

Yeah- right. GFOAD and stay off this NG if that is the kind of weak,
pretentious, non-informational, non-engineering, flake post you offer.

Fred, we always appreciate your thoughtful help on our little
problems. You are such a sweetie.

John
 
In article <og0Yd.29$Lb7.512@news.uswest.net>,
Larry Brasfield <donotspam_larry_brasfield@hotmail.com> wrote:
[...]
Be sure to zener protect the op-amp supply.
Transients on an automobile "12V" rail can be
surprisingly large due to quickly changing loads,
especially removed loads, and the way alternators
are regulated. (This effect is often called "load
dump".) I would use a 24 or 27 Volt zener diode,
grounded at one end.
I would not use a zener with a higher voltage than the legal limit on the
gate of the MOSFET. If no load is connected, the op-amp will come to rest
at the (-) rail.


--
--
kensmith@rahul.net forging knowledge
 
On Fri, 11 Mar 2005 17:11:53 +1300, Terry Given wrote:

Michael A. Terrell wrote:
Rich Grise wrote:

"Let's keep the X in Xvestite!"

;-P



Are you trying to tell us something? :)


clearly she is :)
WTF? A BJ's a BJ. >:->
--
Pig Bladder on a Stick
 
"Winfield Hill" <hill_a@t_rowland-dotties-harvard-dot.s-edu> wrote in
message news:d0pph4024j2@drn.newsguy.com...

Probably snipped too much....

There are a few subtleties in such a circuit, such as isolating the
opamp from the high gate capacitance of the FET, > --
Thanks,
- Win
Indeed.....

Bullshit mode on.

If your op-amp is loaded with a capacitor then its internal thinging
resistance between the emitters of the output emitter followers forms an
extra pole in the circuit with the mosfets gate capacitance and that adds to
the transfer function and upsets things. The resistance is internal to the
loop that you add around the op-amp.

On their own mosfets, when operated in a linear manner, have a tendancy to
oscillate on their own. There's some Siliconix app note that looks at that
sort of stuff. Way over my head, but the answer is to either include some
gate resistance or source inductance to damp it.

So the gate resistor kills two birds with one stone.

Awwwh bollix, I've got to go and have sex now.

DNA
 
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:EcmYd.1005$tb7.730@newsfe6-gui.ntli.net...
"Winfield Hill" <hill_a@t_rowland-dotties-harvard-dot.s-edu> wrote in
message news:d0pph4024j2@drn.newsguy.com...
....
There are a few subtleties in such a circuit, such as isolating the
opamp from the high gate capacitance of the FET,
....
If your op-amp is loaded with a capacitor then its internal thinging
resistance between the emitters of the output emitter followers forms an
extra pole in the circuit with the mosfets gate capacitance and that adds to
the transfer function and upsets things. The resistance is internal to the
loop that you add around the op-amp.
I don't want to burst any balloons here but ...

A number of op-amps on the market today are
very tolerant of capacitive loading because they
have a feature whereby that loading causes the
gain-bandwidth of the part to drop, almost in
proportion to the loading, such that the extra
pole remains far enough above the unity gain
crossover frequency that stability is preserved.
The LM8261 suggested by Mr. Hill is a good
example of this class.

Adding a load isolation resistor to the output
tends to defeat that feature, so I would not
add it unless using an op-amp without that
bandwidth reduction feature.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
 
Larry Brasfield wrote:
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:EcmYd.1005$tb7.730@newsfe6-gui.ntli.net...

"Winfield Hill" <hill_a@t_rowland-dotties-harvard-dot.s-edu> wrote in
message news:d0pph4024j2@drn.newsguy.com...

...

There are a few subtleties in such a circuit, such as isolating the
opamp from the high gate capacitance of the FET,

...

If your op-amp is loaded with a capacitor then its internal thinging
resistance between the emitters of the output emitter followers forms an
extra pole in the circuit with the mosfets gate capacitance and that adds to
the transfer function and upsets things. The resistance is internal to the
loop that you add around the op-amp.


I don't want to burst any balloons here but ...

A number of op-amps on the market today are
very tolerant of capacitive loading because they
have a feature whereby that loading causes the
gain-bandwidth of the part to drop, almost in
proportion to the loading, such that the extra
pole remains far enough above the unity gain
crossover frequency that stability is preserved.
The LM8261 suggested by Mr. Hill is a good
example of this class.
I have been bitten quite badly by a similar "feature" in the LM6134 (its
a slew-rate modification). The application circuit was a HPF driving a
diode frequency discriminator (aka leaky charge-pump). Both the feedback
(120pF) and DFD (120pF) caps conspired to completely fuck up the HPF -
to the point of uncontrolled oscillation. Re-jigging the HPF and DFD to
use 56pF caps helped, but the in-circuit GBW was still too low (as
measured by filter stability). I could have re-designed the HPF to
tolerate the actual GBW, but had no idea what the production spread was,
so went and found an opamp without this "feature".

Said "feature" btw is designed specifically to drive capacitive loads up
to 500pF! which is why I picked the rat bastard POS ITFP! Doh!

Adding a load isolation resistor to the output
tends to defeat that feature, so I would not
add it unless using an op-amp without that
bandwidth reduction feature.
Cheers
Terry
 
"Terry Given" <my_name@ieee.org> wrote in message
news:qypYd.8841$1S4.942601@news.xtra.co.nz...
Larry Brasfield wrote:
....
A number of op-amps on the market today are
very tolerant of capacitive loading because they
have a feature whereby that loading causes the
gain-bandwidth of the part to drop, almost in
proportion to the loading, such that the extra
pole remains far enough above the unity gain
crossover frequency that stability is preserved.
The LM8261 suggested by Mr. Hill is a good
example of this class.

I have been bitten quite badly by a similar "feature" in
the LM6134 (its a slew-rate modification).
The feature I mentioned above works by causing the
effective value of an internal capacitance to increase.
So it changes both the linear small-signal response
(less GBW) and the slew limiting (slower).

The adaptive slewing feature that National (sort
of) describes in the LM6134 datasheet is not the
same thing at all. It operates by increasing the
amount of current available for slewing under
certain large signal input conditions.

As for the problem you had with it, I would not
deem it a biting feature so much as a reason to
not use it without understanding it better. I will
say, however, that mode changing circuitry for
the alleged benefit of large signal conditions is
something that usually gives me the willys.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
 
Larry Brasfield wrote:
"Terry Given" <my_name@ieee.org> wrote in message
news:qypYd.8841$1S4.942601@news.xtra.co.nz...

Larry Brasfield wrote:

...

A number of op-amps on the market today are
very tolerant of capacitive loading because they
have a feature whereby that loading causes the
gain-bandwidth of the part to drop, almost in
proportion to the loading, such that the extra
pole remains far enough above the unity gain
crossover frequency that stability is preserved.
The LM8261 suggested by Mr. Hill is a good
example of this class.

I have been bitten quite badly by a similar "feature" in
the LM6134 (its a slew-rate modification).


The feature I mentioned above works by causing the
effective value of an internal capacitance to increase.
So it changes both the linear small-signal response
(less GBW) and the slew limiting (slower).

The adaptive slewing feature that National (sort
of) describes in the LM6134 datasheet is not the
same thing at all. It operates by increasing the
amount of current available for slewing under
certain large signal input conditions.
Yeah. Your previous comment made me have a look again, and it was
clearly a different beast altogether from what you described (hence my
clever use of weasel-words eg "similar").
As for the problem you had with it, I would not
deem it a biting feature so much as a reason to
not use it without understanding it better. I will
say, however, that mode changing circuitry for
the alleged benefit of large signal conditions is
something that usually gives me the willys.
It seriously put the shits up my HPF. replacing the opamp with a
TLV274ACD solved the problem completely, and said problem hadn't existed
before I tried the LM6134. I didn't investigate too thoroughly exactly
why it was screwing up the circuit, merely confirmed that it did.

Originally I used TL074s, and it worked very well except for power
consumption. I wanted a little more gain and lower power, so tried the
LM6134. During the ensuing unpleasant experience I improved my analytic
model for the HPF to explicitly include GBW. For GBW to make the LM6134
oscillate it needed to drop to about 1MHz c.f. the nominal 10MHz of the
part. When I switched to the TLV274, I had a sufficiently accurate model
that I could push the gain at Fc as high as I needed to whilst still
controlling phase margin (and hence stability).

We have quite a few LM6134s kicking around now. I did read the datasheet
first, but as part of the purpose of this "feature" is to drive
capacitive loads, I assumed we would be OK. My purchasing guy hates me
now though :)

In terms of understanding it better, thats a fairly neat trick based on
the datasheet alone - they have a brief waffly story, but thats about
it. If I was in the US I'd have rung NS and talked to an apps engineer,
but I'm not so I didn't. I did a brief search at NS but didn't find any
more info. It is also interesting that, unlike many opamp data sheets,
active filter circuits are *not* shown for the LM6134. I think I know
why.....

BTW Fo = 100kHz, Go = 6 for the HPF in question.


Cheers
Terry
 
Larry Brasfield wrote:
"Genome" <ilike_spam@yahoo.co.uk> wrote in message
news:EcmYd.1005$tb7.730@newsfe6-gui.ntli.net...

"Winfield Hill" <hill_a@t_rowland-dotties-harvard-dot.s-edu> wrote in
message news:d0pph4024j2@drn.newsguy.com...

...

There are a few subtleties in such a circuit, such as isolating the
opamp from the high gate capacitance of the FET,

...

If your op-amp is loaded with a capacitor then its internal thinging
resistance between the emitters of the output emitter followers forms an
extra pole in the circuit with the mosfets gate capacitance and that adds to
the transfer function and upsets things. The resistance is internal to the
loop that you add around the op-amp.


I don't want to burst any balloons here but ...

A number of op-amps on the market today are
very tolerant of capacitive loading because they
have a feature whereby that loading causes the
gain-bandwidth of the part to drop, almost in
proportion to the loading, such that the extra
pole remains far enough above the unity gain
crossover frequency that stability is preserved.
The LM8261 suggested by Mr. Hill is a good
example of this class.

Adding a load isolation resistor to the output
tends to defeat that feature, so I would not
add it unless using an op-amp without that
bandwidth reduction feature.
That is exactly !wrong!, and especially so for the LM8261. The
capacitive loading causes the internal dominant pole to move up in
frequency, tending to increase internal GBW, and the new lower frequency
pole due to the external loading then becomes dominant, actually
lowering the effective GBW compared to w/o the loading. This stuff about
"such that the extra pole remains far enough above the unity gain
crossover frequency that stability is preserved" is more of your
erroneous bs.
 
Larry Brasfield wrote:
"Terry Given" <my_name@ieee.org> wrote in message
news:qypYd.8841$1S4.942601@news.xtra.co.nz...

Larry Brasfield wrote:

...

A number of op-amps on the market today are
very tolerant of capacitive loading because they
have a feature whereby that loading causes the
gain-bandwidth of the part to drop, almost in
proportion to the loading, such that the extra
pole remains far enough above the unity gain
crossover frequency that stability is preserved.
The LM8261 suggested by Mr. Hill is a good
example of this class.

I have been bitten quite badly by a similar "feature" in
the LM6134 (its a slew-rate modification).


The feature I mentioned above works by causing the
effective value of an internal capacitance to increase.
So it changes both the linear small-signal response
(less GBW) and the slew limiting (slower).
Nah- you're full-o-shyte! The capacitive loading decreases the effective
internal capacitance due to Miller effects because it reduces the gain.
Even a moron like you should realize that less gain means less Miller
effect. You are a pretentious little piss-ant bs mouthpiece who has
never built anything in his life.

The adaptive slewing feature that National (sort
of) describes in the LM6134 datasheet is not the
same thing at all. It operates by increasing the
amount of current available for slewing under
certain large signal input conditions.
Really- S.R. drops to 0V/us at 10n- and settling time goes to hell-
someplace you should consider going too, permanently.

As for the problem you had with it, I would not
deem it a biting feature so much as a reason to
not use it without understanding it better. I will
say, however, that mode changing circuitry for
the alleged benefit of large signal conditions is
something that usually gives me the willys.
What a crock of pretentious PISS....
 
John Larkin wrote:

Fred, we always appreciate your thoughtful help on our little
problems. You are such a sweetie.
He doesn't require any precision whatsoever- and can hack together an
acceptable current source with readily available Radio Shack and NTE
stuff- a simplified circuit w/o protection would be like so:
View in a fixed-width font such as Courier.

..
.. +--------------------+
.. | | PMOS
.. | I-> | +-------+
..VBATT>---+------+---/\/\-----+-------------+-------|s d|---->
.. | | Rs 100m | | | | |
.. / / / | | | g |
.. 680 10k 10k | / +-------+
.. / / / | 4.7k |
.. \ \ \ LM741| / |
.. | | | |\ | \ |
.. | +------------|----|+\ | 330 |
.. | | | | >-----+---/\/\----+
.. | | +----|-/ |
.. | | | |/ | |
.. | | | | |
.. | | +--||---------+
.. | | | 1.5n |
.. | / / |
.. | 10k 10k |
.. | / / |
.. | \ \ |
.. | | 330 | |
.. Vd +-----------/\/\----+ |
.. | | | |
.. --- | / |
.. \ / | 100 |
.. --- | / |
.. 1n4148 | \ |
.. | | | |
.. | | | |
.. +------+------------+-------+
..
..
..
..
..
.. (Vbatt-I*Rs)*10.08 + 0.23*Vd*10.0
.. --------------------------------- = 0.5* Vbatt
.. 20.08
..
..
.. (0.002*Vbatt + 0.114*Vd)*2
.. I= ---------------------------
.. Rs
..
..
..
.. Vbatt I I
.. calculated simulated
.. ----- --- ---
.. 8 2.0 1.9
..
.. 10 2.0 2.0
..
.. 12 2.1 2.1
..
.. 14 2.2 2.2
..
.. 16 2.3 2.3
..
 
Fred Bloggs wrote:
[..rearrange that pull-up which may not even be necessary with these
power PMOS with VGS,th > 2V minimum...]

View in a fixed-width font such as Courier.

..
.. +--------------------+-----+
.. | | | PMOS
.. | I-> | | +-------+
..VBATT>---+------+---/\/\-----+---------------------|s d|---->
.. | | Rs 100m | | | | |
.. / / / | | | g |
.. 680 10k 10k | / +-------+
.. / / / | 4.7k |
.. \ \ \ LM741| / |
.. | | | |\ | \ |
.. | +------------|----|+\ | 330 |
.. | | | | >-----+---/\/\----+
.. | | +----|-/ |
.. | | | |/ | |
.. | | | | |
.. | | +--||---------+
.. | | | 1.5n |
.. | / / |
.. | 10k 10k |
.. | / / |
.. | \ \ |
.. | | 330 | |
.. Vd +-----------/\/\----+ |
.. | | | |
.. --- | / |
.. \ / | 100 |
.. --- | / |
.. 1n4148 | \ |
.. | | | |
.. | | | |
.. +------+------------+-------+
..
..
..
 
Jim Thompson wrote...
Winfield Hill wrote:

BTW, watch out. Anyone trying to simulate this circuit with spice
should realize that most power MOSFET models will provide incorrect
Vgs vs Id values at these low current densities.

Win, Have you had a chance to review the efficacy of the models
I posted for you?
Oops, I knew you might latch onto that when I wrote it. :>)


--
Thanks,
- Win
 
"Fred Bloggs" <nospam@nospam.com> wrote in message
news:4233017B.3010007@nospam.com...
Fred Bloggs wrote:
[..rearrange that pull-up which may not even be necessary with these
power PMOS with VGS,th > 2V minimum...]

View in a fixed-width font such as Courier.

.
. +--------------------+-----+
. | | | PMOS
. | I-> | | +-------+
.VBATT>---+------+---/\/\-----+---------------------|s d|----
. | | Rs 100m | | | | |
. / / / | | | g |
. 680 10k 10k | / +-------+
. / / / | 4.7k |
. \ \ \ LM741| / |
. | | | |\ | \ |
. | +------------|----|+\ | 330 |
. | | | | >-----+---/\/\----+
. | | +----|-/ |
. | | | |/ | |
. | | | | |
. | | +--||---------+
. | | | 1.5n |
. | / / |
. | 10k 10k |
. | / / |
. | \ \ |
. | | 330 | |
. Vd +-----------/\/\----+ |
. | | | |
. --- | / |
. \ / | 100 |
. --- | / |
. 1n4148 | \ |
. | | | |
. | | | |
. +------+------------+-------+
.

Here's your chance to show how smart you really are,
Fred. Beware, these are real questions and blowing
them off with a bunch of insults will merely reveal (to
the newcomers) that you are an electronics idiot.

Do you believe that your diode forward drop used as
a reference will meet the OP's stated 5% accuracy
requirement over the voltage and temperature range
to be expected in an automotive application?

Do you believe that the current output of your circuit
will remain within the OP's stated transient response
requirement in the presence of load-dump transients?

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
 
Larry Brasfield wrote:
"Fred Bloggs" <nospam@nospam.com> wrote in
message news:4232DFB9.3020107@nospam.com...

Larry Brasfield wrote:

"Terry Given" <my_name@ieee.org> wrote in message
news:qypYd.8841$1S4.942601@news.xtra.co.nz...

Larry Brasfield wrote:

...

A number of op-amps on the market today are
very tolerant of capacitive loading because they
have a feature whereby that loading causes the
gain-bandwidth of the part to drop, almost in
proportion to the loading, such that the extra
pole remains far enough above the unity gain
crossover frequency that stability is preserved.
The LM8261 suggested by Mr. Hill is a good
example of this class.

I have been bitten quite badly by a similar "feature" in
the LM6134 (its a slew-rate modification).

The feature I mentioned above works by causing the
effective value of an internal capacitance to increase.
So it changes both the linear small-signal response
(less GBW) and the slew limiting (slower).

Nah- you're full-o-shyte! The capacitive loading decreases the effective internal capacitance due to Miller effects because it
reduces the gain.


You are the one who is full of it, Fred.

The way the feature works, typically, is by means of
a capacitor placed between the output and the "gain
node", the internal node where current sources develop
the device's voltage gain. The output buffer, under light
load conditions, bootstraps this capacitor so that it does
not much load the gain node relative to the AC grounded
integrating capacitor. When a capacitive load is present,
the increased drop across the buffer output impedance
increases the current that must be supplied to the "gain
node" for any given dV/dt. This represents an increase
in the effective capacitance loading the "gain node", and
serves to reduce the gain bandwidth while tending to
leave the excess poles unchanged.

Miller effect has very little to do with it. In fact, Miller
effect, to the small extent it occurs, acts only to slightly
move some internal excess pole(s) out a little bit when
a capacitive load is present.

You, or at least anybody capable of learning something,
can see a description of this feature's operation and a
schematic in the datasheet for Linear Technology's LT1812.
Start at:
http://www.linear.com/pc/productDetail.do?navId=H0,C1,C1154,C1009,C1022,P1838

[More blather founded on spite and ignorance cut.]
...

who has never built anything in his life.


Your ability to discern such a falsehood from such a
distance with so little evidence marks you.
That's not what the LM8261 is doing- it is Miller effect on two CE
output transistors- and that is the OA you mentioned.
 
Larry Brasfield wrote:
"Fred Bloggs" <nospam@nospam.com> wrote in message
news:4233017B.3010007@nospam.com...


Fred Bloggs wrote:
[..rearrange that pull-up which may not even be necessary with these
power PMOS with VGS,th > 2V minimum...]

View in a fixed-width font such as Courier.

.
. +--------------------+-----+
. | | | PMOS
. | I-> | | +-------+
.VBATT>---+------+---/\/\-----+---------------------|s d|----
. | | Rs 100m | | | | |
. / / / | | | g |
. 680 10k 10k | / +-------+
. / / / | 4.7k |
. \ \ \ LM741| / |
. | | | |\ | \ |
. | +------------|----|+\ | 330 |
. | | | | >-----+---/\/\----+
. | | +----|-/ |
. | | | |/ | |
. | | | | |
. | | +--||---------+
. | | | 1.5n |
. | / / |
. | 10k 10k |
. | / / |
. | \ \ |
. | | 330 | |
. Vd +-----------/\/\----+ |
. | | | |
. --- | / |
. \ / | 100 |
. --- | / |
. 1n4148 | \ |
. | | | |
. | | | |
. +------+------------+-------+
.



Here's your chance to show how smart you really are,
Fred. Beware, these are real questions and blowing
them off with a bunch of insults will merely reveal (to
the newcomers) that you are an electronics idiot.

Do you believe that your diode forward drop used as
a reference will meet the OP's stated 5% accuracy
requirement over the voltage and temperature range
to be expected in an automotive application?

Do you believe that the current output of your circuit
will remain within the OP's stated transient response
requirement in the presence of load-dump transients?
Yeah- it's all good enough for what the OP needs- an output current in
the range 2-3 amps and compliance within 0.5V of the rail. The OP has no
other requirements, is probably charging an accessory battery, and
really doesn't give a damn about any transient response other than it
doesn't blow his components.
 
On Sat, 12 Mar 2005 10:00:25 -0800, "Larry Brasfield"
<donotspam_larry_brasfield@hotmail.com> wrote:

"Fred Bloggs" <nospam@nospam.com> wrote in message
news:4233017B.3010007@nospam.com...


Fred Bloggs wrote:
[..rearrange that pull-up which may not even be necessary with these
power PMOS with VGS,th > 2V minimum...]

View in a fixed-width font such as Courier.

.
. +--------------------+-----+
. | | | PMOS
. | I-> | | +-------+
.VBATT>---+------+---/\/\-----+---------------------|s d|----
. | | Rs 100m | | | | |
. / / / | | | g |
. 680 10k 10k | / +-------+
. / / / | 4.7k |
. \ \ \ LM741| / |
. | | | |\ | \ |
. | +------------|----|+\ | 330 |
. | | | | >-----+---/\/\----+
. | | +----|-/ |
. | | | |/ | |
. | | | | |
. | | +--||---------+
. | | | 1.5n |
. | / / |
. | 10k 10k |
. | / / |
. | \ \ |
. | | 330 | |
. Vd +-----------/\/\----+ |
. | | | |
. --- | / |
. \ / | 100 |
. --- | / |
. 1n4148 | \ |
. | | | |
. | | | |
. +------+------------+-------+
.

Do you believe that your diode forward drop used as
a reference will meet the OP's stated 5% accuracy
requirement over the voltage and temperature range
to be expected in an automotive application?
Cute circuit, but will probably have some resistor tolerance problems
too.


John
 
"Fred Bloggs" <nospam@nospam.com> wrote in message
news:42334D1C.8070303@nospam.com...
Larry Brasfield wrote:
"Fred Bloggs" <nospam@nospam.com> wrote in
message news:4232DFB9.3020107@nospam.com...

Larry Brasfield wrote:

"Terry Given" <my_name@ieee.org> wrote in message
news:qypYd.8841$1S4.942601@news.xtra.co.nz...

Larry Brasfield wrote:

...

A number of op-amps on the market today are
very tolerant of capacitive loading because they
have a feature whereby that loading causes the
gain-bandwidth of the part to drop, almost in
proportion to the loading, such that the extra
pole remains far enough above the unity gain
crossover frequency that stability is preserved.
The LM8261 suggested by Mr. Hill is a good
example of this class.

I have been bitten quite badly by a similar "feature" in
the LM6134 (its a slew-rate modification).

The feature I mentioned above works by causing the
effective value of an internal capacitance to increase.
So it changes both the linear small-signal response
(less GBW) and the slew limiting (slower).

Nah- you're full-o-shyte! The capacitive loading decreases the effective internal capacitance due to Miller effects because it
reduces the gain.


You are the one who is full of it, Fred.

The way the feature works, typically, is by means of
a capacitor placed between the output and the "gain
node", the internal node where current sources develop
the device's voltage gain. The output buffer, under light
load conditions, bootstraps this capacitor so that it does
not much load the gain node relative to the AC grounded
integrating capacitor. When a capacitive load is present,
the increased drop across the buffer output impedance
increases the current that must be supplied to the "gain
node" for any given dV/dt. This represents an increase
in the effective capacitance loading the "gain node", and
serves to reduce the gain bandwidth while tending to
leave the excess poles unchanged.

Miller effect has very little to do with it. In fact, Miller
effect, to the small extent it occurs, acts only to slightly
move some internal excess pole(s) out a little bit when
a capacitive load is present.

You, or at least anybody capable of learning something,
can see a description of this feature's operation and a
schematic in the datasheet for Linear Technology's LT1812.
Start at:
http://www.linear.com/pc/productDetail.do?navId=H0,C1,C1154,C1009,C1022,P1838

[More blather founded on spite and ignorance cut.]
...

who has never built anything in his life.


Your ability to discern such a falsehood from such a
distance with so little evidence marks you.


That's not what the LM8261 is doing- it is Miller effect on two CE output transistors- and that is the OA you mentioned.

You are exhibiting poor reading skills here, Fred.

What I described above, before another poster
ever mentioned the LM8261, is indeed different
from what the LM8261 does. I never claimed
that the LM8261 acts as I describe above, and,
in fact, I expressly denied in this very thread that
the LM8261 acts per the above.

As for the LM8261 relying on Miller effect, you
clearly do not understand the large-signal behavior
that is clearly evident from both the description and
schematic published in the LM8261 datasheet. To
review, (for the benefit of those who are not pig-
headed), Miller effect occurs when a voltage gain
stage has capacitive feedback into its input, and
occurs under small signal conditions as well as
large signal conditions. The "capacitive load
accomadation" feature described for the LM8261
is strictly limited to large signal conditions. So,
how one might confuse it for Miller effect is a
puzzle. Care to explain that, Fred? Perhaps you
should limit your intellectual exertions to the name
calling that you have practised so diligently.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
 

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