cheap ADC...

S

server

Guest
This uses an FPGA LVDS input as a comparator, and one external RC, to
make an ADC. Just need an algorithm to process the flop output.

A simpler ADC should be possible.


Version 4
SHEET 1 880 680
WIRE -16 0 -112 0
WIRE 48 0 -16 0
WIRE 160 0 48 0
WIRE 416 0 240 0
WIRE 480 0 416 0
WIRE 528 0 480 0
WIRE 416 48 416 0
WIRE -112 64 -112 0
WIRE 96 112 64 112
WIRE 128 112 96 112
WIRE -112 160 -112 128
WIRE 64 160 64 112
WIRE -16 176 -16 0
WIRE 16 176 -16 176
WIRE -48 224 -112 224
WIRE 16 224 -48 224
WIRE -112 256 -112 224
WIRE 64 272 64 240
WIRE 272 288 208 288
WIRE 368 288 368 224
WIRE 368 288 272 288
WIRE 416 288 416 224
WIRE 480 288 416 288
WIRE 512 288 480 288
WIRE 208 336 208 288
WIRE 416 336 416 288
WIRE -112 384 -112 336
WIRE 208 448 208 416
WIRE 416 448 416 416
FLAG 416 448 0
FLAG 208 448 0
FLAG 64 272 0
FLAG 96 112 R
FLAG -112 384 0
FLAG -112 160 0
FLAG 272 288 D
FLAG 480 288 CLK
FLAG 480 0 N
FLAG 48 0 F
FLAG -48 224 IN
SYMBOL voltage -112 240 R0
WINDOW 0 48 44 Left 2
WINDOW 3 41 78 Left 2
SYMATTR InstName V1
SYMATTR Value 0.75
SYMBOL Digital\\\\dflop 320 144 R270
WINDOW 0 40 -49 VRight 2
SYMATTR InstName A1
SYMBOL voltage 416 320 R0
WINDOW 0 56 49 Left 2
WINDOW 3 45 90 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 0 0 1u 10u 1e6)
SYMBOL bv 208 320 R0
WINDOW 0 -97 53 Left 2
WINDOW 3 -212 93 Left 2
SYMATTR InstName B1
SYMATTR Value V=1+tanh(V(R))
SYMBOL e 64 144 R0
WINDOW 0 53 50 Left 2
WINDOW 3 54 84 Left 2
SYMATTR InstName Elvds
SYMATTR Value 1000
SYMBOL res 256 -16 R90
WINDOW 0 65 53 VBottom 2
WINDOW 3 69 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL cap -128 64 R0
WINDOW 0 46 12 Left 2
WINDOW 3 45 48 Left 2
SYMATTR InstName C1
SYMATTR Value 1µ
TEXT 558 200 Left 2 !.tran 10m
TEXT 512 80 Left 2 ;Cheap FPGA ADC
TEXT 528 128 Left 2 ;JL Jan 17 2022




--

I yam what I yam - Popeye
 
L

Lasse Langwadt Christensen

Guest
torsdag den 20. januar 2022 kl. 17.31.18 UTC+1 skrev jla...@highlandsniptechnology.com:
This uses an FPGA LVDS input as a comparator, and one external RC, to
make an ADC. Just need an algorithm to process the flop output.

A simpler ADC should be possible.

more than one way to do it, one is basically successive approximation with a pwm dac
another is delta-sigma with RC as \"integrator\" that might have an advantage in that the
comparator doesn\'t follow the input signal it is always ~1/2 Vcc


Version 4
SHEET 1 1316 680
WIRE -96 -992 -176 -992
WIRE -176 -960 -176 -992
WIRE 496 -832 -320 -832
WIRE -96 -752 -96 -992
WIRE -96 -752 -128 -752
WIRE -128 -720 -128 -752
WIRE -96 -720 -96 -752
WIRE -320 -688 -320 -752
WIRE -304 -688 -320 -688
WIRE -144 -688 -304 -688
WIRE -16 -672 -64 -672
WIRE -144 -656 -480 -656
WIRE -16 -656 -16 -672
WIRE 192 -656 -16 -656
WIRE 192 -640 192 -656
WIRE 272 -640 192 -640
WIRE 496 -640 496 -832
WIRE 496 -640 432 -640
WIRE 752 -640 496 -640
WIRE 912 -640 832 -640
WIRE -304 -624 -304 -688
WIRE 272 -592 208 -592
WIRE -128 -576 -128 -624
WIRE -96 -576 -96 -624
WIRE -96 -576 -128 -576
WIRE 912 -576 912 -640
WIRE -304 -528 -304 -560
WIRE 208 -512 208 -592
WIRE 912 -464 912 -512
WIRE 208 -368 208 -432
WIRE -96 -224 -176 -224
WIRE -176 -192 -176 -224
WIRE 496 -64 -320 -64
WIRE -96 16 -96 -224
WIRE -96 16 -128 16
WIRE -128 48 -128 16
WIRE -96 48 -96 16
WIRE -144 80 -176 80
WIRE -16 96 -64 96
WIRE -480 112 -480 -656
WIRE -416 112 -480 112
WIRE -320 112 -320 16
WIRE -320 112 -336 112
WIRE -304 112 -320 112
WIRE -144 112 -304 112
WIRE -16 112 -16 96
WIRE 192 112 -16 112
WIRE -480 128 -480 112
WIRE 192 128 192 112
WIRE 272 128 192 128
WIRE 752 128 432 128
WIRE 912 128 832 128
WIRE -304 144 -304 112
WIRE 272 176 208 176
WIRE 496 176 496 -64
WIRE 496 176 448 176
WIRE -128 192 -128 144
WIRE -96 192 -96 144
WIRE -96 192 -128 192
WIRE 912 192 912 128
WIRE -304 240 -304 208
WIRE 208 256 208 176
WIRE -176 272 -176 80
WIRE 912 304 912 256
WIRE -480 384 -480 208
WIRE 208 400 208 336
FLAG -480 384 0
FLAG 272 224 0
FLAG 208 400 0
FLAG -304 240 0
FLAG 912 304 0
FLAG -176 -112 0
FLAG -128 192 0
FLAG -176 352 0
FLAG 272 -544 0
FLAG 208 -368 0
FLAG -304 -528 0
FLAG 912 -464 0
FLAG -176 -880 0
FLAG -128 -576 0
FLAG -480 -656 Vin
FLAG 912 -640 Vout1
FLAG 912 128 Vout2
SYMBOL voltage -480 112 R0
WINDOW 3 -226 54 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(1.5 1.4 5000)
SYMATTR InstName V1
SYMBOL Digital\\\\dflop 352 80 R0
WINDOW 3 8 12 Left 2
SYMATTR Value vhigh=3
SYMATTR InstName A1
SYMBOL res -320 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res -336 -80 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap -288 208 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 848 112 R90
WINDOW 0 80 54 VBottom 2
WINDOW 3 89 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL cap 896 192 R0
WINDOW 0 -58 48 Left 2
WINDOW 3 -56 80 Left 2
SYMATTR InstName C3
SYMATTR Value 8n
SYMBOL Comparators\\\\LT1715 -112 96 R0
SYMATTR InstName U1
SYMBOL voltage -176 -208 R0
WINDOW 3 -64 56 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 5
SYMATTR InstName V2
SYMBOL voltage -176 256 R0
WINDOW 3 -64 56 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 1.5
SYMATTR InstName V4
SYMBOL Digital\\\\dflop 352 -688 R0
WINDOW 3 8 12 Left 2
SYMATTR Value vhigh=3
SYMATTR InstName A2
SYMBOL res -336 -848 R0
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL cap -288 -560 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage 208 -528 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V6
SYMATTR Value PULSE(0 3 0 0 0 50n 100n)
SYMBOL res 848 -656 R90
WINDOW 0 80 54 VBottom 2
WINDOW 3 89 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 1K
SYMBOL cap 896 -576 R0
WINDOW 0 -58 48 Left 2
WINDOW 3 -56 80 Left 2
SYMATTR InstName C4
SYMATTR Value 8n
SYMBOL Comparators\\\\LT1715 -112 -672 R0
SYMATTR InstName U2
SYMBOL voltage -176 -976 R0
WINDOW 3 -64 56 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 5
SYMATTR InstName V7
SYMBOL voltage 208 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 3 0 0 0 50n 100n)
TEXT -712 488 Left 2 !.tran 5m
RECTANGLE Normal 576 480 144 -128 2
RECTANGLE Normal 576 -288 144 -896 2
 
S

server

Guest
On Thu, 20 Jan 2022 11:51:16 -0800 (PST), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

torsdag den 20. januar 2022 kl. 17.31.18 UTC+1 skrev jla...@highlandsniptechnology.com:
This uses an FPGA LVDS input as a comparator, and one external RC, to
make an ADC. Just need an algorithm to process the flop output.

A simpler ADC should be possible.


more than one way to do it, one is basically successive approximation with a pwm dac
another is delta-sigma with RC as \"integrator\" that might have an advantage in that the
comparator doesn\'t follow the input signal it is always ~1/2 Vcc

That\'s certainly better; the FPGA LVDS receivers are mediocre
comparators. But the game was to minimize the number of external
parts. I\'ll be digitizing a thermistor on a heat sink, so it\'s not a
precision thing.

If we go with an available Lattice FPGA, it doesn\'t have an ADC.

Some sort of delta-sigma signal processing would be interesting.

I could use an LM71, SPI temp sensor, which is just not as
interesting.




Version 4
SHEET 1 1316 680
WIRE -96 -992 -176 -992
WIRE -176 -960 -176 -992
WIRE 496 -832 -320 -832
WIRE -96 -752 -96 -992
WIRE -96 -752 -128 -752
WIRE -128 -720 -128 -752
WIRE -96 -720 -96 -752
WIRE -320 -688 -320 -752
WIRE -304 -688 -320 -688
WIRE -144 -688 -304 -688
WIRE -16 -672 -64 -672
WIRE -144 -656 -480 -656
WIRE -16 -656 -16 -672
WIRE 192 -656 -16 -656
WIRE 192 -640 192 -656
WIRE 272 -640 192 -640
WIRE 496 -640 496 -832
WIRE 496 -640 432 -640
WIRE 752 -640 496 -640
WIRE 912 -640 832 -640
WIRE -304 -624 -304 -688
WIRE 272 -592 208 -592
WIRE -128 -576 -128 -624
WIRE -96 -576 -96 -624
WIRE -96 -576 -128 -576
WIRE 912 -576 912 -640
WIRE -304 -528 -304 -560
WIRE 208 -512 208 -592
WIRE 912 -464 912 -512
WIRE 208 -368 208 -432
WIRE -96 -224 -176 -224
WIRE -176 -192 -176 -224
WIRE 496 -64 -320 -64
WIRE -96 16 -96 -224
WIRE -96 16 -128 16
WIRE -128 48 -128 16
WIRE -96 48 -96 16
WIRE -144 80 -176 80
WIRE -16 96 -64 96
WIRE -480 112 -480 -656
WIRE -416 112 -480 112
WIRE -320 112 -320 16
WIRE -320 112 -336 112
WIRE -304 112 -320 112
WIRE -144 112 -304 112
WIRE -16 112 -16 96
WIRE 192 112 -16 112
WIRE -480 128 -480 112
WIRE 192 128 192 112
WIRE 272 128 192 128
WIRE 752 128 432 128
WIRE 912 128 832 128
WIRE -304 144 -304 112
WIRE 272 176 208 176
WIRE 496 176 496 -64
WIRE 496 176 448 176
WIRE -128 192 -128 144
WIRE -96 192 -96 144
WIRE -96 192 -128 192
WIRE 912 192 912 128
WIRE -304 240 -304 208
WIRE 208 256 208 176
WIRE -176 272 -176 80
WIRE 912 304 912 256
WIRE -480 384 -480 208
WIRE 208 400 208 336
FLAG -480 384 0
FLAG 272 224 0
FLAG 208 400 0
FLAG -304 240 0
FLAG 912 304 0
FLAG -176 -112 0
FLAG -128 192 0
FLAG -176 352 0
FLAG 272 -544 0
FLAG 208 -368 0
FLAG -304 -528 0
FLAG 912 -464 0
FLAG -176 -880 0
FLAG -128 -576 0
FLAG -480 -656 Vin
FLAG 912 -640 Vout1
FLAG 912 128 Vout2
SYMBOL voltage -480 112 R0
WINDOW 3 -226 54 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(1.5 1.4 5000)
SYMATTR InstName V1
SYMBOL Digital\\\\dflop 352 80 R0
WINDOW 3 8 12 Left 2
SYMATTR Value vhigh=3
SYMATTR InstName A1
SYMBOL res -320 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res -336 -80 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap -288 208 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 848 112 R90
WINDOW 0 80 54 VBottom 2
WINDOW 3 89 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL cap 896 192 R0
WINDOW 0 -58 48 Left 2
WINDOW 3 -56 80 Left 2
SYMATTR InstName C3
SYMATTR Value 8n
SYMBOL Comparators\\\\LT1715 -112 96 R0
SYMATTR InstName U1
SYMBOL voltage -176 -208 R0
WINDOW 3 -64 56 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 5
SYMATTR InstName V2
SYMBOL voltage -176 256 R0
WINDOW 3 -64 56 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 1.5
SYMATTR InstName V4
SYMBOL Digital\\\\dflop 352 -688 R0
WINDOW 3 8 12 Left 2
SYMATTR Value vhigh=3
SYMATTR InstName A2
SYMBOL res -336 -848 R0
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL cap -288 -560 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage 208 -528 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V6
SYMATTR Value PULSE(0 3 0 0 0 50n 100n)
SYMBOL res 848 -656 R90
WINDOW 0 80 54 VBottom 2
WINDOW 3 89 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 1K
SYMBOL cap 896 -576 R0
WINDOW 0 -58 48 Left 2
WINDOW 3 -56 80 Left 2
SYMATTR InstName C4
SYMATTR Value 8n
SYMBOL Comparators\\\\LT1715 -112 -672 R0
SYMATTR InstName U2
SYMBOL voltage -176 -976 R0
WINDOW 3 -64 56 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 5
SYMATTR InstName V7
SYMBOL voltage 208 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 3 0 0 0 50n 100n)
TEXT -712 488 Left 2 !.tran 5m
RECTANGLE Normal 576 480 144 -128 2
RECTANGLE Normal 576 -288 144 -896 2

--

I yam what I yam - Popeye
 
R

Rick C

Guest
On Thursday, January 20, 2022 at 2:51:20 PM UTC-5, lang...@fonz.dk wrote:
torsdag den 20. januar 2022 kl. 17.31.18 UTC+1 skrev jla...@highlandsniptechnology.com:
This uses an FPGA LVDS input as a comparator, and one external RC, to
make an ADC. Just need an algorithm to process the flop output.

A simpler ADC should be possible.

more than one way to do it, one is basically successive approximation with a pwm dac
another is delta-sigma with RC as \"integrator\" that might have an advantage in that the
comparator doesn\'t follow the input signal it is always ~1/2 Vcc

That is important in an FPGA because the differential inputs are not rail to rail. In fact, they are rated to work over a very limited range. I\'m not sure how well they will serve in this application. A good comparator is rated for offset voltage. The spec on an LVDS mode input in an FPGA has a very loose spec for that. Given that the input circuit is basically a voltage divider it works to increase the significance of input offset relative to the input signal.

If you are trying to set an alarm for some condition with a loose input spec for accuracy or offset, then this can work fine. It only costs 3 pins on the FPGA. I worked on a design that used 8 such ADCs. Rather than use resistors to set the reference point I used another output with a 50/50 duty cycle to get an accurate Vcc/2 point that follows the rail without resistors removing some source of error and could be shared with all the ADCs. It also allowed you to adjust the reference voltage if there became a need to make an adjustment.

--

Rick C.

- Get 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209
 
J

Jan Panteltje

Guest
<fd3jugh4hv2mlbl9dfchcql4cf93udatav@4ax.com> a ecrit

This uses an FPGA LVDS input as a comparator, and one external RC, to
make an ADC. Just need an algorithm to process the flop output.

A simpler ADC should be possible.
WINDOW 0 46 12 Left 2
I yam what I yam - Popeye

Probiblie bEst iz too juice a FLIR IR camarade wiz Anna Log outpud
ant prozes ze vidio on 1 FPGAYE pin.
Ze moost rat airraids r ze hot test

Tom
 
L

Lasse Langwadt Christensen

Guest
fredag den 21. januar 2022 kl. 03.08.06 UTC+1 skrev jla...@highlandsniptechnology.com:
On Thu, 20 Jan 2022 11:51:16 -0800 (PST), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

torsdag den 20. januar 2022 kl. 17.31.18 UTC+1 skrev jla...@highlandsniptechnology.com:
This uses an FPGA LVDS input as a comparator, and one external RC, to
make an ADC. Just need an algorithm to process the flop output.

A simpler ADC should be possible.


more than one way to do it, one is basically successive approximation with a pwm dac
another is delta-sigma with RC as \"integrator\" that might have an advantage in that the
comparator doesn\'t follow the input signal it is always ~1/2 Vcc
That\'s certainly better; the FPGA LVDS receivers are mediocre
comparators. But the game was to minimize the number of external
parts. I\'ll be digitizing a thermistor on a heat sink, so it\'s not a
precision thing.

If we go with an available Lattice FPGA, it doesn\'t have an ADC.

Some sort of delta-sigma signal processing would be interesting.

I could use an LM71, SPI temp sensor, which is just not as
interesting.

even simpler tmp05/tmp06 which is pwm output so all you need is a counter in the fpga

or for easy mounting on a heat sink, https://dk.farnell.com/smartec/smt172-220/temperature-sensor-1deg-c-to-220/dp/2543396
 
K

Klaus Vestergaard Kragelund

Guest
On 21/01/2022 12.41, Lasse Langwadt Christensen wrote:
fredag den 21. januar 2022 kl. 03.08.06 UTC+1 skrev jla...@highlandsniptechnology.com:
On Thu, 20 Jan 2022 11:51:16 -0800 (PST), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

torsdag den 20. januar 2022 kl. 17.31.18 UTC+1 skrev jla...@highlandsniptechnology.com:
This uses an FPGA LVDS input as a comparator, and one external RC, to
make an ADC. Just need an algorithm to process the flop output.

A simpler ADC should be possible.


more than one way to do it, one is basically successive approximation with a pwm dac
another is delta-sigma with RC as \"integrator\" that might have an advantage in that the
comparator doesn\'t follow the input signal it is always ~1/2 Vcc
That\'s certainly better; the FPGA LVDS receivers are mediocre
comparators. But the game was to minimize the number of external
parts. I\'ll be digitizing a thermistor on a heat sink, so it\'s not a
precision thing.

If we go with an available Lattice FPGA, it doesn\'t have an ADC.

Some sort of delta-sigma signal processing would be interesting.

I could use an LM71, SPI temp sensor, which is just not as
interesting.

even simpler tmp05/tmp06 which is pwm output so all you need is a counter in the fpga

or for easy mounting on a heat sink, https://dk.farnell.com/smartec/smt172-220/temperature-sensor-1deg-c-to-220/dp/2543396

Who in their right mind comes up with a device name \"tmp05\"? ;-)
 
S

server

Guest
On Fri, 21 Jan 2022 03:41:56 -0800 (PST), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

fredag den 21. januar 2022 kl. 03.08.06 UTC+1 skrev jla...@highlandsniptechnology.com:
On Thu, 20 Jan 2022 11:51:16 -0800 (PST), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

torsdag den 20. januar 2022 kl. 17.31.18 UTC+1 skrev jla...@highlandsniptechnology.com:
This uses an FPGA LVDS input as a comparator, and one external RC, to
make an ADC. Just need an algorithm to process the flop output.

A simpler ADC should be possible.


more than one way to do it, one is basically successive approximation with a pwm dac
another is delta-sigma with RC as \"integrator\" that might have an advantage in that the
comparator doesn\'t follow the input signal it is always ~1/2 Vcc
That\'s certainly better; the FPGA LVDS receivers are mediocre
comparators. But the game was to minimize the number of external
parts. I\'ll be digitizing a thermistor on a heat sink, so it\'s not a
precision thing.

If we go with an available Lattice FPGA, it doesn\'t have an ADC.

Some sort of delta-sigma signal processing would be interesting.

I could use an LM71, SPI temp sensor, which is just not as
interesting.

even simpler tmp05/tmp06 which is pwm output so all you need is a counter in the fpga

or for easy mounting on a heat sink, https://dk.farnell.com/smartec/smt172-220/temperature-sensor-1deg-c-to-220/dp/2543396

74 cookies! A record!

That would be a good way to couple thermally to the heat sink. We have
LM35 in stock, in TO220, too, but that would require an ADC and
probebly an opamp, which isn\'t bad.

I want to simulate the mosfet junction temperatures in realtime, and
the heatsink temp is part of that math.



--

I yam what I yam - Popeye
 
R

Rick C

Guest
On Friday, January 21, 2022 at 6:42:00 AM UTC-5, lang...@fonz.dk wrote:
fredag den 21. januar 2022 kl. 03.08.06 UTC+1 skrev jla...@highlandsniptechnology.com:
On Thu, 20 Jan 2022 11:51:16 -0800 (PST), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

torsdag den 20. januar 2022 kl. 17.31.18 UTC+1 skrev jla...@highlandsniptechnology.com:
This uses an FPGA LVDS input as a comparator, and one external RC, to
make an ADC. Just need an algorithm to process the flop output.

A simpler ADC should be possible.


more than one way to do it, one is basically successive approximation with a pwm dac
another is delta-sigma with RC as \"integrator\" that might have an advantage in that the
comparator doesn\'t follow the input signal it is always ~1/2 Vcc
That\'s certainly better; the FPGA LVDS receivers are mediocre
comparators. But the game was to minimize the number of external
parts. I\'ll be digitizing a thermistor on a heat sink, so it\'s not a
precision thing.

If we go with an available Lattice FPGA, it doesn\'t have an ADC.

Some sort of delta-sigma signal processing would be interesting.

I could use an LM71, SPI temp sensor, which is just not as
interesting.
even simpler tmp05/tmp06 which is pwm output so all you need is a counter in the fpga

or for easy mounting on a heat sink, https://dk.farnell.com/smartec/smt172-220/temperature-sensor-1deg-c-to-220/dp/2543396

Isn\'t the FPGA the place where you put arbitrarily complex logic? Why try to minimize it? The filter typically used in the ADC you indicated above is often an integrate and dump, otherwise known as a counter. The filter characteristics are such that frequency multiples of half the sample rate are on nulls. This helps with the antialias filtering, but to get a sharper response near the half sample rate requires a FIR filter or similar. In fact, best is a filter that compensates with some boost to compensate for the integrate and dump roll off. A design example I saw from Lattice included both an integrate and dump followed by a FIR filter. However, I believe the FIR coefficients were all just 1, so after decimation it was also an integrate and dump equivalent. I suppose you could add any coefficients you wished. It was only a app note after all.

Often the application does not require any significant filtering and the integrate and dump is simply the way of increasing the resolution from 1 bit to N bits by counting 2^N input samples.

--

Rick C.

+ Get 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209
 
L

Lasse Langwadt Christensen

Guest
lørdag den 22. januar 2022 kl. 04.28.58 UTC+1 skrev gnuarm.del...@gmail.com:
On Friday, January 21, 2022 at 6:42:00 AM UTC-5, lang...@fonz.dk wrote:
fredag den 21. januar 2022 kl. 03.08.06 UTC+1 skrev jla...@highlandsniptechnology.com:
On Thu, 20 Jan 2022 11:51:16 -0800 (PST), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

torsdag den 20. januar 2022 kl. 17.31.18 UTC+1 skrev jla...@highlandsniptechnology.com:
This uses an FPGA LVDS input as a comparator, and one external RC, to
make an ADC. Just need an algorithm to process the flop output.

A simpler ADC should be possible.


more than one way to do it, one is basically successive approximation with a pwm dac
another is delta-sigma with RC as \"integrator\" that might have an advantage in that the
comparator doesn\'t follow the input signal it is always ~1/2 Vcc
That\'s certainly better; the FPGA LVDS receivers are mediocre
comparators. But the game was to minimize the number of external
parts. I\'ll be digitizing a thermistor on a heat sink, so it\'s not a
precision thing.

If we go with an available Lattice FPGA, it doesn\'t have an ADC.

Some sort of delta-sigma signal processing would be interesting.

I could use an LM71, SPI temp sensor, which is just not as
interesting.
even simpler tmp05/tmp06 which is pwm output so all you need is a counter in the fpga

or for easy mounting on a heat sink, https://dk.farnell.com/smartec/smt172-220/temperature-sensor-1deg-c-to-220/dp/2543396
Isn\'t the FPGA the place where you put arbitrarily complex logic? Why try to minimize it?

why spend time to implement a SPI, use three/four pins, or logic and extra parts to fudge an ADC and calibrate that
when you can get a calibrated part that only need a single pin and very simple logic
 
J

Jan Panteltje

Guest
On a sunny day (Sat, 22 Jan 2022 19:14:32 -0800 (PST)) it happened Rick C
<gnuarm.deletethisbit@gmail.com> wrote in
<79d8ba05-633a-4166-ab31-140807936482n@googlegroups.com>:

On Saturday, January 22, 2022 at 6:29:32 PM UTC-5, lang...@fonz.dk wrote:
l=C3=B8rdag den 22. januar 2022 kl. 04.28.58 UTC+1 skrev gnuarm.del...@gmail.com:

On Friday, January 21, 2022 at 6:42:00 AM UTC-5, lang...@fonz.dk wrote:

fredag den 21. januar 2022 kl. 03.08.06 UTC+1 skrev jla...@highlandsniptechnology.com:

On Thu, 20 Jan 2022 11:51:16 -0800 (PST), Lasse Langwadt Christensen

lang...@fonz.dk> wrote:

torsdag den 20. januar 2022 kl. 17.31.18 UTC+1 skrev jla...@highlandsniptechnology.com:

This uses an FPGA LVDS input as a comparator, and one external RC,
to
make an ADC. Just need an algorithm to process the flop output.


A simpler ADC should be possible.


more than one way to do it, one is basically successive approximation
with a pwm dac
another is delta-sigma with RC as \"integrator\" that might have an advantage
in that the
comparator doesn\'t follow the input signal it is always ~1/2 Vcc

That\'s certainly better; the FPGA LVDS receivers are mediocre
comparators. But the game was to minimize the number of external
parts. I\'ll be digitizing a thermistor on a heat sink, so it\'s not a

precision thing.

If we go with an available Lattice FPGA, it doesn\'t have an ADC.

Some sort of delta-sigma signal processing would be interesting.

I could use an LM71, SPI temp sensor, which is just not as
interesting.
even simpler tmp05/tmp06 which is pwm output so all you need is a counter
in the fpga

or for easy mounting on a heat sink,
https://dk.farnell.com/smartec/smt172-220/temperature-sensor-1deg-c-to-220/dp/2543396

Isn\'t the FPGA the place where you put arbitrarily complex logic? Why try
to minimize it?
why spend time to implement a SPI, use three/four pins, or logic and extra
parts to fudge an ADC and calibrate that
when you can get a calibrated part that only need a single pin and very simple
logic

Not sure what you are comparing to what. An ADC inside the FPGA uses no external
parts other than perhaps resistors and capacitors. You are talking
about a temperature sensor, I was only talking about an ADC. If the cost is
paramount, the passives are cheaper than the TMP05/06, only a few of them
are active, in stock in small quantities at Digikey and cost dollars!!! Am
I looking at the wrong parts? I\'ve used an analog temperature sensor that
was only $0.10 in quantity, the TMP236! Well, looks like they are a bit
more now, $0.27. I got a penny happy group of designers to use that instead
of a thermistor which was the same price.

The semiconductor shortage seems to have decimated the inventory of temperature
sensors. Digikey will show 15 or more parts, but only 2 in stock and 52
week lead times once those are gone!

Yeah, resistors and capacitors with a thermistor are looking pretty good.

Any diode will function as temperature sensor.
Been there done that, even used the forward biased cb junction from a TO220 transistor screwed to the heatsink.
Is sort of linear, and takes only one calibration point, collector at ground potential from heatsink, no isolation needed.
Any old TO220 will do :)
http://panteltje.com/panteltje/tri_pic/tritium_decay_experiment_black_box_circuit_diagram_IMG_3883.GIF
on pin 9 of the PIC.
 
R

Rick C

Guest
On Sunday, January 23, 2022 at 2:17:19 AM UTC-5, Jan Panteltje wrote:
On a sunny day (Sat, 22 Jan 2022 19:14:32 -0800 (PST)) it happened Rick C

Yeah, resistors and capacitors with a thermistor are looking pretty good..
Any diode will function as temperature sensor.
Been there done that, even used the forward biased cb junction from a TO220 transistor screwed to the heatsink.
Is sort of linear, and takes only one calibration point, collector at ground potential from heatsink, no isolation needed.
Any old TO220 will do :)
http://panteltje.com/panteltje/tri_pic/tritium_decay_experiment_black_box_circuit_diagram_IMG_3883.GIF
on pin 9 of the PIC.

What was the temperature resolution of this setup? When you mention calibration point, do you mean a one time design calibration or a calibration for each device? I know they use diode junctions on chips to measure temperature, but typically they use a special circuit to drive with two known currents, eliminating the need for calibration, no?


--

Rick C.

-+ Get 1,000 miles of free Supercharging
-+ Tesla referral code - https://ts.la/richard11209
 
J

Jan Panteltje

Guest
On a sunny day (Sun, 23 Jan 2022 04:06:46 -0800 (PST)) it happened Rick C
<gnuarm.deletethisbit@gmail.com> wrote in
<bae72651-1e98-43de-b7ee-9ff379eb6470n@googlegroups.com>:

On Sunday, January 23, 2022 at 2:17:19 AM UTC-5, Jan Panteltje wrote:
On a sunny day (Sat, 22 Jan 2022 19:14:32 -0800 (PST)) it happened Rick C


Yeah, resistors and capacitors with a thermistor are looking pretty good.

Any diode will function as temperature sensor.
Been there done that, even used the forward biased cb junction from a TO220
transistor screwed to the heatsink.
Is sort of linear, and takes only one calibration point, collector at ground
potential from heatsink, no isolation needed.
Any old TO220 will do :)
http://panteltje.com/panteltje/tri_pic/tritium_decay_experiment_black_box_circuit_diagram_IMG_3883.GIF

on pin 9 of the PIC.

What was the temperature resolution of this setup? When you mention calibration
point, do you mean a one time design calibration or a calibration for
each device? I know they use diode junctions on chips to measure temperature,
but typically they use a special circuit to drive with two known currents,
eliminating the need for calibration, no?

Well in this case I wanted to stabilize the temperature,
so measured the ADC steps for the temperature I wanted
and the control loop then steered towards that.
http://panteltje.com/panteltje/tri_pic/
In the same way you can set an alarm level.
There is a linear slope of about -2.1 mV / degree C for a Si diode, accurate enough for calculating heatsink temperature.
If you power the junction via a resistor from some higher voltage, say 5V or 12V then the current change due to
Vcb change is not really that much over a normal range.
https://electronics.stackexchange.com/questions/13195/diode-temperature-effect
 
R

Rick C

Guest
On Sunday, January 23, 2022 at 8:16:09 AM UTC-5, Jan Panteltje wrote:
On a sunny day (Sun, 23 Jan 2022 04:06:46 -0800 (PST)) it happened Rick C
gnuarm.del...@gmail.com> wrote in
bae72651-1e98-43de...@googlegroups.com>:
On Sunday, January 23, 2022 at 2:17:19 AM UTC-5, Jan Panteltje wrote:
On a sunny day (Sat, 22 Jan 2022 19:14:32 -0800 (PST)) it happened Rick C


Yeah, resistors and capacitors with a thermistor are looking pretty good.

Any diode will function as temperature sensor.
Been there done that, even used the forward biased cb junction from a TO220
transistor screwed to the heatsink.
Is sort of linear, and takes only one calibration point, collector at ground
potential from heatsink, no isolation needed.
Any old TO220 will do :)
http://panteltje.com/panteltje/tri_pic/tritium_decay_experiment_black_box_circuit_diagram_IMG_3883.GIF

on pin 9 of the PIC.

What was the temperature resolution of this setup? When you mention calibration
point, do you mean a one time design calibration or a calibration for
each device? I know they use diode junctions on chips to measure temperature,
but typically they use a special circuit to drive with two known currents,
eliminating the need for calibration, no?
Well in this case I wanted to stabilize the temperature,
so measured the ADC steps for the temperature I wanted
and the control loop then steered towards that.
http://panteltje.com/panteltje/tri_pic/
In the same way you can set an alarm level.
There is a linear slope of about -2.1 mV / degree C for a Si diode, accurate enough for calculating heatsink temperature.
If you power the junction via a resistor from some higher voltage, say 5V or 12V then the current change due to
Vcb change is not really that much over a normal range.
https://electronics.stackexchange.com/questions/13195/diode-temperature-effect

Would you need to do the calibration for every unit built, or just once for the design? Does the voltage for your set point vary with normal device variations?

I ask this because I thought it was the slope with temperature that is pretty consistent between devices while the details of the measured voltage would vary. So to avoid having to calibrate each device measurements were required at two currents?

Or are you saying your requirements simply don\'t require that much accuracy?

--

Rick C.

+- Get 1,000 miles of free Supercharging
+- Tesla referral code - https://ts.la/richard11209
 
J

Jan Panteltje

Guest
On a sunny day (Sun, 23 Jan 2022 06:09:48 -0800 (PST)) it happened Rick C
<gnuarm.deletethisbit@gmail.com> wrote in
<302ce5e5-314e-41f2-a8a6-530b06367752n@googlegroups.com>:

On Sunday, January 23, 2022 at 8:16:09 AM UTC-5, Jan Panteltje wrote:
On a sunny day (Sun, 23 Jan 2022 04:06:46 -0800 (PST)) it happened Rick C
gnuarm.del...@gmail.com> wrote in
bae72651-1e98-43de...@googlegroups.com>:
On Sunday, January 23, 2022 at 2:17:19 AM UTC-5, Jan Panteltje wrote:
On a sunny day (Sat, 22 Jan 2022 19:14:32 -0800 (PST)) it happened Rick C


Yeah, resistors and capacitors with a thermistor are looking pretty good.

Any diode will function as temperature sensor.
Been there done that, even used the forward biased cb junction from a TO220
transistor screwed to the heatsink.
Is sort of linear, and takes only one calibration point, collector at ground
potential from heatsink, no isolation needed.
Any old TO220 will do :)
http://panteltje.com/panteltje/tri_pic/tritium_decay_experiment_black_box_circuit_diagram_IMG_3883.GIF

on pin 9 of the PIC.

What was the temperature resolution of this setup? When you mention calibration
point, do you mean a one time design calibration or a calibration for
each device? I know they use diode junctions on chips to measure temperature,
but typically they use a special circuit to drive with two known currents,
eliminating the need for calibration, no?
Well in this case I wanted to stabilize the temperature,
so measured the ADC steps for the temperature I wanted
and the control loop then steered towards that.
http://panteltje.com/panteltje/tri_pic/
In the same way you can set an alarm level.
There is a linear slope of about -2.1 mV / degree C for a Si diode, accurate enough for calculating heatsink temperature.
If you power the junction via a resistor from some higher voltage, say 5V or 12V then the current change due to
Vcb change is not really that much over a normal range.
https://electronics.stackexchange.com/questions/13195/diode-temperature-effect

Would you need to do the calibration for every unit built, or just once for the design? Does the voltage for your set point
vary with normal device variations?

I ask this because I thought it was the slope with temperature that is pretty consistent between devices while the details of
the measured voltage would vary. So to avoid having to calibrate each device measurements were required at two currents?

Or are you saying your requirements simply don\'t require that much accuracy?

Driving the heatsink (in my case the alu plate that holds the photo diodes, opamp amplifier and tritium light) to
a specific temperature and maintaining it from there from the ADC steps gives very very high accuracy.
The system is basically a thermostat
So calibrated at a specific temperature for that specific instrument once as there is only one.


If you wanted to know ADC steps for other temperatures do the mV / C thing.
John wants to measure heatsink temperature over a big range I think, this would work fine with same small error.
But you could just as well glue some LM35 or so to the heatsinks .. I have used those too.
Or some other sensor chip with i2c or spi interface.
Tom was joking about using a FLIR camera and doing the video processing in FPGA, gives you about +-2 degrees C accuracy or so.

On the other end of the spectrum: we had \'clicksons\' in the past that would open at some high temperature.
No idea what his specs are
https://www.budgetronics.eu/en/switching/other-switches/clickson-switches-off-above-180-celcius-16a-manual-reset/a-18639-10000073
 
L

Lasse Langwadt Christensen

Guest
søndag den 23. januar 2022 kl. 04.14.36 UTC+1 skrev gnuarm.del...@gmail.com:
On Saturday, January 22, 2022 at 6:29:32 PM UTC-5, lang...@fonz.dk wrote:
lørdag den 22. januar 2022 kl. 04.28.58 UTC+1 skrev gnuarm.del...@gmail.com:
On Friday, January 21, 2022 at 6:42:00 AM UTC-5, lang...@fonz.dk wrote:
fredag den 21. januar 2022 kl. 03.08.06 UTC+1 skrev jla...@highlandsniptechnology.com:
On Thu, 20 Jan 2022 11:51:16 -0800 (PST), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

torsdag den 20. januar 2022 kl. 17.31.18 UTC+1 skrev jla...@highlandsniptechnology.com:
This uses an FPGA LVDS input as a comparator, and one external RC, to
make an ADC. Just need an algorithm to process the flop output..

A simpler ADC should be possible.


more than one way to do it, one is basically successive approximation with a pwm dac
another is delta-sigma with RC as \"integrator\" that might have an advantage in that the
comparator doesn\'t follow the input signal it is always ~1/2 Vcc
That\'s certainly better; the FPGA LVDS receivers are mediocre
comparators. But the game was to minimize the number of external
parts. I\'ll be digitizing a thermistor on a heat sink, so it\'s not a
precision thing.

If we go with an available Lattice FPGA, it doesn\'t have an ADC.

Some sort of delta-sigma signal processing would be interesting.

I could use an LM71, SPI temp sensor, which is just not as
interesting.
even simpler tmp05/tmp06 which is pwm output so all you need is a counter in the fpga

or for easy mounting on a heat sink, https://dk.farnell.com/smartec/smt172-220/temperature-sensor-1deg-c-to-220/dp/2543396
Isn\'t the FPGA the place where you put arbitrarily complex logic? Why try to minimize it?
why spend time to implement a SPI, use three/four pins, or logic and extra parts to fudge an ADC and calibrate that
when you can get a calibrated part that only need a single pin and very simple logic
Not sure what you are comparing to what. An ADC inside the FPGA uses no external parts other than perhaps resistors and capacitors. You are talking about a temperature sensor, I was only talking about an ADC. If the cost is paramount, the passives are cheaper than the TMP05/06, only a few of them are active, in stock in small quantities at Digikey and cost dollars!!! Am I looking at the wrong parts? I\'ve used an analog temperature sensor that was only $0.10 in quantity, the TMP236! Well, looks like they are a bit more now, $0.27. I got a penny happy group of designers to use that instead of a thermistor which was the same price.

The semiconductor shortage seems to have decimated the inventory of temperature sensors. Digikey will show 15 or more parts, but only 2 in stock and 52 week lead times once those are gone!

Yeah, resistors and capacitors with a thermistor are looking pretty good.

sure if you need to build thousands, if you only 100 maybe not so much

 
R

Rick C

Guest
On Sunday, January 23, 2022 at 12:50:18 PM UTC-5, lang...@fonz.dk wrote:
søndag den 23. januar 2022 kl. 04.14.36 UTC+1 skrev gnuarm.del...@gmail.com:
On Saturday, January 22, 2022 at 6:29:32 PM UTC-5, lang...@fonz.dk wrote:
lørdag den 22. januar 2022 kl. 04.28.58 UTC+1 skrev gnuarm.del....@gmail.com:
On Friday, January 21, 2022 at 6:42:00 AM UTC-5, lang...@fonz.dk wrote:
fredag den 21. januar 2022 kl. 03.08.06 UTC+1 skrev jla...@highlandsniptechnology.com:
On Thu, 20 Jan 2022 11:51:16 -0800 (PST), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

torsdag den 20. januar 2022 kl. 17.31.18 UTC+1 skrev jla...@highlandsniptechnology.com:
This uses an FPGA LVDS input as a comparator, and one external RC, to
make an ADC. Just need an algorithm to process the flop output.

A simpler ADC should be possible.


more than one way to do it, one is basically successive approximation with a pwm dac
another is delta-sigma with RC as \"integrator\" that might have an advantage in that the
comparator doesn\'t follow the input signal it is always ~1/2 Vcc
That\'s certainly better; the FPGA LVDS receivers are mediocre
comparators. But the game was to minimize the number of external
parts. I\'ll be digitizing a thermistor on a heat sink, so it\'s not a
precision thing.

If we go with an available Lattice FPGA, it doesn\'t have an ADC..

Some sort of delta-sigma signal processing would be interesting..

I could use an LM71, SPI temp sensor, which is just not as
interesting.
even simpler tmp05/tmp06 which is pwm output so all you need is a counter in the fpga

or for easy mounting on a heat sink, https://dk.farnell.com/smartec/smt172-220/temperature-sensor-1deg-c-to-220/dp/2543396
Isn\'t the FPGA the place where you put arbitrarily complex logic? Why try to minimize it?
why spend time to implement a SPI, use three/four pins, or logic and extra parts to fudge an ADC and calibrate that
when you can get a calibrated part that only need a single pin and very simple logic
Not sure what you are comparing to what. An ADC inside the FPGA uses no external parts other than perhaps resistors and capacitors. You are talking about a temperature sensor, I was only talking about an ADC. If the cost is paramount, the passives are cheaper than the TMP05/06, only a few of them are active, in stock in small quantities at Digikey and cost dollars!!! Am I looking at the wrong parts? I\'ve used an analog temperature sensor that was only $0.10 in quantity, the TMP236! Well, looks like they are a bit more now, $0.27. I got a penny happy group of designers to use that instead of a thermistor which was the same price.

The semiconductor shortage seems to have decimated the inventory of temperature sensors. Digikey will show 15 or more parts, but only 2 in stock and 52 week lead times once those are gone!

Yeah, resistors and capacitors with a thermistor are looking pretty good.
sure if you need to build thousands, if you only 100 maybe not so much

Building 100 still requires 100 ICs... if you can get them. Whatever.

--

Rick C.

++ Get 1,000 miles of free Supercharging
++ Tesla referral code - https://ts.la/richard11209
 

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