basic computer sequential implementation in vhdl

[kliga]

I am working now on implementing a 16 bit RISC CPU in VHDL, the instruction set consists of 8 instructions 16 bits each.
i need your help how to start implementation? could you give me examples for source codes like this architecture

 

[rickman]

On 12/18/2015 5:05 PM, kliga wrote:

I am working now on implementing a 16 bit RISC CPU in VHDL, the instruction set consists of 8 instructions 16 bits each.
i need your help how to start implementation? could you give me examples for source codes like this architecture

There are tons and tons of CPU designs on the Internet. All you have to
do is look around a little. If you have some specific questions please
ask. But you can do your own searches, no?

--

Rick

 

W dniu piątek, 18 grudnia 2015 23:05:34 UTC+1 użytkownik kliga napisał:

I am working now on implementing a 16 bit RISC CPU in VHDL, the instruction set consists of 8 instructions 16 bits each.
i need your help how to start implementation? could you give me examples for source codes like this architecture

case Instruction_Code is
when "000" => ......; -- here add your desired code
when "001" => ......;
.
.

when "111" => ......;
when others => null;
end case;