Array of std_logic_vector

  • Thread starter Willem Oosthuizen
  • Start date
W

Willem Oosthuizen

Guest
I have the following:

type AA is array(6 downto 0) of std_logic_vector(5 downto 0);
signal Thing: AA;

begin

Thing(0,0) <= '1';

......
The Synth complains about the assignment: "Indexing operation does not match
dimensionality of array"

Any suggestions?
 
Willem Oosthuizen wrote:

I have the following:

type AA is array(6 downto 0) of std_logic_vector(5 downto 0);
signal Thing: AA;

begin

Thing(0,0) <= '1';

.....
The Synth complains about the assignment: "Indexing operation does not
match dimensionality of array"

Any suggestions?
Of course, wrong indexing syntax.
It has to be

Thing(0)(0) <= '1';

(like indexing in C)

Regards,
Mario
 
Mario Trams wrote:
Willem Oosthuizen wrote:

I have the following:

type AA is array(6 downto 0) of std_logic_vector(5 downto 0);
signal Thing: AA;

begin

Thing(0,0) <= '1';

.....
The Synth complains about the assignment: "Indexing operation does not
match dimensionality of array"

Any suggestions?

Of course, wrong indexing syntax.
It has to be

Thing(0)(0) <= '1';

(like indexing in C)
More completely, it's not incorrect syntax but rather the wrong syntax
for this type of array. The thing(a,b) format is for multidimensional
arrays whereas thing(a)(b) is for an array of arrays, which is what you
have. For some reason, synthesizer makers have chosen to support arrays
of arrays but not multidimensional arrays. Multidimensional arrays are
perfectly legal for simulation.
--
Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
Vancouver, BC, Canada . . . . . . . . . . . http://www.marmot-eng.com
 

Welcome to EDABoard.com

Sponsor

Back
Top