write_techfile ?

hello there,

i am selvakumar from a deemed university india.i am new to cadence
tool,i have one basic doubt how to create our own technology files ?,
i know it is somewhat tougher to write those files. But i am in a
position to write my own technology file so can anyone give me
suggestions on writing tech files ?

needed your succour

selvakumar

 

[Kholdoun TORKI]

Selvakumar,

The best way to start is to download the generic GPDK (Generic Process
Design Kit) which is given by Cadence free of charge and contain
most of the functionnalities for a full-custom design-kit.
This design-kit is intended to show how to implement a full-custom
design-kit, and this avoid to start from scratch.

Look at the following web site. This is your starting point :
http://www.cadencepdk.com

Regards,

================================================================
Kholdoun TORKI
http://cmp.imag.fr
================================================================

selvakumar_in@hotmail.com wrote:

hello there,

i am selvakumar from a deemed university india.i am new to cadence
tool,i have one basic doubt how to create our own technology files ?,
i know it is somewhat tougher to write those files. But i am in a
position to write my own technology file so can anyone give me
suggestions on writing tech files ?

needed your succour

selvakumar

 

[John Gianni]

Kholdoun TORKI <Kholdoun.Torki@imag.fr> wrote in message news:<3F263C81.70807@imag.fr>...

The best way to start is to download the generic GPDK (Generic Process
Design Kit) which is given by Cadence free of charge and contain
most of the functionnalities for a full-custom design-kit.
This design-kit is intended to show how to implement a full-custom
design-kit, and this avoid to start from scratch.

I fully agree with this advice. Cadence is improving the generic process
design kit daily, adding, for example, techfile functionality to support
Virtuoso Preview, Cadence Chip Assembly Router, Virtuoso Chip Editor,
Dracula/Diva/Assura verification, UltraSim, Aptivia, NeoCell technology
data, OpenAccess, Virtuoso XL, Virtuoso Composer, SeismIC, VoltageStorm,
etc.

And, Cadence tests much of its software using chips designed in this
generic process. These working examples are valuable samples for those
of you contemplating adding lines to your own technology files.

I would just like to suggest a simple re-clarification on the
reputed 'free-of-charge' point.

While there may not be an overt additional fee for the Cadence generic
process design kit, it is my understanding that the generic design kit
is licensed, copyrighted software - to be used only within the license
agreement signed when your design tools were purchased from Cadence or
from a Cadence distributor. It's not freeware is my point.

Of course, for complete details, check with your local sales
or support representative.

Good luck
--
ALL my USENET posts are personal opinion intended to edify Cadence Customers.