Support Vector Machine VHDL

[Gee Won Han]

I would like to know if there someone has a VHDL code for Support Vector Machine.

I would also like to know if someone could explain to me this line of code

res: out sfixed(7 downto -10)


I know what is downto, but I have never seen it to a negative number before.
Does that mean this is sfixed is 17 bits?

Thanks

 

[KJ]

On Thursday, May 7, 2015 at 10:13:58 PM UTC-4, Gee Won Han wrote:

I would also like to know if someone could explain to me this line of code

res: out sfixed(7 downto -10)


I know what is downto, but I have never seen it to a negative number before.
Does that mean this is sfixed is 17 bits?

sfixed is a data type that represents a signed fixed point number. There are 8 bits to the left of the point (7 downto 0) and there are 10 bits to the right of the point (-1 downto -10). There is also a type called ufixed which is simply the unsigned version.

Go here www.eda-stds.org/fphdl to get to the VHDL fixed and floating point package. There is a user's guide that should be able to answer additional questions you would have on how to use these packages.

Kevin Jennings