Signed addition

J

Juha Turunen

Guest
Hi,

I need to add too signed binary numbers which are in a format such
that the MSB is the sign and the rest of the bits are the number's
absolute value. The addition can be done with combinatorial logic
and must be implemented with 74-series logic. Using such number
format probably doesn't make much sense, but homework assignments
rarely do :)

So what I planned was to make a circuit that first converts the
numbers to 1's complement if the sign bit is 1 with XOR gates and
then adding them together. The carry out of the last adder must be
connected to the carry in of the first adder, right? The result is
converted back to the original number format.

Will this work?

--
Juha Turunen (turunen(at)iki.fi) elpuri@IRC | The problem with the global
Torikatu 5A4, 53900 Lappeenranta, Finland | village are all the global
GSM: 040-7092525, http://iki.fi/turunen/ | village idiots.
 
Juha Turunen wrote:
Hi,

I need to add too signed binary numbers which are in a format such
that the MSB is the sign and the rest of the bits are the number's
absolute value. The addition can be done with combinatorial logic
and must be implemented with 74-series logic. Using such number
format probably doesn't make much sense, but homework assignments
rarely do :)
It makes sense in terms of testing your knowledge of arithmetic
operations on various forms of binary number representations, and in
your case it looks like you fail. Go back and review the material until
you understand it, then answer the question yourself.
 
Juha Turunen wrote:
Hi,

I need to add too signed binary numbers which are in a format such
that the MSB is the sign and the rest of the bits are the number's
absolute value. The addition can be done with combinatorial logic
and must be implemented with 74-series logic. Using such number
format probably doesn't make much sense, but homework assignments
rarely do :)

So what I planned was to make a circuit that first converts the
numbers to 1's complement if the sign bit is 1 with XOR gates and
then adding them together. The carry out of the last adder must be
connected to the carry in of the first adder, right? The result is
converted back to the original number format.

Will this work?
If the magnitude was 8-bit, the one's complement of x would be 255-x. If
you write equations for the output of your circuit in at least three of the
four quadrants, you'll see the answer.
 
On Wed, 09 Feb 2005 00:59:18 +0000, Fred Bloggs wrote:
Ok- here's a not-so-polite f_ck you.
Right back at ya!
--
The Pig Bladder From Uranus, Still Waiting for
Some Hot Babe to Ask What My Favorite Planet Is.
 
Fred Bloggs wrote:
Juha Turunen wrote:
Fred Bloggs wrote:
Next time someone asks something maybe you could try to be more
constructive like the other ones that replied or maybe not reply
at all instead of wasting two minutes of your life writing a
semi-polite fuck you.

Ok- here's a not-so-polite f_ck you. Now for the not-so-constructive
criticism: it is clear that you are little poof punk bs artist, you are
a slouch and a shirker, as well as an uneducable low life enrolled in
the wrong course of study.
Let it alllllll out.. Everything's gonna be just fine... :)

--
Juha Turunen (turunen(at)iki.fi) elpuri@IRC | The problem with the global
Torikatu 5A4, 53100 Lappeenranta, Finland | village are all the global
GSM: 040-7092525, http://iki.fi/turunen/ | village idiots.
 

Welcome to EDABoard.com

Sponsor

Back
Top