T
Tal Lachmann
Guest
Hi,
We are trying to implement the Xilinx 66/64 PCI core on a V2P-5.
Unfortunately, we just received a note from Xilinx that the -5 device
will not live up to the 66MHz requirement (despite the fact that they
had originally claimed that it _is_ on their "qualified" list).
Does anyone have experience with this core? Has anyone managed to
implement a 66/64 PCI Master/Slave on a V2P-5 device? Any hints/input
will be highly appreciated.
Thanks much in advance,
Tal.
We are trying to implement the Xilinx 66/64 PCI core on a V2P-5.
Unfortunately, we just received a note from Xilinx that the -5 device
will not live up to the 66MHz requirement (despite the fact that they
had originally claimed that it _is_ on their "qualified" list).
Does anyone have experience with this core? Has anyone managed to
implement a 66/64 PCI Master/Slave on a V2P-5 device? Any hints/input
will be highly appreciated.
Thanks much in advance,
Tal.