# One cycle 50/60Hz RMS Calculation...

G

#### Gold_Spark

##### Guest
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.

S

#### server

##### Guest
On Thu, 15 Oct 2020 20:00:56 -0700 (PDT), Gold_Spark
<bluelectronx@gmail.com> wrote:

My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.
Seems to me that if you want the RMS value per cycle, you have to know
what a cycle is.

Given a sine-squared curve, you only need two samples spaced by half
the period. But you need to know the period.

Since the world is noisy, more samples per period is better than two.
But again, they need to be spaced right.

Sampling at 6 KHz, you could find the positive zero crossings of the
sine wave and average all the sin^2 samples between them. That\'s not
hard.

--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard

W

#### whit3rd

##### Guest
On Thursday, October 15, 2020 at 8:01:02 PM UTC-7, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.
Mathematically, if you can delay the wave by 90 degrees, then the sum of the signal-squared and
the delayed-signal-squared ought to be a constant value for a sinewave input. It wouldn\'t matter
about the zero-crossing times being on, or off, the frequency. So, I\'\'d phase-lock to the
waveform, and take samples into a buffer with at least a quarter-wave worth of stored values,
and instead of summing over a real half-wave, you can pick anything from a quarter wave up
to a whole wave, and make any kind of average that suits your fancy.

A digital PLL is relatively trivial at 50 or 60 Hz. Depending on the dynamics of \'fluctuations\', of
course.

B

#### bitrex

##### Guest
On 10/16/2020 12:01 AM, jlarkin@highlandsniptechnology.com wrote:
On Thu, 15 Oct 2020 20:00:56 -0700 (PDT), Gold_Spark
bluelectronx@gmail.com> wrote:

My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.

Seems to me that if you want the RMS value per cycle, you have to know
what a cycle is.

Given a sine-squared curve, you only need two samples spaced by half
the period. But you need to know the period.

Since the world is noisy, more samples per period is better than two.
But again, they need to be spaced right.

Sampling at 6 KHz, you could find the positive zero crossings of the
sine wave and average all the sin^2 samples between them. That\'s not
hard.
The approach in the paper seems like it\'s for very cost-constrained systems.

The stock Arduino/AVR 8-bit uP environment\'s sampling rate is 10kHz but
that can be boosted to 100s of kHz in software, and if it all it needs
to do most of the time is calculate RMS values of 50/60Hz sines, an 8
bit RISC at 20 MHz is perfectly capable of that. though I\'d use one with
a hardware multiplier, the really cheap ones don\'t have it, in which
case see above paper for \"cost constrained.\"

Or buy one of those mystery-meat 32 bit ARMs from China for 25 cent and
hope you can figure out the documentation.

S

#### server

##### Guest
On Thursday, October 15, 2020 at 11:01:02 PM UTC-4, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.
I only perused the paper, but it seems that they mentioned \"variable frequency\". It seems to me that getting 128 samples to do an RMS calculation is way more than enough. The problem is the variable frequency part. I would use my samples to estimate the zero crossing-s and then built an algorithm around the samples I have in between the zero crossings I measured.

S

#### server

##### Guest
On Fri, 16 Oct 2020 04:09:25 -0700 (PDT), blocher@columbus.rr.com
wrote:

On Thursday, October 15, 2020 at 11:01:02 PM UTC-4, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.

I only perused the paper, but it seems that they mentioned \"variable frequency\". It seems to me that getting 128 samples to do an RMS calculation is way more than enough. The problem is the variable frequency part. I would use my samples to estimate the zero crossing-s and then built an algorithm around the samples I have in between the zero crossings I measured.
If it\'s a good sine wave, it\'s not hard to seperate out single cycles
by looking at zero crossings, with a little filtering maybe.

Current waveforms can be very ugly. Best to use zero crossings of the
AC voltage waveform (which could be seen on one port bit) to locate
the cycles, and use the ADC data for current.

--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard

B

#### bitrex

##### Guest
On 10/16/2020 7:09 AM, blocher@columbus.rr.com wrote:
On Thursday, October 15, 2020 at 11:01:02 PM UTC-4, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.

I only perused the paper, but it seems that they mentioned \"variable frequency\". It seems to me that getting 128 samples to do an RMS calculation is way more than enough. The problem is the variable frequency part. I would use my samples to estimate the zero crossing-s and then built an algorithm around the samples I have in between the zero crossings I measured.
Point of the paper is about doing the detection _fast_. 128 samples is
plenty _if_ the sampling period is aligned with the frequency of the sine.

If it isn\'t and you have _only_ 128 samples of arbitrary phase with
respect to the sine period to work with, you can\'t naively estimate the
zero crossings without error any more than you can naively calculate the
RMS and get the right answer, the true zero-crossings will fall
in-between sampling periods, the data simply doesn\'t exist so you either
need to wait for more samples (which you don\'t wanna do) or have to
interpolate as per the paper.

B

#### bitrex

##### Guest
On 10/16/2020 10:40 AM, jlarkin@highlandsniptechnology.com wrote:
On Fri, 16 Oct 2020 04:09:25 -0700 (PDT), blocher@columbus.rr.com
wrote:

On Thursday, October 15, 2020 at 11:01:02 PM UTC-4, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.

I only perused the paper, but it seems that they mentioned \"variable frequency\". It seems to me that getting 128 samples to do an RMS calculation is way more than enough. The problem is the variable frequency part. I would use my samples to estimate the zero crossing-s and then built an algorithm around the samples I have in between the zero crossings I measured.

If it\'s a good sine wave, it\'s not hard to seperate out single cycles
by looking at zero crossings, with a little filtering maybe.

Current waveforms can be very ugly. Best to use zero crossings of the
AC voltage waveform (which could be seen on one port bit) to locate
the cycles, and use the ADC data for current.
You only need two samples per cycle of an ideal sine wave that extends
to infinity in both directions to tell you everything you want to know
about it in principle, but what is the bandwidth of a signal which is a
hacked single cycle of a 60 Hz sine that is then zero out to infinity on
the left and right. It ain\'t 60 Hz!

S

#### server

##### Guest
On Fri, 16 Oct 2020 11:19:02 -0400, bitrex <user@example.net> wrote:

On 10/16/2020 7:09 AM, blocher@columbus.rr.com wrote:
On Thursday, October 15, 2020 at 11:01:02 PM UTC-4, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.

I only perused the paper, but it seems that they mentioned \"variable frequency\". It seems to me that getting 128 samples to do an RMS calculation is way more than enough. The problem is the variable frequency part. I would use my samples to estimate the zero crossing-s and then built an algorithm around the samples I have in between the zero crossings I measured.

Point of the paper is about doing the detection _fast_. 128 samples is
plenty _if_ the sampling period is aligned with the frequency of the sine.

If it isn\'t and you have _only_ 128 samples of arbitrary phase with
respect to the sine period to work with, you can\'t naively estimate the
zero crossings without error any more than you can naively calculate the
RMS and get the right answer, the true zero-crossings will fall
in-between sampling periods, the data simply doesn\'t exist so you either
need to wait for more samples (which you don\'t wanna do) or have to
interpolate as per the paper.
The OP says he doesn\'t need extreme accuracy but wants one RMS value
per cycle. The AC line voltage is noisy anyhow, and current waveforms
can be horrors, so the very concept of single-cycle accuracy is silly.
128 samples per cycle is plenty, if you can find where the cycles are.

I\'d lowpass filter the voltage waveform and run through a comparator
to a port bit. Look at that to see where the cycles are. Process all
the ADC samples, for voltage or current, in each cycle.

--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard

P

#### Phil Hobbs

##### Guest
On 2020-10-16 00:44, whit3rd wrote:
On Thursday, October 15, 2020 at 8:01:02 PM UTC-7, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

Mathematically, if you can delay the wave by 90 degrees, then the sum of the signal-squared and
the delayed-signal-squared ought to be a constant value for a sinewave input. It wouldn\'t matter
about the zero-crossing times being on, or off, the frequency. So, I\'\'d phase-lock to the
waveform, and take samples into a buffer with at least a quarter-wave worth of stored values,
and instead of summing over a real half-wave, you can pick anything from a quarter wave up
to a whole wave, and make any kind of average that suits your fancy.

A digital PLL is relatively trivial at 50 or 60 Hz. Depending on the dynamics of \'fluctuations\', of
course.
Good luck doing all that in one cycle.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

R

#### Ricketty C

##### Guest
On Friday, October 16, 2020 at 12:26:25 PM UTC-4, jla...@highlandsniptechnology.com wrote:
On Fri, 16 Oct 2020 11:19:02 -0400, bitrex <user@example.net> wrote:

On 10/16/2020 7:09 AM, blocher@columbus.rr.com wrote:
On Thursday, October 15, 2020 at 11:01:02 PM UTC-4, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.

I only perused the paper, but it seems that they mentioned \"variable frequency\". It seems to me that getting 128 samples to do an RMS calculation is way more than enough. The problem is the variable frequency part. I would use my samples to estimate the zero crossing-s and then built an algorithm around the samples I have in between the zero crossings I measured.

Point of the paper is about doing the detection _fast_. 128 samples is
plenty _if_ the sampling period is aligned with the frequency of the sine.

If it isn\'t and you have _only_ 128 samples of arbitrary phase with
respect to the sine period to work with, you can\'t naively estimate the
zero crossings without error any more than you can naively calculate the
RMS and get the right answer, the true zero-crossings will fall
in-between sampling periods, the data simply doesn\'t exist so you either
need to wait for more samples (which you don\'t wanna do) or have to
interpolate as per the paper.

The OP says he doesn\'t need extreme accuracy but wants one RMS value
per cycle. The AC line voltage is noisy anyhow, and current waveforms
can be horrors, so the very concept of single-cycle accuracy is silly.
128 samples per cycle is plenty, if you can find where the cycles are.

I\'d lowpass filter the voltage waveform and run through a comparator
to a port bit. Look at that to see where the cycles are. Process all
the ADC samples, for voltage or current, in each cycle.
If he is sampling the input there is no reason to do any special filtering in the analog domain other than anti-alias filtering. The method described above using squared samples phase shifted and summed should provide a simple, effective way to make the measurement. If not that, filtering in the digital domain will be quite effective.

--

Rick C.

- Get 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

C

#### Chris

##### Guest
On 10/16/20 19:12, Ricketty C wrote:
On Friday, October 16, 2020 at 12:26:25 PM UTC-4, jla...@highlandsniptechnology.com wrote:
On Fri, 16 Oct 2020 11:19:02 -0400, bitrex<user@example.net> wrote:

On 10/16/2020 7:09 AM, blocher@columbus.rr.com wrote:
On Thursday, October 15, 2020 at 11:01:02 PM UTC-4, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.

I only perused the paper, but it seems that they mentioned \"variable frequency\". It seems to me that getting 128 samples to do an RMS calculation is way more than enough. The problem is the variable frequency part. I would use my samples to estimate the zero crossing-s and then built an algorithm around the samples I have in between the zero crossings I measured.

Point of the paper is about doing the detection _fast_. 128 samples is
plenty _if_ the sampling period is aligned with the frequency of the sine.

If it isn\'t and you have _only_ 128 samples of arbitrary phase with
respect to the sine period to work with, you can\'t naively estimate the
zero crossings without error any more than you can naively calculate the
RMS and get the right answer, the true zero-crossings will fall
in-between sampling periods, the data simply doesn\'t exist so you either
need to wait for more samples (which you don\'t wanna do) or have to
interpolate as per the paper.

The OP says he doesn\'t need extreme accuracy but wants one RMS value
per cycle. The AC line voltage is noisy anyhow, and current waveforms
can be horrors, so the very concept of single-cycle accuracy is silly.
128 samples per cycle is plenty, if you can find where the cycles are.

I\'d lowpass filter the voltage waveform and run through a comparator
to a port bit. Look at that to see where the cycles are. Process all
the ADC samples, for voltage or current, in each cycle.

If he is sampling the input there is no reason to do any special filtering in the analog domain other than anti-alias filtering. The method described above using squared samples phase shifted and summed should provide a simple, effective way to make the measurement. If not that, filtering in the digital domain will be quite effective.
Assuming true sine wave:

Why not use a random noise generator to sample the waveform
over several cycles, which would not need any pll, just
a sample / hold and sum ?...

B

#### bitrex

##### Guest
On 10/16/2020 2:12 PM, Ricketty C wrote:
On Friday, October 16, 2020 at 12:26:25 PM UTC-4, jla...@highlandsniptechnology.com wrote:
On Fri, 16 Oct 2020 11:19:02 -0400, bitrex <user@example.net> wrote:

On 10/16/2020 7:09 AM, blocher@columbus.rr.com wrote:
On Thursday, October 15, 2020 at 11:01:02 PM UTC-4, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.

I only perused the paper, but it seems that they mentioned \"variable frequency\". It seems to me that getting 128 samples to do an RMS calculation is way more than enough. The problem is the variable frequency part. I would use my samples to estimate the zero crossing-s and then built an algorithm around the samples I have in between the zero crossings I measured.

Point of the paper is about doing the detection _fast_. 128 samples is
plenty _if_ the sampling period is aligned with the frequency of the sine.

If it isn\'t and you have _only_ 128 samples of arbitrary phase with
respect to the sine period to work with, you can\'t naively estimate the
zero crossings without error any more than you can naively calculate the
RMS and get the right answer, the true zero-crossings will fall
in-between sampling periods, the data simply doesn\'t exist so you either
need to wait for more samples (which you don\'t wanna do) or have to
interpolate as per the paper.

The OP says he doesn\'t need extreme accuracy but wants one RMS value
per cycle. The AC line voltage is noisy anyhow, and current waveforms
can be horrors, so the very concept of single-cycle accuracy is silly.
128 samples per cycle is plenty, if you can find where the cycles are.

I\'d lowpass filter the voltage waveform and run through a comparator
to a port bit. Look at that to see where the cycles are. Process all
the ADC samples, for voltage or current, in each cycle.

If he is sampling the input there is no reason to do any special filtering in the analog domain other than anti-alias filtering. The method described above using squared samples phase shifted and summed should provide a simple, effective way to make the measurement. If not that, filtering in the digital domain will be quite effective.
I think using a comparator to fire an interrupt and bring the ADC up on
the zero-cross detect works fine if you only need to check
intermittently, the ADC will come up in 10s of uS a lot shorter than the
sampling period.

But if I understand the paper correctly you can use its method on a
per-sample basis and still do a running average, reducing overhead; if
you\'re on a relatively resourced-constrained processor like an 8-bitter
having to do an interrupt every 50 or 60 seconds and then calculate the
naive average within the cycle period is going to strain its resources.

S

#### server

##### Guest
On Fri, 16 Oct 2020 13:43:08 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2020-10-16 00:44, whit3rd wrote:
On Thursday, October 15, 2020 at 8:01:02 PM UTC-7, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

Mathematically, if you can delay the wave by 90 degrees, then the sum of the signal-squared and
the delayed-signal-squared ought to be a constant value for a sinewave input. It wouldn\'t matter
about the zero-crossing times being on, or off, the frequency. So, I\'\'d phase-lock to the
waveform, and take samples into a buffer with at least a quarter-wave worth of stored values,
and instead of summing over a real half-wave, you can pick anything from a quarter wave up
to a whole wave, and make any kind of average that suits your fancy.

A digital PLL is relatively trivial at 50 or 60 Hz. Depending on the dynamics of \'fluctuations\', of
course.

Good luck doing all that in one cycle.
The OP wanted RMS readings for each individual (half)cycle, which
makes sense e.g. with protection relays.

However, if the electricity is provided by a real mechanical generator
the short term (1 s) stability is quite good thanks to the large
inertia of the generator rotor (often tons). The DPLL should be able
to track the mains frequency quite accurately and calculate the mains
cycle period and then use all the samples between (half)cycle marks
for RMS calculations.

P

#### Phil Hobbs

##### Guest
On 2020-10-17 04:38, upsidedown@downunder.com wrote:
On Fri, 16 Oct 2020 13:43:08 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2020-10-16 00:44, whit3rd wrote:
On Thursday, October 15, 2020 at 8:01:02 PM UTC-7, Gold_Spark
wrote:
My question is based on this paper:
http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to
improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches
both 50 and 60 Hz and possible fluctuations. In the
microcontroller, the plan I have is to set an ADC triggered by
a timer for a fixed sampling frequency, say 6 kHz.. I can also
use DMA or double buffer approach if needed.

Mathematically, if you can delay the wave by 90 degrees, then the
sum of the signal-squared and the delayed-signal-squared ought to
be a constant value for a sinewave input. It wouldn\'t matter
about the zero-crossing times being on, or off, the frequency.
So, I\'\'d phase-lock to the waveform, and take samples into a
buffer with at least a quarter-wave worth of stored values, and
instead of summing over a real half-wave, you can pick anything
from a quarter wave up to a whole wave, and make any kind of

A digital PLL is relatively trivial at 50 or 60 Hz. Depending on
the dynamics of \'fluctuations\', of course.

Good luck doing all that in one cycle.

The OP wanted RMS readings for each individual (half)cycle, which
makes sense e.g. with protection relays.
One can imagine scenarios where it would be reasonable, sure. But the
OP hasn\'t told us much about the actual one.

However, if the electricity is provided by a real mechanical
generator the short term (1 s) stability is quite good thanks to the
large inertia of the generator rotor (often tons).
Or it could be a solid-state inverter, or a gas-powered 500W genny with
an iffy ignition. Or he might not know--it seems to be mostly a
theoretical question.

The DPLL should be able to track the mains frequency quite accurately
and calculate the mains cycle period and then use all the samples
between (half)cycle marks for RMS calculations.
If everything is guaranteed to be slowly-varying and otherwise
well-behaved, all is easy, sure. But that\'s not the interesting
case--even whit\'s airy dismissal gave a nod to \'depending on the dynamics\'.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

M

#### Martin Brown

##### Guest
On 16/10/2020 04:00, Gold_Spark wrote:
My question is based on this paper:
http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to
improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both
50 and 60 Hz and possible fluctuations. In the microcontroller, the
plan I have is to set an ADC triggered by a timer for a fixed
sampling frequency, say 6 kHz.. I can also use DMA or double buffer
approach if needed.
Why not have it detect whether it is facing 50Hz or 60Hz mains supply
and then act accordingly to choose the right length N. Sampled at 6kHz
there is always an integer number of samples in a nominal mains cycle.

If you are doing it cycle by cycle there will be a fractional sample
error in one of them but it shouldn\'t matter much provided you make some
attempt at starting and ending on a lowish zero crossing value.

Mains power doesn\'t drift very far away from its nominal frequency
unless something is horribly wrong.

What do you think of the approach of the paper? I\'m open to other
suggestions regarding the proper way to sample the signal for a one
cycle RMS. I know that if I increase the number of cycles I can find
an integer sample time period that matches both 50/60 Hz, but the
point is that I need RMS per one cycle. Does not need to be so
precise, even integer RMS is Ok.
Using a common period like 100ms which is an exact multiple of cycles
for both frequencies is one good way out. Most precision ADCs intended
to work both in the US and ROW use this strategy. Japan has always done
it since half their country is on US 60Hz 100vac and the other UK 50Hz.

--
Regards,
Martin Brown

G

#### Gold_Spark

##### Guest
On Thursday, October 15, 2020 at 11:01:02 PM UTC-4, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.
I didn\'t provide much details, but basically my application is to detect leakage currents (earth) in the order of mAs, that\'s why I wanted fast detection. I\'ve seen some methods that use peak detection. It is right that peak detection offers the quickest response, but not necessarily a reliable one. I don\'t know how distorted my current waveforms are, but I certainly would not want to assume they are perfect sine waves in which peak values may not be easy to find. Maybe an average point by point could help get better peak approximation. At the end, that is why I thought of finding RMS per cycle since it could yield a more reliable result.

G

#### George Herold

##### Guest
On Saturday, October 17, 2020 at 10:29:04 AM UTC-4, Gold_Spark wrote:
On Thursday, October 15, 2020 at 11:01:02 PM UTC-4, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.

I didn\'t provide much details, but basically my application is to detect leakage currents (earth) in the order of mAs, that\'s why I wanted fast detection. I\'ve seen some methods that use peak detection. It is right that peak detection offers the quickest response, but not necessarily a reliable one. I don\'t know how distorted my current waveforms are, but I certainly would not want to assume they are perfect sine waves in which peak values may not be easy to find. Maybe an average point by point could help get better peak approximation. At the end, that is why I thought of finding RMS per cycle since it could yield a more reliable result.
How about something like a GFI circuit?
This is an alright discussion of how they work.
https://pdhonline.com/courses/e321/e321content.pdf

George H.

S

#### server

##### Guest
On Sat, 17 Oct 2020 06:02:04 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2020-10-17 04:38, upsidedown@downunder.com wrote:
On Fri, 16 Oct 2020 13:43:08 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2020-10-16 00:44, whit3rd wrote:
On Thursday, October 15, 2020 at 8:01:02 PM UTC-7, Gold_Spark
wrote:
My question is based on this paper:
http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to
improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches
both 50 and 60 Hz and possible fluctuations. In the
microcontroller, the plan I have is to set an ADC triggered by
a timer for a fixed sampling frequency, say 6 kHz.. I can also
use DMA or double buffer approach if needed.

Mathematically, if you can delay the wave by 90 degrees, then the
sum of the signal-squared and the delayed-signal-squared ought to
be a constant value for a sinewave input. It wouldn\'t matter
about the zero-crossing times being on, or off, the frequency.
So, I\'\'d phase-lock to the waveform, and take samples into a
buffer with at least a quarter-wave worth of stored values, and
instead of summing over a real half-wave, you can pick anything
from a quarter wave up to a whole wave, and make any kind of

A digital PLL is relatively trivial at 50 or 60 Hz. Depending on
the dynamics of \'fluctuations\', of course.

Good luck doing all that in one cycle.

The OP wanted RMS readings for each individual (half)cycle, which
makes sense e.g. with protection relays.

One can imagine scenarios where it would be reasonable, sure. But the
OP hasn\'t told us much about the actual one.
I can\'t think of one right now. Seems like one could square the
samples, lowpass filter, optional square root, trip on some limit.
Quantifying thermal protection to whole cycles sounds worse to me.

--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard

S

#### server

##### Guest
On Sat, 17 Oct 2020 01:52:50 -0400, bitrex <user@example.net> wrote:

On 10/16/2020 2:12 PM, Ricketty C wrote:
On Friday, October 16, 2020 at 12:26:25 PM UTC-4, jla...@highlandsniptechnology.com wrote:
On Fri, 16 Oct 2020 11:19:02 -0400, bitrex <user@example.net> wrote:

On 10/16/2020 7:09 AM, blocher@columbus.rr.com wrote:
On Thursday, October 15, 2020 at 11:01:02 PM UTC-4, Gold_Spark wrote:
My question is based on this paper: http://www.eletrica.ufpr.br/edu/artigos/CIL22-012_final_gerson.pdf

They claim to calculate RMS with non-integer number of samples to improve accuracy over half cycle or one cycle RMS.

In my case for one cycle I can\'t have an integer N that matches both 50 and 60 Hz and possible fluctuations. In the microcontroller, the plan I have is to set an ADC triggered by a timer for a fixed sampling frequency, say 6 kHz.. I can also use DMA or double buffer approach if needed.

What do you think of the approach of the paper? I\'m open to other suggestions regarding the proper way to sample the signal for a one cycle RMS. I know that if I increase the number of cycles I can find an integer sample time period that matches both 50/60 Hz, but the point is that I need RMS per one cycle. Does not need to be so precise, even integer RMS is Ok.

Some caveat:
1. In the hardware, the signal is shifted with a DC value to match the ADC positive values. For example, my ADC reads 0-3.3V, then the signal swings around 3.3/2. This DC value is pretty stable so averaging it and subtract from the reading works.

I only perused the paper, but it seems that they mentioned \"variable frequency\". It seems to me that getting 128 samples to do an RMS calculation is way more than enough. The problem is the variable frequency part. I would use my samples to estimate the zero crossing-s and then built an algorithm around the samples I have in between the zero crossings I measured.

Point of the paper is about doing the detection _fast_. 128 samples is
plenty _if_ the sampling period is aligned with the frequency of the sine.

If it isn\'t and you have _only_ 128 samples of arbitrary phase with
respect to the sine period to work with, you can\'t naively estimate the
zero crossings without error any more than you can naively calculate the
RMS and get the right answer, the true zero-crossings will fall
in-between sampling periods, the data simply doesn\'t exist so you either
need to wait for more samples (which you don\'t wanna do) or have to
interpolate as per the paper.

The OP says he doesn\'t need extreme accuracy but wants one RMS value
per cycle. The AC line voltage is noisy anyhow, and current waveforms
can be horrors, so the very concept of single-cycle accuracy is silly.
128 samples per cycle is plenty, if you can find where the cycles are.

I\'d lowpass filter the voltage waveform and run through a comparator
to a port bit. Look at that to see where the cycles are. Process all
the ADC samples, for voltage or current, in each cycle.

If he is sampling the input there is no reason to do any special filtering in the analog domain other than anti-alias filtering. The method described above using squared samples phase shifted and summed should provide a simple, effective way to make the measurement. If not that, filtering in the digital domain will be quite effective.

I think using a comparator to fire an interrupt and bring the ADC up on
the zero-cross detect works fine if you only need to check
intermittently, the ADC will come up in 10s of uS a lot shorter than the
sampling period.

But if I understand the paper correctly you can use its method on a
per-sample basis and still do a running average, reducing overhead; if
you\'re on a relatively resourced-constrained processor like an 8-bitter
having to do an interrupt every 50 or 60 seconds and then calculate the
naive average within the cycle period is going to strain its resources.
I understood that there would be an ADC running at 6 KHz. That\'s a
reasonable interrupt rate if indeed he wants to use interrupts.
Looking at the comparator port bit within the interrupt is easy.

Interrupts are way too popular. Some people think everything should
interrupt.

I do have one product with 12 isolated acquisition and control
channels, each with a dinky ARM processor, each doing its thing in an
IRQ at 200 KHz. We cranked down the CPU clock rates to save power.
Each does compute RMS and runs some filters and a PID loop.

--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard