My CA3046 100MHz wideband amplifier design

[Martin Devera]

Hi again,

when thinking about my earlier question regarding temp compensation
of wideband AMP I found Intersil's chip CA3046 with five transistors
with ft=500MHz. These are matched so that I wanted to try wideband
amp design with them. (BFM505 matched pair would be better for me
but I can't buy it here while CA3046 is readily available and cheap).

I designed input emmiter followers and differential stage using four
of them. It should assure a few mV input offset.
Single ended output is moved down in voltage using folded cascode
with external BF550 (again the best PNP I can buy here but its ft=500MHz
is ok as it is CB stage).
See http://luxik.cdi.cz/~devik/tmp/ca3046/ for schematic, bode plot
and Spice file (R7 should be 50ohm). Output is at Q4 collector.

With OPEN feedback loop 1:10 (R8:R7) it has about 23dB gain with -3db point at
about 100MHz and phase margin about 100deg. (Am I right ? Feedback gain is
-20dB so that I find phase at frequency where gain is +20dB which was 80deg
and 180-80=100).
With closed FB I get 14dB gain up to 100MHz with flatness 0.1dB. I need this
stage to drive fast ADC with 3/4pF input - when I loaded output with 10pF
I can see 0.4dB peeking at 100MHz.
Input noise is 1.8nV/rtHZ almost flat up to 100MHz (20uV integrated DC-100MHz).

The only problem I have now it temp drift. It is +-20mV Vout change for -50..100C
range when I change CA3046 temp (or 4mV if I replace R4 by current source) but
it is +-70mV when I wiggle Q4's temp. It is probably because open loop gain
is too small so that it is not enough to stabilize Q4's Vbe change which in turn
causes current change thru R5. Vbe change is 2mV/C=150mV/75C, it is 1.5mA change
in Q4's current and 300mV change at output. It seems FB was able to get it to 70mV.
Has someone idea how to make Q4 temp dependence under 15mV/75C (my LSB resolution)
without matched PNP ?
Other comments are welcome ! I'm still learning about trnsistor design.

thanks,
Martin

 

[Martin Devera]

Martin Devera wrote:

Has someone idea how to make Q4 temp dependence under 15mV/75C (my LSB
resolution)
without matched PNP ?
Other comments are welcome ! I'm still learning about trnsistor design.

To partialy answer myself, when I replace R5 by current source then I have
less than 1mV/75C
Now I only need stable current source - probably transistor with low speed
cheap opamp and bandgap reference ...

devik

 

[Jim Thompson]

On Mon, 22 Mar 2004 14:29:59 +0100, Martin Devera <devik@cdi.cz>
wrote:

Hi again,

[snip]
The only problem I have now it temp drift. It is +-20mV Vout change for -50..100C
range when I change CA3046 temp (or 4mV if I replace R4 by current source) but
it is +-70mV when I wiggle Q4's temp. It is probably because open loop gain
is too small so that it is not enough to stabilize Q4's Vbe change which in turn
causes current change thru R5. Vbe change is 2mV/C=150mV/75C, it is 1.5mA change
in Q4's current and 300mV change at output. It seems FB was able to get it to 70mV.
Has someone idea how to make Q4 temp dependence under 15mV/75C (my LSB resolution)
without matched PNP ?
Other comments are welcome ! I'm still learning about transistor design.

thanks,
Martin

Is the input DC-coupled? Or AC from a fixed DC bias? Please
elaborate.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

Throughout the history of this great country there have actually
been people of only two political persuasions: fighters and yellow-
bellies. WE MUST NOT LET THE LATTER PREVAIL IN THE NEXT ELECTION!

 

[Winfield Hill]

Martin Devera wrote...

Other comments are welcome! I'm still learning about trnsistor design.

When modeling 100MHz amplifier circuits using 500MHz parts, be
sure to include parasitic capacitance at most nodes (e.g. 2 to
5pF per node), and some parasitic inductance (50 nH/inch) in
series with the signal at low-Z nodes. And be sure to include
the effects of an output load, e.g. 30 pF/ft cable capacitance
or 50-ohm transmission-line impedance and length, etc.

Thanks,
- Win

whill_at_picovolt-dot-com

 

[Kevin Aylward]

Martin Devera wrote:

Hi again,

when thinking about my earlier question regarding temp compensation
of wideband AMP I found Intersil's chip CA3046 with five transistors
with ft=500MHz.

This is pretty dated now. At 100Mhz, the current gain is only 5. There
are lots of several GHz, cheap devices out there.

These are matched so that I wanted to try wideband
amp design with them. (BFM505 matched pair would be better for me
but I can't buy it here while CA3046 is readily available and cheap).

I designed input emmiter followers and differential stage using four
of them. It should assure a few mV input offset.
Single ended output is moved down in voltage using folded cascode
with external BF550 (again the best PNP I can buy here but its
ft=500MHz is ok as it is CB stage).
See http://luxik.cdi.cz/~devik/tmp/ca3046/ for schematic, bode plot
and Spice file (R7 should be 50ohm). Output is at Q4 collector.

With OPEN feedback loop 1:10 (R8:R7) it has about 23dB gain with -3db
point at about 100MHz and phase margin about 100deg. (Am I right ?
Feedback gain is
-20dB so that I find phase at frequency where gain is +20dB which was
80deg and 180-80=100).
With closed FB I get 14dB gain up to 100MHz with flatness 0.1dB. I
need this stage to drive fast ADC with 3/4pF input - when I loaded
output with 10pF I can see 0.4dB peeking at 100MHz.

This probably isn't the way to go. You don't have a decent push pull
drive to the ADC. Your might have problems wth non linear input
capacitance, amongst many other issues.

Input noise is 1.8nV/rtHZ almost flat up to 100MHz (20uV integrated
DC-100MHz).

The only problem I have now it temp drift. It is +-20mV Vout change
for -50..100C range when I change CA3046 temp (or 4mV if I replace R4
by current source) but it is +-70mV when I wiggle Q4's temp. It is
probably because open loop gain is too small so that it is not enough
to stabilize Q4's Vbe change which in turn causes current change thru
R5. Vbe change is 2mV/C=150mV/75C, it is 1.5mA change in Q4's current
and 300mV change at output. It seems FB was able to get it to 70mV.
Has someone idea how to make Q4 temp dependence under 15mV/75C (my
LSB resolution) without matched PNP ? Other comments are welcome !
I'm still learning about trnsistor design.

I have only has a littel skim, but...

Make the whole circuit symetrical. You only have a folded cascode on on
side.

General comment, the biasing looks way too messy. The dc output voltage
is lower that the input voltage by quite a bit. You don't have much
output headroom. I don't like the fact the *bias* current is an actual
function of the input voltage. To wit, the bias current in Q4 is set by
f(vin)/R6.

Learn to draw circuits in the accepted way. The way you have drawn the
cascode is very unclear.

Why do you want to use a Darlington connection? This makes offset worse.

There seems to be too many supplies all over the place. Overall, it just
seems wrong, but I am just having a little glance at it.

Why not use an off the self component? It will probably be cheaper and
take up way less space.


Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

"quotes with no meaning, are meaningless" - Kevin Aylward.

 

[Martin Devera]

Kevin Aylward wrote:

of wideband AMP I found Intersil's chip CA3046 with five transistors
with ft=500MHz.

This is pretty dated now. At 100Mhz, the current gain is only 5. There
are lots of several GHz, cheap devices out there.

But not here :-(( It is problem to get hand on some better devices.
The fastest things I can buy here are BFRxx (NPN, 5GHz), monolitic
CA30x6, OPAMP NE5539 and NE592.
When I need something like MAX495 or MAX4223 I can either try to
order free samples or buy high quantity. For small series developement
it is costly.
Eg. CA3046=BFR92=$0.3 one piece, while MAX4223=$5 in quantity.
So that I was interested whether I CAN do satisfactory things with
available parts.

This probably isn't the way to go. You don't have a decent push pull
drive to the ADC. Your might have problems wth non linear input
capacitance, amongst many other issues.

Good point. What kind of problems should I expect ? I'd guess that
input switch will periodicaly connect capacitor with different voltage
to my circuit. Without push-pull I'll have to charge it thru output
stage loading resistor (200ohm). 200*4p*5=4ns to settle to 1%.

Make the whole circuit symetrical. You only have a folded cascode on on
side.

Aha - but I must convert to single ended somewhere .. ? I tried to restore
oposite half of signal but it resulted in too small phase margin. Probably
I'm not so experienced yet to design it.

General comment, the biasing looks way too messy. The dc output voltage
is lower that the input voltage by quite a bit. You don't have much
output headroom. I don't like the fact the *bias* current is an actual
function of the input voltage. To wit, the bias current in Q4 is set by
f(vin)/R6.

I don't understand this part. Can you help me with it ? It is DC coupled
amplifier with input voltage about 4V+-20mV. How did you come to f(vin)/R6 ?
Input common mode voltage is expected about 4V, it is 3.3V at emmiters
and with 200ohm there we have 8mA thru Q6 collector. Q4 will have Vbe+9
at emmiter thus setting current thru R5 to approx 20mA. Hence quiscent
current via Q4 is 12mA creating 2.4V at R6...

Learn to draw circuits in the accepted way. The way you have drawn the
cascode is very unclear.

Should I simply rotate it by 90deg ?

Why do you want to use a Darlington connection? This makes offset worse.

it is emmiter follower I thought ... And I use it because CA3046 had
poor beta at 100MHz (as you said) and I needed higher input impedance.
I HAVE TO design with CA3046 as I have no better matched pair available.

There seems to be too many supplies all over the place. Overall, it just
seems wrong, but I am just having a little glance at it.

These 4V and 9V would be replaced by bypassed resistor dividers - it
was only convenient way to simulate in spice.

Why not use an off the self component? It will probably be cheaper and
take up way less space.

1) because have no such one available here except NE5539 which seems to oscilate
with capacitive load and I can't craft its signal levels to my desire
2) it is tempting to "do it myself" and learn on it
3) I have to use attenuator (modified gilbert cell) which is not available
as single (cheap) device and I already made it with CA3046 - so that I
decided to try to made whole input stage (I'm making "hobbist" scope)
discrete

I forgot - simulated circuit from the pix has also 0.08% THD at 10MHz with
20mV signal at input ..

Thanks for your response, I always learn a lot from You, Win and Jim
(and others too of course).
devik

 

[Martin Devera]

Jim Thompson wrote:

The only problem I have now it temp drift. It is +-20mV Vout change for -50..100C
range when I change CA3046 temp (or 4mV if I replace R4 by current source) but
it is +-70mV when I wiggle Q4's temp. It is probably because open loop gain
is too small so that it is not enough to stabilize Q4's Vbe change which in turn
causes current change thru R5. Vbe change is 2mV/C=150mV/75C, it is 1.5mA change
in Q4's current and 300mV change at output. It seems FB was able to get it to 70mV.
Has someone idea how to make Q4 temp dependence under 15mV/75C (my LSB resolution)
without matched PNP ?
Other comments are welcome ! I'm still learning about transistor design.

Is the input DC-coupled? Or AC from a fixed DC bias? Please
elaborate.

Hi Jim,
it is DC coupled. It should be preamplifier of ADC08060 with fixed gain 50V/V with
output full range 1V-2V p-p. It is 20mV p-p at input which is still possible to
do with moderate effort to keep noise (rms) under 1 LSB.
It can drift slowly over approx 1/2 of full output range because it is recentered
by CPU before each sweep.
I can use only unbalanced wideband NPNs like BFR92 (ft=5G), the best PNP I can get
is BF550 (ft=500M) and matched five NPNs CA3046 or 4086 (ft=500M).

thanks, devik

 

[Martin Devera]

Winfield Hill wrote:

Other comments are welcome! I'm still learning about trnsistor design.

When modeling 100MHz amplifier circuits using 500MHz parts, be
sure to include parasitic capacitance at most nodes (e.g. 2 to
5pF per node), and some parasitic inductance (50 nH/inch) in

Hello Win,

really 2pF per node !? I read that at PCB I can go well under
1pF. And yes I add parasitic caps always at least to high
impedance connections (but here I missed some - I will fix it).
I will try to implement it on very small part of PCB and avoid
long traces.
By the way did I compute it correctly that it is reactance
32 ohm per inch at 100MHz !? It is higher than I used to expect ...

series with the signal at low-Z nodes. And be sure to include
the effects of an output load, e.g. 30 pF/ft cable capacitance
or 50-ohm transmission-line impedance and length, etc.

Yes I included 10pF load.

thanks, Martin

 

[Winfield Hill]

Martin Devera wrote...

Winfield Hill wrote:

When modeling 100MHz amplifier circuits using 500MHz parts, be
sure to include parasitic capacitance at most nodes (e.g. 2 to
5pF per node), and some parasitic inductance (50 nH/inch) in

Hello Win,

really 2pF per node !? I read that at PCB I can go well under
1pF. And yes I add parasitic caps always at least to high
impedance connections (but here I missed some - I will fix it).
I will try to implement it on very small part of PCB and avoid
long traces.
By the way did I compute it correctly that it is reactance
32 ohm per inch at 100MHz !? It is higher than I used to expect ...

Those were conservative numbers for ordinary wiring. If you
have specific wiring practices, that you've verified through
measurement or some other means, then use those values (with
appropriate safety margins) in your spice evaluations.

Thanks,
- Win

whill_at_picovolt-dot-com

 

[Ian Buckner]

"Martin Devera" <devik@cdi.cz> wrote in message
news:c3nft3$b2a$1@ns.felk.cvut.cz...

Jim Thompson wrote:
The only problem I have now it temp drift. It is +-20mV Vout
change for -50..100C
range when I change CA3046 temp (or 4mV if I replace R4 by current
source) but
it is +-70mV when I wiggle Q4's temp. It is probably because open
loop gain
is too small so that it is not enough to stabilize Q4's Vbe change
which in turn
causes current change thru R5. Vbe change is 2mV/C=150mV/75C, it
is 1.5mA change
in Q4's current and 300mV change at output. It seems FB was able
to get it to 70mV.
Has someone idea how to make Q4 temp dependence under 15mV/75C (my
LSB resolution)
without matched PNP ?
Other comments are welcome ! I'm still learning about transistor
design.

Is the input DC-coupled? Or AC from a fixed DC bias? Please
elaborate.

Hi Jim,
it is DC coupled. It should be preamplifier of ADC08060 with fixed
gain 50V/V with
output full range 1V-2V p-p. It is 20mV p-p at input which is still
possible to
do with moderate effort to keep noise (rms) under 1 LSB.
It can drift slowly over approx 1/2 of full output range because it
is recentered
by CPU before each sweep.
I can use only unbalanced wideband NPNs like BFR92 (ft=5G), the best
PNP I can get
is BF550 (ft=500M) and matched five NPNs CA3046 or 4086 (ft=500M).

thanks, devik

Have you looked at the '3127? It is the same as the '3046 but Ft
around 1.2GHz.

Regards
Ian

 

[Kevin Aylward]

Martin Devera wrote:

Kevin Aylward wrote:

of wideband AMP I found Intersil's chip CA3046 with five transistors
with ft=500MHz.

This is pretty dated now. At 100Mhz, the current gain is only 5.
There are lots of several GHz, cheap devices out there.

But not here :-(( It is problem to get hand on some better devices.
The fastest things I can buy here are BFRxx (NPN, 5GHz), monolitic
CA30x6, OPAMP NE5539 and NE592.

Where are you?

When I need something like MAX495 or MAX4223 I can either try to
order free samples or buy high quantity. For small series developement
it is costly.
Eg. CA3046=BFR92=$0.3 one piece, while MAX4223=$5 in quantity.
So that I was interested whether I CAN do satisfactory things with
available parts.

This probably isn't the way to go. You don't have a decent push pull
drive to the ADC. Your might have problems wth non linear input
capacitance, amongst many other issues.

Good point. What kind of problems should I expect ? I'd guess that
input switch will periodicaly connect capacitor with different voltage
to my circuit. Without push-pull I'll have to charge it thru output
stage loading resistor (200ohm). 200*4p*5=4ns to settle to 1%.

A dynamic dc offset can occur with a non-linear capacitive load. I don't
know what your specs have to be, but to drive a fast AD you might want
to get into the < 10ohms driving impedance.

Make the whole circuit symetrical. You only have a folded cascode on
on side.

Aha - but I must convert to single ended somewhere .. ? I tried to
restore oposite half of signal but it resulted in too small phase
margin. Probably I'm not so experienced yet to design it.

Well, we all have to start somewhere.

General comment, the biasing looks way too messy. The dc output
voltage is lower that the input voltage by quite a bit. You don't
have much output headroom. I don't like the fact the *bias* current
is an actual function of the input voltage. To wit, the bias current
in Q4 is set by f(vin)/R6.

I don't understand this part. Can you help me with it ? It is DC
coupled amplifier with input voltage about 4V+-20mV. How did you come
to f(vin)/R6 ?

Should have been R4. Some of the bias currents are set by Vin. These are
(Vin -2Vbe)/R4.

In general, bias currents want to be independent of input voltage. The
gm will change if the bias currents change. If this is due to an input
signal, then one gets some multiplication, i.e. squaring, i.e
distortion.

Input common mode voltage is expected about 4V, it is
3.3V at emmiters and with 200ohm there we have 8mA thru Q6 collector.

If matched, yes.

Q4 will have Vbe+9 at emmiter thus setting current thru R5 to approx
20mA.

Yes.

Hence quiscent current via Q4 is 12mA creating 2.4V at R6...

However, if R6 was at 2.4V, then there must be (4-2.4)/500 = 3.2m, extra
current causing an additional 0.64V...then...there would be
(4-3.04)/500=1.92m, causing an additional 0.384...however...

However...The loop gain would be gm.R6.(R7/(R7+R6)/2 = ~5. This is very
low. This means that there will be an offset error voltage, this offset
voltage will unbalance the input pair currents. Q6 will take less
current, forcing the output voltage higher.

It gets a bit messy to calculate the actual offset in this circuit, so I
took an easier route

In SuperSpice, I get the output voltage at 3.74, with q4 taking 18ma,
not 12ma. The offset is around 40mv. This is pretty much indepandant of
any transister used. A simple calculation would have given somthing like
say, 2.4V/gain = 2.4/32, but at such a high offset, caculations need
more work.

I get a gain of 10.4db, with a 1db peak at around 400Mhz.

Learn to draw circuits in the accepted way. The way you have drawn
the cascode is very unclear.

Should I simply rotate it by 90deg ?

Yes.

Why do you want to use a Darlington connection? This makes offset
worse.

it is emmiter follower I thought ... And I use it because CA3046 had
poor beta at 100MHz (as you said) and I needed higher input impedance.
I HAVE TO design with CA3046 as I have no better matched pair
available.

There seems to be too many supplies all over the place. Overall, it
just seems wrong, but I am just having a little glance at it.

These 4V and 9V would be replaced by bypassed resistor dividers - it
was only convenient way to simulate in spice.

Ok, but the bias does need quite a bit of attention to eliminate PS
noise.

Why not use an off the self component? It will probably be cheaper
and take up way less space.

1) because have no such one available here except NE5539

Apparently its discontinued by Phillips.

which seems
to oscilate with capacitive load and I can't craft its signal
levels to my desire 2) it is tempting to "do it myself" and learn on
it 3) I have to use attenuator (modified gilbert cell) which is not
available as single (cheap) device and I already made it with
CA3046 - so that I decided to try to made whole input stage (I'm
making "hobbist" scope) discrete

I forgot - simulated circuit from the pix has also 0.08% THD at 10MHz
with 20mV signal at input ..

Seems reasonable, I got 0.079% 2nd with an ac input of 28.8mv (20mv
rms), and 0.04% with 20mv. I wonder if there is a scaling descrepancy
with your spice?

But what's your bias conditions, they don't seem to agree with my
simulations.

Essentially, the circuit does not have enough gain to get the offset
down. You probably need a two stage design, noting that the folded
cascode is only one voltage gain stag, despite looking like two stages.

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

"quotes with no meaning, are meaningless" - Kevin Aylward.

 

[Martin Devera]

Have you looked at the '3127? It is the same as the '3046 but Ft
around 1.2GHz.

yes but no end-user shop has it here...

 

[Martin Devera]

Kevin Aylward wrote:

But not here :-(( It is problem to get hand on some better devices.
The fastest things I can buy here are BFRxx (NPN, 5GHz), monolitic
CA30x6, OPAMP NE5539 and NE592.

Where are you?

Czech rep. There are two stores (AFAIK) for low-volume quantity
(gme.cz, ges.cz). I can buy many things I need except fast opamps
(and if I can they are VERY expensive here).

Good point. What kind of problems should I expect ? I'd guess that
input switch will periodicaly connect capacitor with different voltage
to my circuit. Without push-pull I'll have to charge it thru output
stage loading resistor (200ohm). 200*4p*5=4ns to settle to 1%.

A dynamic dc offset can occur with a non-linear capacitive load. I don't
know what your specs have to be, but to drive a fast AD you might want
to get into the < 10ohms driving impedance.

I'll try to simulate adc08060's switched input to learn more about
this one.

I don't understand this part. Can you help me with it ? It is DC
coupled amplifier with input voltage about 4V+-20mV. How did you come
to f(vin)/R6 ?

Should have been R4. Some of the bias currents are set by Vin. These are
(Vin -2Vbe)/R4.

Oh yes. I already replaced it by current source in my testbench.

However...The loop gain would be gm.R6.(R7/(R7+R6)/2 = ~5. This is very
low. This means that there will be an offset error voltage, this offset
voltage will unbalance the input pair currents. Q6 will take less
current, forcing the output voltage higher.

Hmm. I already tested to replace cascode with PNP SE stage with
BFT95 (I found on store - no DS but I suspect it is similar to BFT93)
and now I have loop gain 20.
On other side when I have too high gain I typicaly also have low
phase margin. I tried dominant pole compensation (which I just found
in AoE) but it seems these CA3046 add too much delay so that I get
linearly droping phase.

In SuperSpice, I get the output voltage at 3.74, with q4 taking 18ma,
not 12ma. The offset is around 40mv. This is pretty much indepandant of
any transister used. A simple calculation would have given somthing like
say, 2.4V/gain = 2.4/32, but at such a high offset, caculations need
more work.

how offsets between first diffpair and output stage affects total
output offset ? Can I expect that if the input pair has offset 2mV
and loop gain would be 100 that offset 100mV introduced by some
inner stage (Q4 e.g.) will be 100 times smaller at output ?

Ok, but the bias does need quite a bit of attention to eliminate PS
noise.

PS is .... power supply ?

1) because have no such one available here except NE5539

Apparently its discontinued by Phillips.

it is marked as Full production at Phillips' web. It's 1GHz GBW seems
still like nice number even today. But it has no push-pull output
stage and margin 45deg at 100MHz is probably too small to all external
stage. Also I'm not sure what will it do with capacitive load - however
it has small signal output impedance 10ohm .. maybe I'll try it finally.
I can get 50 gain by using two stages with gain 7 and with its Vos max 2mV
I get total max offset 15mV - it is 2LSB within my DAC.

I forgot - simulated circuit from the pix has also 0.08% THD at 10MHz
with 20mV signal at input ..

Seems reasonable, I got 0.079% 2nd with an ac input of 28.8mv (20mv
rms), and 0.04% with 20mv. I wonder if there is a scaling descrepancy
with your spice?

it is probably because I modified the circuit a bit between creating
jpeg schematics and last simulation ...

Essentially, the circuit does not have enough gain to get the offset
down. You probably need a two stage design, noting that the folded
cascode is only one voltage gain stag, despite looking like two stages.

Thanks for your comments, I'll try to do some fixes before disturbing
again

Martin

 

[Kevin Aylward]

Martin Devera wrote:

Kevin Aylward wrote:
But not here :-(( It is problem to get hand on some better devices.
The fastest things I can buy here are BFRxx (NPN, 5GHz), monolitic
CA30x6, OPAMP NE5539 and NE592.

Where are you?

Czech rep. There are two stores (AFAIK) for low-volume quantity
(gme.cz, ges.cz). I can buy many things I need except fast opamps
(and if I can they are VERY expensive here).

I assume you don't have a credit card, if so, you could probably get
shipped in from anywhere. You may still be able to send cash to a
reputable distributor.

I don't understand this part. Can you help me with it ? It is DC
coupled amplifier with input voltage about 4V+-20mV. How did you
come to f(vin)/R6 ?

Should have been R4. Some of the bias currents are set by Vin. These
are (Vin -2Vbe)/R4.

Oh yes. I already replaced it by current source in my testbench.

However...The loop gain would be gm.R6.(R7/(R7+R6)/2 = ~5. This is
very low. This means that there will be an offset error voltage,
this offset voltage will unbalance the input pair currents. Q6 will
take less current, forcing the output voltage higher.

Hmm. I already tested to replace cascode with PNP SE stage with
BFT95 (I found on store - no DS but I suspect it is similar to BFT93)
and now I have loop gain 20.
On other side when I have too high gain I typicaly also have low
phase margin. I tried dominant pole compensation (which I just found
in AoE) but it seems these CA3046 add too much delay so that I get
linearly droping phase.

Stability is a problem. See below for another way around this.

In SuperSpice, I get the output voltage at 3.74, with q4 taking 18ma,
not 12ma. The offset is around 40mv. This is pretty much indepandant
of any transister used. A simple calculation would have given
somthing like say, 2.4V/gain = 2.4/32, but at such a high offset,
caculations need more work.

how offsets between first diffpair and output stage affects total
output offset ? Can I expect that if the input pair has offset 2mV
and loop gain would be 100 that offset 100mV introduced by some
inner stage (Q4 e.g.) will be 100 times smaller at output ?

The offset here isn't due to imperfections in the transistors, its
imperfections in the design. The basic design has to have an offset. You
have an output voltage that is non zero. You can't have a non zero
output, with zero input, without an offset.

Ok, but the bias does need quite a bit of attention to eliminate PS
noise.

PS is .... power supply ?

Yes.

Essentially, the circuit does not have enough gain to get the offset
down. You probably need a two stage design, noting that the folded
cascode is only one voltage gain stag, despite looking like two
stages.

Thanks for your comments, I'll try to do some fixes before disturbing
again

If you use a +/- supply you should be able to get around the low loop
gain problem. You want the output to be zero, with zero differential
input. The loop gain wont matter then. However, if you do this simply
with drops in resisters, you'll have problems. You want a proper diff
circuit through out. i.e have the cascode drive a current mirror to get
a push/pull to ground.

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

"quotes with no meaning, are meaningless" - Kevin Aylward.

 

[Martin Devera]

Czech rep. There are two stores (AFAIK) for low-volume quantity
(gme.cz, ges.cz). I can buy many things I need except fast opamps
(and if I can they are VERY expensive here).

I assume you don't have a credit card, if so, you could probably get
shipped in from anywhere. You may still be able to send cash to a
reputable distributor.

I have EC/MC - I can get these ICs in a few pcs ammount from a distributor ?
Could you recomment such one and also some high GBW IC you would use
to implement amp we are talking about ? (Idealy under $3, single supply,
output swing in range 1V-2V) ?

Martin

 

[John Woodgate]

I read in sci.electronics.design that Martin Devera <devik@cdi.cz> wrote
(in <c3pkrj$1177$1@ns.felk.cvut.cz&gt about 'My CA3046 100MHz wideband
amplifier design', on Tue, 23 Mar 2004:

Czech rep. There are two stores (AFAIK) for low-volume quantity
(gme.cz, ges.cz). I can buy many things I need except fast opamps
(and if I can they are VERY expensive here).

Can you buy on-line from a European parts supplier?

Try http://www.rapidelectronics.co.uk/index.html

E-mail them to ask about export to CZ.
--
Regards, John Woodgate, OOO - Own Opinions Only.
The good news is that nothing is compulsory.
The bad news is that everything is prohibited.
http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk

 

[Martin Devera]

Czech rep. There are two stores (AFAIK) for low-volume quantity
(gme.cz, ges.cz). I can buy many things I need except fast opamps
(and if I can they are VERY expensive here).

Can you buy on-line from a European parts supplier?
Try http://www.rapidelectronics.co.uk/index.html

I looked at their catalog and can't found any RF transistors
(except 3046A array like I use) and also the fastest OZ they
have seems to be AD8011. I guess prices are in pounds ?
Martin

 

[John Woodgate]

I read in sci.electronics.design that Martin Devera <devik@cdi.cz> wrote
(in <c3qf7r$1a0k$1@ns.felk.cvut.cz&gt about 'My CA3046 100MHz wideband
amplifier design', on Tue, 23 Mar 2004:

Czech rep. There are two stores (AFAIK) for low-volume quantity
(gme.cz, ges.cz). I can buy many things I need except fast opamps
(and if I can they are VERY expensive here).

Can you buy on-line from a European parts supplier?
Try http://www.rapidelectronics.co.uk/index.html

I looked at their catalog and can't found any RF transistors
(except 3046A array like I use) and also the fastest OZ they
have seems to be AD8011. I guess prices are in pounds ?
Martin

Rapid probably have the lowest prices (yes, in pounds, probably: I don't

know whether they have a Euro catalogue or not). Farnell have a much
bigger range of devices, but some of the prices are higher. Try:

http://uk.farnell.com

It has re-direction to pages for other countries.
--
Regards, John Woodgate, OOO - Own Opinions Only.
The good news is that nothing is compulsory.
The bad news is that everything is prohibited.
http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk

 

[Ian Buckner]

"Martin Devera" <devik@cdi.cz> wrote in message
news:c3p8pd$squ$1@ns.felk.cvut.cz...

Have you looked at the '3127? It is the same as the '3046 but Ft
around 1.2GHz.

yes but no end-user shop has it here...

I had a look at the ADC08060 datasheet - someone else warned about
the effect of nonlinear input capacitance, the datasheet has details.
You need a _very_ good amplifier to drive this ADC. Nat Semi suggest
the LMH6702, which is a 3000V/usec, 720MHz GBW part, and they
run it at relatively high gain to get better phase margin (read as:
the ADC
input is _nasty_, it spits back at the driving amplifier).

You should look for what high speed op amps you can get hold of, I
doubt
if a "roll your own" amplifier will do the job.

Regards
Ian