Multiple VDD and GND in a Chip

Hi,
Why the large memory chips has multiple VDD and GND pins? I hope the
VDD and GND are connected together while connecting it ot powersuppy
(ie., common source of powersupply).
Any help in understanding this?

Thanks in advance.

Regards,
Muthu

 

[Mark Zenier]

In article <1107188935.389203.150180@f14g2000cwb.googlegroups.com>,
<muthusnv@rediffmail.com> wrote:

Hi,
Why the large memory chips has multiple VDD and GND pins? I hope the
VDD and GND are connected together while connecting it ot powersuppy
(ie., common source of powersupply).
Any help in understanding this?

Buzzword: Ground Bounce,(and a couple of other effects). There are
large variations in the current used by the chip, so any impedance in
the package connections impacts the actual voltage the chip runs on.

Also they don't have to waste chip area on power distribution.

Mark Zenier mzenier@eskimo.com Washington State resident

 

[CWatters]

<muthusnv@rediffmail.com> wrote in message
news:1107188935.389203.150180@f14g2000cwb.googlegroups.com...

Hi,
Why the large memory chips has multiple VDD and GND pins? I hope the
VDD and GND are connected together while connecting it ot powersuppy
(ie., common source of powersupply).
Any help in understanding this?

Two reasons (at least):

1) The power pins/leads may look like straight bits of wire but even they
have some stray inductance. This matters because fast logic devices draw
fast current spikes from their power supplies. Fast enough current spikes +
even small inductance = voltage spikes. Voltage spikes on supposedly DC
voltage rails = bad news. External capacitors can only help a little because
they are physically too far away from the source of the problem (eg they are
off chip).

http://www.ept.ca/docs/index.php?PageName=article&ArticleID=14672&ShowMode=long

http://www.reliabilityanalysislab.com/GroundBounce.asp

2) Some devices (like processors) draw more DC current than one pin/socket
can carry.

Point 1) is the main reason.