MODELSIM: Switch between two package libraries depending on

V

V.

Guest
I am trying to switch between a simulation library and synthesis only library depending on my environment using Modelsim's predefined pragmas.

I made two packages called intf_defn_sim and intf_defn . They have identical defines, but different values.


I was trying to do the following in order to switch between them:

use work.intf_defn
-- synthesis translate_off
_sim
-- synthesis translate_on
..all;


ModelSim compile currently fails out of this as I think it doesn't recognize the "_" in front of the keyword sim.

Is there a smarter way to do this?



The following compiles without issue, but not quite what I want.

use work
-- synthesis translate_off
..intf_defn
-- synthesis translate_on
..all;
 
On Friday, March 6, 2015 at 5:45:49 PM UTC-5, V. wrote:
I am trying to switch between a simulation library and synthesis only library depending on my environment using Modelsim's predefined pragmas.

I made two packages called intf_defn_sim and intf_defn . They have identical
defines, but different values.

snip
Is there a smarter way to do this?

- Put the two packages into separate files
- Use the same package name
- Include the file with the 'sim' package in Modelsim; include the file with the 'synthesis' package into your synthesis tool.

Kevin Jennings
 
Hello,
this is not a modelsim but a VHDL issue. I had the same problem in a
mixed-signal design as "_sig" syntax is widely used among analog
designers to reflect active low signals.
Identifiers must start with letter. Special characters and even ciphers
are not allowed. Some tools mays accept this but most will fail to
compile your code.
Regards,

Manu

On 06/03/2015 23:45, V. wrote:
I am trying to switch between a simulation library and synthesis only library depending on my environment using Modelsim's predefined pragmas.

I made two packages called intf_defn_sim and intf_defn . They have identical defines, but different values.


I was trying to do the following in order to switch between them:

use work.intf_defn
-- synthesis translate_off
_sim
-- synthesis translate_on
.all;


ModelSim compile currently fails out of this as I think it doesn't recognize the "_" in front of the keyword sim.

Is there a smarter way to do this?



The following compiles without issue, but not quite what I want.

use work
-- synthesis translate_off
.intf_defn
-- synthesis translate_on
.all;
 
VHDL 2008 includes generics for packages. Check your tool documentation to see if it is supported yet (many do because generics are used for the fixed and floating point packages).

Define a generic on your package that alters the values of the constants. You may need to initialize the constants with functions that uses the generic to select which value to return.

If that generic value is passed down from a top-level generic, then you can override the default value in the tool command line. I usually set the default to the value for synthesis, and let the simulation scripts override it.

Hope this helps,

Andy
 
On Friday, March 6, 2015 at 4:45:49 PM UTC-6, V. wrote:
I am trying to switch between a simulation library and synthesis only library depending on my environment using Modelsim's predefined pragmas.

I made two packages called intf_defn_sim and intf_defn . They have identical defines, but different values.


I was trying to do the following in order to switch between them:

use work.intf_defn
-- synthesis translate_off
_sim
-- synthesis translate_on
.all;


ModelSim compile currently fails out of this as I think it doesn't recognize the "_" in front of the keyword sim.

Is there a smarter way to do this?



The following compiles without issue, but not quite what I want.

use work
-- synthesis translate_off
.intf_defn
-- synthesis translate_on
.all;


On Friday, March 6, 2015 at 4:45:49 PM UTC-6, V. wrote:
I am trying to switch between a simulation library and synthesis only library depending on my environment using Modelsim's predefined pragmas.

I made two packages called intf_defn_sim and intf_defn . They have identical defines, but different values.


I was trying to do the following in order to switch between them:

use work.intf_defn
-- synthesis translate_off
_sim
-- synthesis translate_on
.all;


ModelSim compile currently fails out of this as I think it doesn't recognize the "_" in front of the keyword sim.

Is there a smarter way to do this?



The following compiles without issue, but not quite what I want.

use work
-- synthesis translate_off
.intf_defn
-- synthesis translate_on
.all;

Gents,

Appreciate all the great feedback. I should clarify that the main reason I'm trying to do this is because of some pretty long (and numerous) delays I've setup in my design (hundreds of milliseconds), and did not want to bog down my simulation.

I seem to have some success by redefining these delays within the modules that use them using the synthesis pragma. So the shorter delays should only take affect in simulation, and for synthesis, it will use the longer delays defined in my package file.


-- these defines override the longer delays
-- synthesis translate_off
constant DELAY : integer := 10; -- 10clk cycles instead of 10ms
constant DELAY2 : integer := 50;
...
...
constant DELAY30 : integer := 20;
-- synthesis translate_on


Is this is a viable approach?
 

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