It's Official... PSpice Schematics v10.3!

J

Jim Thompson

Guest
See....

Newsgroups: alt.binaries.schematics.electronic
Subject: PSpice Schematics v10.3 Is Official! -
PSpiceSchematicsv10p3.gif
Message-ID: <oqmhp05lgk6nhofk2rbi78o0nm54rbggsj@4ax.com>

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
In article <9dnhp01jftfko23h1q85ho3d4ubktkpsac@4ax.com>,
Jim Thompson <thegreatone@example.com> wrote:
See....

Newsgroups: alt.binaries.schematics.electronic
Click to expand...
My ISP doesn't think there is such a group and Deja doesn't archive the
binary groups. How do I view that group?

--
--
kensmith@rahul.net forging knowledge
 
In article <cnbb81$lgt$1@blue.rahul.net>, kensmith@green.rahul.net
says...

My ISP doesn't think there is such a group and Deja doesn't archive the
binary groups. How do I view that group?
Click to expand...
http://www.newzbot.com --> I remember seeing a free (read only) binaries
news server on this site' listings. Please search

--
Chaos MasterŽ, posting from Brazil.
"It's not what it seems, not what you think. No, I must be dreaming."

http://marreka.no-ip.com | http://tinyurl.com/46vru
http://renan182.no-ip.org | http://marreka.blogspot.com (in Portuguese)
 
In article <MPG.1c033666498307d7989688@News.individual.net>,
ch@os.master.INVALID.INVALID says...

http://www.newzbot.com --> I remember seeing a free (read only) binaries
news server on this site' listings. Please search
Click to expand...
OOPS! Newzbot seems to be down!
--
Chaos MasterŽ, posting from Brazil.
"It's not what it seems, not what you think. No, I must be dreaming."

http://marreka.no-ip.com | http://tinyurl.com/46vru
http://renan182.no-ip.org | http://marreka.blogspot.com (in Portuguese)
 
In article <9tiip0pnr3bgv52fj8cpnea01h7208djdi@4ax.com>,
thegreatone@example.com says...

Please don't start about simulators that I consider to be toys... this
is a documentation/how-I-earn-my-living issue.
Click to expand...
What simulators (other than PSpice) you consider that *aren't* toys?

[]s
--
Chaos MasterŽ, posting from Brazil.
"It's not what it seems, not what you think. No, I must be dreaming."

http://marreka.no-ip.com | http://tinyurl.com/46vru
http://renan182.no-ip.org | http://marreka.blogspot.com (in Portuguese)
 
On Mon, 15 Nov 2004 09:48:24 -0700, Jim Thompson
<thegreatone@example.com> wrote:

See....

Newsgroups: alt.binaries.schematics.electronic
Subject: PSpice Schematics v10.3 Is Official! -
PSpiceSchematicsv10p3.gif
Message-ID: <oqmhp05lgk6nhofk2rbi78o0nm54rbggsj@4ax.com

...Jim Thompson
Click to expand...
Did they add anything new or is it still the same?

Mark
 
In article <hfcip0tb5p8tua8e0betv3pgfop3ht3vo5@4ax.com>,
Jim Thompson <thegreatone@example.com> wrote:
On Mon, 15 Nov 2004 22:40:01 +0000 (UTC), kensmith@green.rahul.net
(Ken Smith) wrote:

In article <9dnhp01jftfko23h1q85ho3d4ubktkpsac@4ax.com>,
Jim Thompson <thegreatone@example.com> wrote:
See....

Newsgroups: alt.binaries.schematics.electronic

My ISP doesn't think there is such a group and Deja doesn't archive the
binary groups. How do I view that group?

--

Change ISPs ?:)

It was just a screen shot of v10.3 showing markers and bias indicators
still functioning.

Only a big deal if you're in to PSpice Schematics as a front-end.
Click to expand...
For sim. I use LTSpice. For product schematics, I use Orcad for DOS. For
me, Spice is mostly about checking my math.

--
--
kensmith@rahul.net forging knowledge
 
"Ken Smith" <kensmith@green.rahul.net> wrote in message
news:cnboan$vgl$1@blue.rahul.net...
For sim. I use LTSpice. For product schematics, I use Orcad for DOS. For
me, Spice is mostly about checking my math.
Click to expand...
It must take you a long time to do worst case analysis (i.e., Monte Carlo
simulation) by hand. :)
 
On Mon, 15 Nov 2004 23:54:23 -0200, Chaos Master
<ch@os.master.INVALID.INVALID> wrote:

In article <9tiip0pnr3bgv52fj8cpnea01h7208djdi@4ax.com>,
thegreatone@example.com says...

Please don't start about simulators that I consider to be toys... this
is a documentation/how-I-earn-my-living issue.

What simulators (other than PSpice) you consider that *aren't* toys?

[]s
Click to expand...
"Simulators" was a bad choice of words. The real issue is user
interface... the schematic entry... then the post processing of data
so that it's like looking at a lab scope.

Schematic entry is where most fall apart, clumsy to use. Also many
can't do an adequate job of hierarchical structures.

I can draw a schematic using PSpice Schematics about as fast as I can
with a pencil, which is why I swear by it so much... every motion is
intuitive and natural.

And it seems the more expensive they are the klutzier they get ;-)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
Jim Thompson wrote:
On Mon, 15 Nov 2004 23:54:23 -0200, Chaos Master
ch@os.master.INVALID.INVALID> wrote:

In article <9tiip0pnr3bgv52fj8cpnea01h7208djdi@4ax.com>,
thegreatone@example.com says...

Please don't start about simulators that I consider to be toys...
this is a documentation/how-I-earn-my-living issue.

What simulators (other than PSpice) you consider that *aren't* toys?

[]s

"Simulators" was a bad choice of words. The real issue is user
interface... the schematic entry... then the post processing of data
so that it's like looking at a lab scope.
Click to expand...
Oh dear...I expected more you. Why on earth do you want the output to
look like a real scope? This is the thing that makes it for the kiddies,
like the play bench electronic workshop. Secondly, PSpice doesn't do
that anyway. Its graphing is *not* a real time scope, so you seem a bit
confused in your old age.

Schematic entry is where most fall apart, clumsy to use.
Click to expand...
SuperSpice has a brilliant GUI.

Also many
can't do an adequate job of hierarchical structures.
Click to expand...
In what way?

I can draw a schematic using PSpice Schematics about as fast as I can
with a pencil, which is why I swear by it so much... every motion is
intuitive and natural.
Click to expand...
As is SS. The reality is, Schematics is a bit long in the tooth. It
misses quite a lot of features, although I agree, itd better that
anything else out there, apart from SS that is.

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
Joel,

For sim. I use LTSpice. For product schematics, I use Orcad for DOS.
For
me, Spice is mostly about checking my math.

It must take you a long time to do worst case analysis (i.e., Monte Carlo
simulation) by hand. :)
Click to expand...
There's been some discussion on how to do Monte Carlo on the LTspice
users' group, http://groups.yahoo.com/group/LTspice.

--Mike
 
Ken Smith wrote:
In article <8d-dnYBBBpESAgTcRVn-2g@comcast.com>,
Joel Kolstad <JKolstad71HatesSpam@Yahoo.Com> wrote:
"Ken Smith" <kensmith@green.rahul.net> wrote in message
news:cnboan$vgl$1@blue.rahul.net...
For sim. I use LTSpice. For product schematics, I use Orcad for
DOS. For me, Spice is mostly about checking my math.

It must take you a long time to do worst case analysis (i.e., Monte
Carlo simulation) by hand. :)

But that isn't "worst case". The real worst case is that all the
parts are at the worst extreme that the maker allows to be shipped to
the customer they like the least. ie: the parts I will actually get
in production.
Click to expand...
Yes, this is one definition of WC, the one I use, and of course, SS does
this automaticaly with a couple of button presses in the GUI.

The other definition is when components have been adjusted to give the
max/min voltages and currents, which is not the same, but you hope they
are.

It takes surprising little time to do a real worst case check on a
circuit.
Click to expand...
If its done in a simulator, indeed. Doing it by hand is essentially,
impossible. You cant even get a closed form solution for a general 1
transister circuit, let alone one with 50 or 1000 of the buggers.

In a good design there is always a safety margin so all you
have to do is prove that there is still some margin not the exact
amount it will be.
Click to expand...
Well, absolute proof is not possible. A WC may be 3 or 6 standard
deviations from the norm. There is always a probability of violations of
these limits. Not everything is tested and culled to its stated limit.

Spread sheets calculate fairly quickly even under Windoz.
Click to expand...
Ahmmm...

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
In article <DIadnTVp0_pmxQfcRVn-qA@comcast.com>,
Joel Kolstad <JKolstad71HatesSpam@Yahoo.Com> wrote:
[...]
I guess my point here is that while I'd readily admit that the average
design out there probably could obtain a higher yield with no significant
change in cost, there are also times when it's entirely reasonable to accept
a lower yield just so that you can ship the @#$%@# product and get on with
life.
Click to expand...
Where I work, if they plan on shipping 10, they buy enough for 9. Anything
less than 100% yeld is considered a problem to solve.

I've heard that the IC yields on high-end 3D graphics chips are
abyssmal -- around 10% -- yet clearly there's a demand for them and it'd be
absurd to suggest that they simply shouldn't be manufactured unless the
yield could be increased.
Click to expand...
They have the advange of having millions in the pipeline and a robot to do
the testing. People who use their chips don't have that advantage so they
want 100% of the chips shipped to be tested as good. The IC making
business is quite a diffent world from the IC using businesses.


BTW, I suspect that if you simulate any of those chips with the absolute
worst case tolerances on all the components the yield drops to 0%.
Click to expand...
This could well be true today. I bet the makers are trying hard to raise
the yeld by making the parameter spread smaller.


--
--
kensmith@rahul.net forging knowledge
 
On Tue, 16 Nov 2004 22:24:20 +0000 (UTC), kensmith@green.rahul.net
(Ken Smith) wrote:

In article <DIadnTVp0_pmxQfcRVn-qA@comcast.com>,
Joel Kolstad <JKolstad71HatesSpam@Yahoo.Com> wrote:
[snip]

I've heard that the IC yields on high-end 3D graphics chips are
abyssmal -- around 10% -- yet clearly there's a demand for them and it'd be
absurd to suggest that they simply shouldn't be manufactured unless the
yield could be increased.

They have the advange of having millions in the pipeline and a robot to do
the testing. People who use their chips don't have that advantage so they
want 100% of the chips shipped to be tested as good. The IC making
business is quite a diffent world from the IC using businesses.
Click to expand...
Yep. The real game is to test BEFORE packaging, so the throwaway cost
is minimal... just like your Cheerios, the biggest cost is in the
packaging ;-)

BTW, I suspect that if you simulate any of those chips with the absolute
worst case tolerances on all the components the yield drops to 0%.

This could well be true today. I bet the makers are trying hard to raise
the yield by making the parameter spread smaller.
Click to expand...
In the IC business we have an advantage called _ratioing_, resistors
may be 30% low, but so what, they're ALL low.

Performance in a GOOD analog circuit design depends primarily on
ratios.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
Chaos Master wrote:
In article <YTomd.24373$P7.13358@fe2.news.blueyonder.co.uk>,
salesEXTRACT@anasoft.co.uk says...

Schematic entry is where most fall apart, clumsy to use.

SuperSpice has a brilliant GUI.

I am trying SuperSpice... my only complaint is that the interface is a
bit clumsy if you're not using a high resolution.
Click to expand...
I agree that you definitely want a big monitor set to high resolution.
Up to a couple of weeks ago I was using a 17" at 1280 by 1024. I found
this very acceptable. However, I now have a 19" set to 1600 by 1200, but
he change was simply because my old monitor failed. It was only Ł100 so,
today, monitor size should not be an issue.

Since I don't like high resolutions, this is a problem.

(Otherwise, SS is a very good tool. Congratulations!)
Click to expand...
Thanks. Have you got the latest I finally got around to adding some
16/8/4 Bit AD and 16/8/4 Bit DA converters. The models are pure spice3
so they will also run in LTSpice. I use LTSpice myself as a check on
convergence so I try to make sure I have a set of analog versions of
digital models. If you do try to run the SS generated net list in
LTSpice, you have to press the pink "I" button to generate a default
include file. For reasons uknown LTSpice will simply halt if it dosnt
find an include file, when it should really just issue a warning.
LTSpice also does this with .options it dosnt understand. I have one
option that simply tells the engine to output floats instead of doubles
to reduce fie size. You only need doubles for the calculations not the
fnal output, usually.

My philosophy is that the engine should do its best to run, and only
fail if it actually has to. So if Mikes reading this, how come not
warnings instead of a fatal error?

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
Hi Jim,

What do you think of LTSpice? I know why you need the Cadence package.
But LTSpice comes with a schematic entry that offers a hierarchy
structure which you mentioned before as very important (and I agree with
that).

Regards, Joerg

http://www.analogconsultants.com
 
Hi Jim,

I think LTSpice is fine, although I have misgivings about Mikey's
twiddling of gmin, and other tricks that enhance speed but don't yield
waveform-match to what I see in PSpice Probe.

I think Mark ("qrk") recently ran a chunk of their sonar chip on
LTSpice and saw some bizarre results.
Click to expand...
Thanks, Jim. I just downloaded LTSpice, having only had exposure to
PSpice before. It does seem to allow the usual step setting so maybe
these kinds of trade-offs can be avoided. What I was surprised about is
the fairly large number of netlists it supports if you want to use the
schematic part as the point of entry on projects.

Regards, Joerg

http://www.analogconsultants.com
 
On Mon, 15 Nov 2004 22:40:01 +0000 (UTC), kensmith@green.rahul.net
(Ken Smith) wrote:

In article <9dnhp01jftfko23h1q85ho3d4ubktkpsac@4ax.com>,
Jim Thompson <thegreatone@example.com> wrote:
See....

Newsgroups: alt.binaries.schematics.electronic

My ISP doesn't think there is such a group and Deja doesn't archive the
binary groups. How do I view that group?

--
Click to expand...
Change ISPs ?:)

It was just a screen shot of v10.3 showing markers and bias indicators
still functioning.

Only a big deal if you're in to PSpice Schematics as a front-end.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
On Mon, 15 Nov 2004 18:54:01 -0800, qrk <SpamTrap@reson.com> wrote:

On Mon, 15 Nov 2004 09:48:24 -0700, Jim Thompson
thegreatone@example.com> wrote:

See....

Newsgroups: alt.binaries.schematics.electronic
Subject: PSpice Schematics v10.3 Is Official! -
PSpiceSchematicsv10p3.gif
Message-ID: <oqmhp05lgk6nhofk2rbi78o0nm54rbggsj@4ax.com

...Jim Thompson

Did they add anything new or is it still the same?

Mark
Click to expand...
Don't know yet. I was waiting for Schematics confirmation before I
laid down my bucks.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
In article <8d-dnYBBBpESAgTcRVn-2g@comcast.com>,
Joel Kolstad <JKolstad71HatesSpam@Yahoo.Com> wrote:
"Ken Smith" <kensmith@green.rahul.net> wrote in message
news:cnboan$vgl$1@blue.rahul.net...
For sim. I use LTSpice. For product schematics, I use Orcad for DOS. For
me, Spice is mostly about checking my math.

It must take you a long time to do worst case analysis (i.e., Monte Carlo
simulation) by hand. :)
Click to expand...
But that isn't "worst case". The real worst case is that all the parts
are at the worst extreme that the maker allows to be shipped to the
customer they like the least. ie: the parts I will actually get in
production.

It takes surprising little time to do a real worst case check on a
circuit. In a good design there is always a safety margin so all you have
to do is prove that there is still some margin not the exact amount it
will be.

Spread sheets calculate fairly quickly even under Windoz.

--
--
kensmith@rahul.net forging knowledge
 
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