instruction set behavioural implementation

[kliga]

I have an instruction set of 16 instructions
each instruction has its own format, first 4 bits for the op code
if opcode =0000 then add
if opcode =0001 then sub

i need to write vhdl code in xilinix (behavioral code) for this instruction set.

please i need help.

 

[rickman]

On 11/23/2015 4:54 PM, kliga wrote:

I have an instruction set of 16 instructions
each instruction has its own format, first 4 bits for the op code
if opcode =0000 then add
if opcode =0001 then sub

i need to write vhdl code in xilinix (behavioral code) for this instruction set.

please i need help.

What does your text book say? What logical units does your design have?
Do you understand what a processor is supposed to do? Do you know how
to code in VHDL?

--

Rick

 

[Nikolaos Kavvadias]

Hi kliga

if you really mean it to use a behavioral model for your processor, you will probably end-up with an ASMD/FSMD kind of design. You might consult my behavioral model for MU0 (7-/8-instruction very-simple 16-bit processor) from: https://github.com/nkkav/mu0/blob/master/rtl/vhdl/mu0_behav.vhd

You will see the concept; introducing initial contents to memory, decoding and execution of each behavior.

The entire mu0 project is here: https://github.com/nkkav/mu0/

Best regards
Nikolaos Kavvadias

Τη Δευτέρα, 23 Νοεμβρίου 2015 - 11:10:56 μ.μ. UTC+1, ο χρήστης rickman έγραψε:

On 11/23/2015 4:54 PM, kliga wrote:
I have an instruction set of 16 instructions
each instruction has its own format, first 4 bits for the op code
if opcode =0000 then add
if opcode =0001 then sub

i need to write vhdl code in xilinix (behavioral code) for this instruction set.

please i need help.

What does your text book say? What logical units does your design have?
Do you understand what a processor is supposed to do? Do you know how
to code in VHDL?

--

Rick