A
airol
Guest
hi,
i'm new to the DFT technique. hope anyone can help me. i've designed a
LFSR to test the 3 bit ALU. firstly, i'vr try to simulate the LFSR
using xilinx ise 9.2i, but no output signal is produced (only input
signal, which is reset and clock). i've read some books and articles,
tell that we need to initialize the LFSR by seeding with non-zero
value. how can we do this?
thanks in advance.
hairol
liverpool
i'm new to the DFT technique. hope anyone can help me. i've designed a
LFSR to test the 3 bit ALU. firstly, i'vr try to simulate the LFSR
using xilinx ise 9.2i, but no output signal is produced (only input
signal, which is reset and clock). i've read some books and articles,
tell that we need to initialize the LFSR by seeding with non-zero
value. how can we do this?
thanks in advance.
hairol
liverpool