How to listen to music through an FPGA pin?

J

Jean Nicolle

Guest
my manager said it couldn't be done. So just to prove him wrong :)
http://www.fpga4fun.com/PWM_DAC.html

Well, pretty simple stuff anyway.
Have fun.
Jean
 
On Tue, 26 Aug 2003 02:07:57 -0700, Jean Nicolle wrote:

my manager said it couldn't be done. So just to prove him wrong :)
http://www.fpga4fun.com/PWM_DAC.html

Well, pretty simple stuff anyway.
Have fun.
Jean
Actually I dont think that you have a PWM generator, but a phase
accumulator (The output will _toggle_ at a rate determined by your clock
and the input data)

Using a magnitude comparator for PWM generation has the nice option of
bit reversing a set of the reference count MSBs to select the number of
transitions per cycle. Low number of transitions per cycle (no bits reversed) is
best for highest accuracy - less dependence on output switching time
assymetries. Highest number of transitions (fully bit reversed reference count)
gives you a very easy to filter signal...


Peter Wallace
 
On Wed, 27 Aug 2003 08:12:56 -0700, Peter Wallace wrote:

On Tue, 26 Aug 2003 02:07:57 -0700, Jean Nicolle wrote:

my manager said it couldn't be done. So just to prove him wrong :)
http://www.fpga4fun.com/PWM_DAC.html

Well, pretty simple stuff anyway.
Have fun.
Jean

Actually I dont think that you have a PWM generator, but a phase
accumulator (The output will _toggle_ at a rate determined by your clock
and the input data)
Oops it will work, I see it now! I miseed that you were just adding the
lower 8 bits to the result

Peter Wallace
 
John Williams <jwilliams@itee.uq.edu.au> wrote in message news:<bigoij$bs8$1@bunyip.cc.uq.edu.au>...
Jean Nicolle wrote:
my manager said it couldn't be done. So just to prove him wrong :)

There is no better reason! :)

http://www.fpga4fun.com/PWM_DAC.html

Well, pretty simple stuff anyway.

Nice work Jean, it's a great thing you're doing with that site.
I agree.
But for better audio quality with little extra effort have a look at this:
http://www.xilinx.com/apps/xappsumm.htm#xapp154

Kolja Sulimma
 
Kolja Sulimma wrote:
John Williams <jwilliams@itee.uq.edu.au> wrote in message news:<bigoij$bs8$1@bunyip.cc.uq.edu.au>...
Jean Nicolle wrote:
my manager said it couldn't be done. So just to prove him wrong :)

There is no better reason! :)

http://www.fpga4fun.com/PWM_DAC.html

Well, pretty simple stuff anyway.

Nice work Jean, it's a great thing you're doing with that site.

I agree.
But for better audio quality with little extra effort have a look at this:
http://www.xilinx.com/apps/xappsumm.htm#xapp154

Kolja Sulimma
I never wrote it up in any way, but I once used a PC timer chip which
drives the internal speaker to reproduce signalling tones using PWM. I
don't remember this being part of my job, I think I was just playing
around with the idea and tested it at work since they had some sampled
sound files. A manager was walking by and recognized the sound. When
he found out that I did it without a sound card, he wanted me to add it
to their signal software package. This was in the days when DOS was
still around and not many PCs had much more than the internal beep-boop
speaker.

He never got it funded so I didn't add it to the product. But my little
test program worked suprizingly well.

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design URL http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
 
How about not just music out of an FPGA pin, but a complete shortwave receiver using just a SpartanII FPGA
and an AtoD converter? See the block diagram on my website. I'll be demo'ing it in two weeks at the
MAPLD conference, as well as discussing the design in the 6 hour tutorial seminar on DSP for FPGAs I will
be doing on the Monday of the conference. The demo is on an Insight spartanII board containing an
XC2S100. The only mods to the board are an RC filter between the FPGA pin and the speaker jack, the
speaker jack and two blue jumpers to make the ADC demo board plug onto one connector. It actually works
without a filter in front of the ADC demo board if the SNR is high enough (I was able to receive BBC from
Rhode Island with the antenna connected directly to the ADC board). Adding a tunable antenna preamp makes
it a usable for AM and SSB reception over DC to 20MHz. The ADC is external because it is sampling at
40MHz, 12 bits. The DAC for the speakers is a stereo sigma-delta DAC implemented in the FPGA.

rickman wrote:

Kolja Sulimma wrote:

John Williams <jwilliams@itee.uq.edu.au> wrote in message news:<bigoij$bs8$1@bunyip.cc.uq.edu.au>...
Jean Nicolle wrote:
my manager said it couldn't be done. So just to prove him wrong :)

There is no better reason! :)

http://www.fpga4fun.com/PWM_DAC.html

Well, pretty simple stuff anyway.

Nice work Jean, it's a great thing you're doing with that site.

I agree.
But for better audio quality with little extra effort have a look at this:
http://www.xilinx.com/apps/xappsumm.htm#xapp154

Kolja Sulimma

I never wrote it up in any way, but I once used a PC timer chip which
drives the internal speaker to reproduce signalling tones using PWM. I
don't remember this being part of my job, I think I was just playing
around with the idea and tested it at work since they had some sampled
sound files. A manager was walking by and recognized the sound. When
he found out that I did it without a sound card, he wanted me to add it
to their signal software package. This was in the days when DOS was
still around and not many PCs had much more than the internal beep-boop
speaker.

He never got it funded so I didn't add it to the product. But my little
test program worked suprizingly well.

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design URL http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759
 
"Ray Andraka" <ray@andraka.com> wrote in message
news:3F4D8155.A14C666F@andraka.com...
How about not just music out of an FPGA pin, but a complete shortwave
receiver using just a SpartanII FPGA
and an AtoD converter? See the block diagram on my website.
Sounds like fun.
Are you going to post the HDL?
 
Probably not, a fair amount of it is structural instantiation of primitives
to force the implementation and layout. As a result, it is big and may be
hard to follow. It was done as a fun project to demonstrate my company's
capability and as an example I can use in my seminars. I am still
developing much of the supporting material needed to make it available in
whole for public consumption. I may put it in the book I am working on as
an appendix, however. The book is due to the publisher 14 months from
now. I may also put the board mods and bitstream up on the web for people
who want to try it out some time in the future...definitely not this week
though, got some SBIR proposals to finish up as well as the MAPLD
conference to prepare for.

Pete Fraser wrote:

"Ray Andraka" <ray@andraka.com> wrote in message
news:3F4D8155.A14C666F@andraka.com...
How about not just music out of an FPGA pin, but a complete shortwave
receiver using just a SpartanII FPGA
and an AtoD converter? See the block diagram on my website.

Sounds like fun.
Are you going to post the HDL?
--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759
 
yes, VHLD would be nice too.
I'm still green in VHDL so I don't want to publish code that might be wrong
or ugly.
If someone translates anything, fell free to send in!
Jean

"John Williams" <jwilliams@itee.uq.edu.au> wrote in message
news:bigoij$bs8$1@bunyip.cc.uq.edu.au...
Jean Nicolle wrote:
my manager said it couldn't be done. So just to prove him wrong :)

There is no better reason! :)

http://www.fpga4fun.com/PWM_DAC.html

Well, pretty simple stuff anyway.

Nice work Jean, it's a great thing you're doing with that site.

Ever considered putting VHDL and verilog side-by-side for your examples?

Regards,

John
 
"Jean Nicolle" <j.nicolle@sbcglobal.net> wrote in message news:<xzE2b.324$wj5.10470447@newssvr13.news.prodigy.com>...
my manager said it couldn't be done. So just to prove him wrong :)
http://www.fpga4fun.com/PWM_DAC.html
It's pretty easy...

I did a programmable pattern-generator board; one of the tests we
cooked up was that it could play a .au file as PWM through any of its
output bits. The outputs were on RS422 drivers. The test jig simply
AC-coupled the outputs to a small car-stereo speaker. Not hi-fi, by
any means, but it never fails to impress and amaze!

--a
 

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