How to learn register and bus design

V

Very Very Log

Guest
Hello,

I am new to designing registers and buses in Verilog.
Can someone let me know how can I learn the same?
Any good books or tutorials on the net?

I am basically looking for clear explanations on chip-select, read-not-
write, word_size, periph_ctl, periph_stat, fful, fempty, end-of-
packet, acknowledge etc.
Also, I want details of designing with registers in (System)Verilog

Thanks
Techieeee
 
Very Very Log <tech.login.id2@gmail.com> wrote:

I am new to designing registers and buses in Verilog.
Can someone let me know how can I learn the same?
Any good books or tutorials on the net?

I am basically looking for clear explanations on chip-select,
read-not-write, word_size, periph_ctl, periph_stat, fful,
fempty, end-of-packet, acknowledge etc.
It isn't so different from doing the same without verilog.

Well, sometimes using chips within the same family, such as
a Motorola processor and associated peripheral chips, one can
mostly ignore such timing considerations and assume that they
were designed to work together.

Pretty much there are two ways: Design the system so conservative
(usually meaning slow) that you don't have to worry about such,
or carefully read the data sheet, much up all the parameters,
and verify that all is correct.

But do note that slow doesn't guarantee anything. You can still
get the setup/hold times wrong no matter now slow you go.
Usually, though, for slow systems you can arrange things so that
signals change on one clock edge and are latched on the other
clock edge. If you do that, and aren't too fast, things should
work just fine.

Start with the timing between a microprocessor and associated
ROM and RAM chips. Then move on to more complicated systems.

-- glen
 
On Jul 28, 9:49 pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote:
Very Very Log <tech.login....@gmail.com> wrote:

I am new to designing registers and buses in Verilog.
Can someone let me know how can I learn the same?
Any good books or tutorials on the net?
I am basically looking for clear explanations on chip-select,
read-not-write, word_size, periph_ctl, periph_stat, fful,
fempty, end-of-packet, acknowledge etc.

It isn't so different from doing the same without verilog.

Well, sometimes using chips within the same family, such as
a Motorola processor and associated peripheral chips, one can
mostly ignore such timing considerations and assume that they
were designed to work together.

Pretty much there are two ways:  Design the system so conservative
(usually meaning slow) that you don't have to worry about such,
or carefully read the data sheet, much up all the parameters,
and verify that all is correct.

But do note that slow doesn't guarantee anything.  You can still
get the setup/hold times wrong no matter now slow you go.
Usually, though, for slow systems you can arrange things so that
signals change on one clock edge and are latched on the other
clock edge.  If you do that, and aren't too fast, things should
work just fine.

Start with the timing between a microprocessor and associated
ROM and RAM chips.  Then move on to more complicated systems.

-- glen
I am not sure if I understand why slow-fast should matter in the
process of learning.
I only understood your last 2 lines :)
But that does not answer my question :(
Can you name a book or some nice web tutorial where I can gain mastery
of these things?
 
On Jul 28, 12:13 pm, Very Very Log <tech.login....@gmail.com> wrote:
On Jul 28, 9:49 pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote:





Very Very Log <tech.login....@gmail.com> wrote:

I am new to designing registers and buses in Verilog.
Can someone let me know how can I learn the same?
Any good books or tutorials on the net?
I am basically looking for clear explanations on chip-select,
read-not-write, word_size, periph_ctl, periph_stat, fful,
fempty, end-of-packet, acknowledge etc.

It isn't so different from doing the same without verilog.

Well, sometimes using chips within the same family, such as
a Motorola processor and associated peripheral chips, one can
mostly ignore such timing considerations and assume that they
were designed to work together.

Pretty much there are two ways:  Design the system so conservative
(usually meaning slow) that you don't have to worry about such,
or carefully read the data sheet, much up all the parameters,
and verify that all is correct.

But do note that slow doesn't guarantee anything.  You can still
get the setup/hold times wrong no matter now slow you go.
Usually, though, for slow systems you can arrange things so that
signals change on one clock edge and are latched on the other
clock edge.  If you do that, and aren't too fast, things should
work just fine.

Start with the timing between a microprocessor and associated
ROM and RAM chips.  Then move on to more complicated systems.

-- glen

I am not sure if I understand why slow-fast should matter in the
process of learning.
I only understood your last 2 lines :)
But that does not answer my question :(
Can you name a book or some nice web tutorial where I can gain mastery
of these things?
You should clarify your request for assistance. Are you looking for
assistance understanding registers, buses and digital design concepts
& primitive elements - or - are you looking for a Verilog/
SystemVerilog modeling textbook?
 
On Jul 29, 1:21 am, "WilliamG...@gmail.com" <williamg...@gmail.com>
wrote:
On Jul 28, 12:13 pm, Very Very Log <tech.login....@gmail.com> wrote:





On Jul 28, 9:49 pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote:

Very Very Log <tech.login....@gmail.com> wrote:

I am new to designing registers and buses in Verilog.
Can someone let me know how can I learn the same?
Any good books or tutorials on the net?
I am basically looking for clear explanations on chip-select,
read-not-write, word_size, periph_ctl, periph_stat, fful,
fempty, end-of-packet, acknowledge etc.

It isn't so different from doing the same without verilog.

Well, sometimes using chips within the same family, such as
a Motorola processor and associated peripheral chips, one can
mostly ignore such timing considerations and assume that they
were designed to work together.

Pretty much there are two ways:  Design the system so conservative
(usually meaning slow) that you don't have to worry about such,
or carefully read the data sheet, much up all the parameters,
and verify that all is correct.

But do note that slow doesn't guarantee anything.  You can still
get the setup/hold times wrong no matter now slow you go.
Usually, though, for slow systems you can arrange things so that
signals change on one clock edge and are latched on the other
clock edge.  If you do that, and aren't too fast, things should
work just fine.

Start with the timing between a microprocessor and associated
ROM and RAM chips.  Then move on to more complicated systems.

-- glen

I am not sure if I understand why slow-fast should matter in the
process of learning.
I only understood your last 2 lines :)
But that does not answer my question :(
Can you name a book or some nice web tutorial where I can gain mastery
of these things?

You should clarify your request for assistance.  Are you looking for
assistance understanding registers, buses and digital design concepts
& primitive elements - or - are you looking for a Verilog/
SystemVerilog modeling textbook?
I am looking primarily for assistance understanding registers, buses
and digital design concepts & primitive elements.
If some code is there in (System)Verilog, then it would be excellent!
 
On Jul 29, 7:59 am, Very Very Log <tech.login....@gmail.com> wrote:
On Jul 29, 1:21 am, "WilliamG...@gmail.com" <williamg...@gmail.com
wrote:





On Jul 28, 12:13 pm, Very Very Log <tech.login....@gmail.com> wrote:

On Jul 28, 9:49 pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote:

Very Very Log <tech.login....@gmail.com> wrote:

I am new to designing registers and buses in Verilog.
Can someone let me know how can I learn the same?
Any good books or tutorials on the net?
I am basically looking for clear explanations on chip-select,
read-not-write, word_size, periph_ctl, periph_stat, fful,
fempty, end-of-packet, acknowledge etc.

It isn't so different from doing the same without verilog.

Well, sometimes using chips within the same family, such as
a Motorola processor and associated peripheral chips, one can
mostly ignore such timing considerations and assume that they
were designed to work together.

Pretty much there are two ways:  Design the system so conservative
(usually meaning slow) that you don't have to worry about such,
or carefully read the data sheet, much up all the parameters,
and verify that all is correct.

But do note that slow doesn't guarantee anything.  You can still
get the setup/hold times wrong no matter now slow you go.
Usually, though, for slow systems you can arrange things so that
signals change on one clock edge and are latched on the other
clock edge.  If you do that, and aren't too fast, things should
work just fine.

Start with the timing between a microprocessor and associated
ROM and RAM chips.  Then move on to more complicated systems.

-- glen

I am not sure if I understand why slow-fast should matter in the
process of learning.
I only understood your last 2 lines :)
But that does not answer my question :(
Can you name a book or some nice web tutorial where I can gain mastery
of these things?

You should clarify your request for assistance.  Are you looking for
assistance understanding registers, buses and digital design concepts
& primitive elements - or - are you looking for a Verilog/
SystemVerilog modeling textbook?

I am looking primarily for assistance understanding registers, buses
and digital design concepts & primitive elements.
If some code is there in (System)Verilog, then it would be excellent!
Any replies?
 
I am looking primarily for assistance understanding registers, buses
and digital design concepts & primitive elements.
If some code is there in (System)Verilog, then it would be excellent!

Any replies?
No, because you still haven't made any effort to
indicate what you know, what you don't know and
what you need to know.

If you don't yet know anything about digital design (and
it certainly looks that way) then please stop worrying
about Verilog; you won't need that for a while. Instead,
get a good basic first-year undergraduate textbook such
as Wakerly (Principles and Practice of Digital Design),
or one of the dozens of others. Come back when you have
more specific questions.

If you do already know something about digital design,
then please help us by saying much more about what
you need to do and why you can't do it. Your question
is, I think, rather like someone who wants to know
how to build a house, and who asks "please tell me
about the design of bricks and concrete". In the
given context, the question is impossible to
answer intelligently.

Well, not quite impossible...

Register in Verilog:
reg myRegister;
always @(posedge clock)
myRegister <= inputData;

Bus in Verilog:
wire [BUS_WIDTH-1:0] myBus;

Primitive elements in Verilog:
and(out_wire, in_wire_1, in_wire_2);
xor(out_wire, in_wire_1, in_wire_2);

Never say we don't try to help.......
--
Jonathan Bromley
 
On Aug 2, 6:20 pm, Jonathan Bromley <s...@oxfordbromley.plus.com>
wrote:
I am looking primarily for assistance understanding registers, buses
and digital design concepts & primitive elements.
If some code is there in (System)Verilog, then it would be excellent!

Any replies?

No, because you still haven't made any effort to
indicate what you know, what you don't know and
what you need to know.

If you don't yet know anything about digital design (and
it certainly looks that way) then please stop worrying
about Verilog; you won't need that for a while.  Instead,
get a good basic first-year undergraduate textbook such
as Wakerly (Principles and Practice of Digital Design),
or one of the dozens of others.  Come back when you have
more specific questions.

If you do already know something about digital design,
then please help us by saying much more about what
you need to do and why you can't do it.  Your question
is, I think, rather like someone who wants to know
how to build a house, and who asks "please tell me
about the design of bricks and concrete".  In the
given context, the question is impossible to
answer intelligently.

Well, not quite impossible...

  Register in Verilog:
    reg myRegister;
    always @(posedge clock)
      myRegister <= inputData;

  Bus in Verilog:
    wire [BUS_WIDTH-1:0] myBus;

  Primitive elements in Verilog:
    and(out_wire, in_wire_1, in_wire_2);
    xor(out_wire, in_wire_1, in_wire_2);

Never say we don't try to help.......
--
Jonathan Bromley
Your answer shows your own level of knowledge on the subject Jonathan.
Even if someone wants to build a house and asks naive questions, an
expert could guide him as:
Learn about bricks
Learn about iron rods
Learn about cement
Learn about how to put them together
Learn Architecture
etc etc.

If you cannot understand my problem even after a detailed reply, then
its you who needs a course in English first.
I am sorry for being rude, but hey, you began it!

I do not need any more advice from you.
I know you will come up with some more crap which I dont have time to
read.
 
On Aug 4, 2:34 pm, Very Very Log <tech.login....@gmail.com> wrote:
On Aug 2, 6:20 pm, Jonathan Bromley <s...@oxfordbromley.plus.com
wrote:



I am looking primarily for assistance understanding registers, buses
and digital design concepts & primitive elements.
If some code is there in (System)Verilog, then it would be excellent!

Any replies?

No, because you still haven't made any effort to
indicate what you know, what you don't know and
what you need to know.

If you don't yet know anything about digital design (and
it certainly looks that way) then please stop worrying
about Verilog; you won't need that for a while.  Instead,
get a good basic first-year undergraduate textbook such
as Wakerly (Principles and Practice of Digital Design),
or one of the dozens of others.  Come back when you have
more specific questions.

If you do already know something about digital design,
then please help us by saying much more about what
you need to do and why you can't do it.  Your question
is, I think, rather like someone who wants to know
how to build a house, and who asks "please tell me
about the design of bricks and concrete".  In the
given context, the question is impossible to
answer intelligently.

Well, not quite impossible...

  Register in Verilog:
    reg myRegister;
    always @(posedge clock)
      myRegister <= inputData;

  Bus in Verilog:
    wire [BUS_WIDTH-1:0] myBus;

  Primitive elements in Verilog:
    and(out_wire, in_wire_1, in_wire_2);
    xor(out_wire, in_wire_1, in_wire_2);

Never say we don't try to help.......
--
Jonathan Bromley

Your answer shows your own level of knowledge on the subject Jonathan.
Even if someone wants to build a house and asks naive questions, an
expert could guide him as:
Learn about bricks
Learn about iron rods
Learn about cement
Learn about how to put them together
Learn Architecture
etc etc.

If you cannot understand my problem even after a detailed reply, then
its you who needs a course in English first.
I am sorry for being rude, but hey, you began it!

I do not need any more advice from you.
I know you will come up with some more crap which I dont have time to
read.
It's always nice when someone sends a thank-you note after getting
some great advice :)
 
Very Very Log <tech.login.id2@gmail.com> wrote:
(snip, someone wrote)

No, because you still haven't made any effort to
indicate what you know, what you don't know and
what you need to know.

If you don't yet know anything about digital design
(snip)

Your answer shows your own level of knowledge on the subject Jonathan.
Even if someone wants to build a house and asks naive questions, an
expert could guide him as:
(snip)

If you cannot understand my problem even after a detailed reply, then
its you who needs a course in English first.
I am sorry for being rude, but hey, you began it!
I agree with the previous post. There are plenty of
experts out there to guide you, called professors, that teach
at schools that you have to pay for.

Here you can get free advice if you ask nicely, and ask
the right questions. If you can't ask nicely, or can't
ask the right questions, then you likely won't get the
right answers.

There are plenty of books out there, but I don't happen
to know any of them. You can also go to the bookstore
of a school that teaches digital logic and find the textbooks
that they use in the classes.

-- glen
 
On Aug 4, 7:34 am, Very Very Log <tech.login....@gmail.com> wrote:
If you cannot understand my problem even after a detailed reply, then
its you who needs a course in English first.
I am sorry for being rude, but hey, you began it!

I do not need any more advice from you.
I know you will come up with some more crap which I dont have time to
read.- Hide quoted text -

- Show quoted text -
Wow, you just picked on the wrong dude...

Jonathan has patiently and generously assisted countless individuals
on this and other groups who put just a little bit of effort and
humility into what they wanted to learn. He gave you excellent advice,
and not only do you still not get it, you decide to criticize him?

But, let's take your suggestion on the different subjects you want to
know. Where should we start? You have not expressed any knowledge of
electronics to give us an indication of where you would need to begin.
Have you passed any college level courses (sleeping through them
doesn't count) in electronics, digital circuits, boolean logic,
computer architecture, or even basic electricity? Or did you just read
a neat magazine article while waiting at the tattoo parlor?

Don't bother answering me either. You've already poisoned your own
well.

Andy
 
On Aug 4, 2:24 pm, Andy <jonesa...@comcast.net> wrote:
On Aug 4, 7:34 am, Very Very Log <tech.login....@gmail.com> wrote:



If you cannot understand my problem even after a detailed reply, then
its you who needs a course in English first.
I am sorry for being rude, but hey, you began it!

I do not need any more advice from you.
I know you will come up with some more crap which I dont have time to
read.- Hide quoted text -

- Show quoted text -

Wow, you just picked on the wrong dude...

Jonathan has patiently and generously assisted countless individuals
on this and other groups who put just a little bit of effort and
humility into what they wanted to learn. He gave you excellent advice,
and not only do you still not get it, you decide to criticize him?

But, let's take your suggestion on the different subjects you want to
know. Where should we start? You have not expressed any knowledge of
electronics to give us an indication of where you would need to begin.
Have you passed any college level courses (sleeping through them
doesn't count) in electronics, digital circuits, boolean logic,
computer architecture, or even basic electricity? Or did you just read
a neat magazine article while waiting at the tattoo parlor?

Don't bother answering me either. You've already poisoned your own
well.

Andy
Well said, Andy. I was going to post something similar but decided
to wait until I cooled off a bit. Anyone who hasn't time to read
Jonathan's excellent advice, certainly has no time to read text
books and really learn how to design with Verilog or any HDL.

Regards, and Kudos to J. B.

Gabor
 
Very Very Log wrote:

If you cannot understand my problem even after a detailed reply, then
its you who needs a course in English first. I am sorry for being
rude, but hey, you began it!
Actually if we cannot understand your question(s) then it is you who
needs to rethink what and exactly how you are asking your question(s).
Remember you are asking for our help and if you make it unpleasant for
us we will just ignore you. Which after a reply like this has already
been decided by many.

I do not need any more advice from you. I know you will come up with
some more crap which I dont have time to read.
More likely something you do not understand. Specifically the subtle
humor that is often missed by ESL people engaging in an English
conversation. Since you have not learned this already here is some
advice. When conversing with others, especially in a second language,
you should always assume something was lost in translation until you
know for sure this is not the case. In a written dialog this is even
more important since the subtle clues and faster feedback of a face to
face conversation is not available.

Cary
 

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