Good design guide for oscillators

[Malcolm Reeves]

Hi,

Any good URLs on LC oscillator design? I need an oscillator where the
load varies 10:1 but the voltage doesn't (20% would be ok). And
harmonics at -60dB.

TIA

--

Malcolm

Malcolm Reeves BSc CEng MIEE MIRSE, Full Circuit Ltd, Chippenham, UK
(mreeves@fullcircuit.com, mreeves@fullcircuit.co.uk or mreeves@iee.org).
Design Service for Analogue/Digital H/W & S/W Railway Signalling and Power
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[Jim Thompson]

On Sun, 23 Jan 2005 19:19:21 +0000, Malcolm Reeves
<mreeves@fullcircuit.com> wrote:

Hi,

Any good URLs on LC oscillator design? I need an oscillator where the
load varies 10:1 but the voltage doesn't (20% would be ok). And
harmonics at -60dB.

TIA

What frequency?

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

 

[John Woodgate]

I read in sci.electronics.design that Malcolm Reeves
<mreeves@fullcircuit.com> wrote (in <bss7v091ju9l4k4t8687g020q1id8nfuqh@
4ax.com&gt about 'Good design guide for oscillators', on Sun, 23 Jan
2005:

Any good URLs on LC oscillator design? I need an oscillator where the
load varies 10:1 but the voltage doesn't (20% would be ok). And
harmonics at -60dB.

I don't have any URLs, but you solve the first one with a good buffer,
so the osc never sees the varying load, and you solve the second one
with a well-designed automatic level control (ALC) loop.

It wouldn't be a bad idea to tell us what the frequency is and whether
it has to be varied (a lot or a little).
--
Regards, John Woodgate, OOO - Own Opinions Only.
The good news is that nothing is compulsory.
The bad news is that everything is prohibited.
http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk

 

Depends on the load, but you might not need the buffer - I once did a
variant of the (Peter) Baxandal class-D oscillator where ALC loop kept
the output voltage very stable (way better than 20% - how much better I
don't know, because I couldn't measure any variation).
-------------
Bill Sloman, Nijmegen

 

[John Larkin]

On Sun, 23 Jan 2005 19:19:21 +0000, Malcolm Reeves
<mreeves@fullcircuit.com> wrote:

Hi,

Any good URLs on LC oscillator design? I need an oscillator where the
load varies 10:1 but the voltage doesn't (20% would be ok). And
harmonics at -60dB.

TIA

RF? Randy Rhea's book is good. But it sounds like you need a low Zout
buffer amp after the oscillator.

10:1 could mean tiny to small load, or it could mean medium to
crushing.

John

 

[Roger Lascelles]

"Malcolm Reeves" <mreeves@fullcircuit.com> wrote in message
news:bss7v091ju9l4k4t8687g020q1id8nfuqh@4ax.com...

Hi,

Any good URLs on LC oscillator design? I need an oscillator where the
load varies 10:1 but the voltage doesn't (20% would be ok). And
harmonics at -60dB.

TIA

Wes Hayward's book : Introduction to RF Design : discusses the issues
involved in LC oscillator design, and the principles hold at all
frequencies. It enabled me to know what to look for when tweaking
oscillators on the bench, design my own, and make sense of other oscillator
literature. Oscillator design is so un-intuitive that many engineers I
respect do not grasp the basics as set out by Hayward.

You can ALC your oscillator or its buffer amplifier to get constant output,
or depending on impedances and power levels, you can use a low output
impedance or negative feedback or swamping resistance.

These days, straight LC oscillators are not terribly popular - mostly they
are built into PLLs, or replaced by DDS.

Roger

 

[Andrew Holme]

Malcolm Reeves wrote:

The LC output stage is adjustable so there is an advantage to have
just one adjustment. Drift should be less than 1% and 1% (or more)
would be ok. CPU frequency would 125kHz at the nearest. But I could
use external resonator. However CPU only has clock out so I'd need
to
divide it otherwise CPU has no time for anything else. Internal
timer
just generates an interrupt and running that at 240kHz is just not on
What CPU is it?

 

[Fred Bloggs]

John Larkin wrote:

On Sun, 23 Jan 2005 19:19:21 +0000, Malcolm Reeves
mreeves@fullcircuit.com> wrote:


Hi,

Any good URLs on LC oscillator design? I need an oscillator where the
load varies 10:1 but the voltage doesn't (20% would be ok). And
harmonics at -60dB.

TIA



RF? Randy Rhea's book is good. But it sounds like you need a low Zout
buffer amp after the oscillator.

Yeah! Randy Rhea wrote the book on oscillators...