generalized agregate

Hi,
I`m kind of new on FPGA design world so forgive my mistakes. I didn't even knew how to search this problem, so maybe the title is also wrong.

I have an array / vector and I want to generate a new array by processing the first. A simple example of what I need is that every i-th element from the new array is the sum of the i-1, i, and i+1 elements from the first one.
I know this can be done very easily in a sequential manner by iterating through the array. I was wandering if there any kind of assigning expression that would generalize this and make this a parallel operation.(like in math: new := old[i - 1] + old + old[i + 1], where i ∈ (1, n) ).

any ideas?
thanks!

 

[rickman]

On 7/29/2016 1:44 PM, virgilx13@gmail.com wrote:

Hi, I`m kind of new on FPGA design world so forgive my mistakes. I
didn't even knew how to search this problem, so maybe the title is
also wrong.

I have an array / vector and I want to generate a new array by
processing the first. A simple example of what I need is that every
i-th element from the new array is the sum of the i-1, i, and i+1
elements from the first one. I know this can be done very easily in a
sequential manner by iterating through the array. I was wandering if
there any kind of assigning expression that would generalize this and
make this a parallel operation.(like in math: new := old[i - 1] +
old + old[i + 1], where i ∈ (1, n) ).

Yes, that is not hard, but what do you want to do with the end elements?
Is your vector large enough to have inputs for i-1 when i is 1 and i+1
when i is n?

New(1 to N) <= Old(0 to N-1) + Old(1 to N) + Old(2 to N+1);

But you will need to define the operator '+' for the vector data type
you are using. Easy enough, no? I'm pressed for time, but in a
nutshell, the definition of '+' will contain the iterative loop you
would otherwise put directly in your current code. lol

--

Rick C