eye diagram...

J

John Larkin

Guest
Here\'s our little fiberoptic transceiver box in optical loopback mode.

https://www.dropbox.com/s/j7r1eyalxfd6t68/K420_1200_Gbps_Eye.jpg?raw=1

The upper trace is the 1.2 GHz clock and the lower ones are the
receiver differential outputs, at infinite persistance for about an
hour. The TX data is a 127-bit pseudorandom digital data stream, from
the back of the SRS box.

This is a telecom trick to look for ISI, inter-symbol interferance,
and noise. The \"eyes\" should be wide open. This board suffers from FR4
losses and a tiny bit of design stupidity, so the next rev should be
faster and cleaner.
 
On Wed, 21 Oct 2020 15:33:24 -0700, John Larkin
<jlarkin@highland_atwork_technology.com> wrote:

Here\'s our little fiberoptic transceiver box in optical loopback mode.

https://www.dropbox.com/s/j7r1eyalxfd6t68/K420_1200_Gbps_Eye.jpg?raw=1

The upper trace is the 1.2 GHz clock and the lower ones are the
receiver differential outputs, at infinite persistance for about an
hour. The TX data is a 127-bit pseudorandom digital data stream, from
the back of the SRS box.

This is a telecom trick to look for ISI, inter-symbol interferance,
and noise. The \"eyes\" should be wide open. This board suffers from FR4
losses and a tiny bit of design stupidity, so the next rev should be
faster and cleaner.

Are you thinking that this is not good enough ?

I would think it is OK for where the clock edge-middle is.

Or maybe my eye isn\'t good enough for these eye diagrams.
 
Am 22.10.20 um 00:33 schrieb John Larkin:
Here\'s our little fiberoptic transceiver box in optical loopback mode.

https://www.dropbox.com/s/j7r1eyalxfd6t68/K420_1200_Gbps_Eye.jpg?raw=1

The upper trace is the 1.2 GHz clock and the lower ones are the
receiver differential outputs, at infinite persistance for about an
hour. The TX data is a 127-bit pseudorandom digital data stream, from
the back of the SRS box.

This is a telecom trick to look for ISI, inter-symbol interferance,
and noise. The \"eyes\" should be wide open. This board suffers from FR4
losses and a tiny bit of design stupidity, so the next rev should be
faster and cleaner.

Anritsu MP1652A, maybe 20 years old or more:

<
https://www.flickr.com/photos/137684711@N07/50516258702/in/album-72157662535945536/
>

20 bit polynomial, 1 hour.
Still quite OK.

BTW there were eye opener chips when I last looked into this.

cheers, Gerhard
 
On Thu, 22 Oct 2020 01:46:51 -0700, boB <boB@K7IQ.com> wrote:

On Wed, 21 Oct 2020 15:33:24 -0700, John Larkin
jlarkin@highland_atwork_technology.com> wrote:


Here\'s our little fiberoptic transceiver box in optical loopback mode.

https://www.dropbox.com/s/j7r1eyalxfd6t68/K420_1200_Gbps_Eye.jpg?raw=1

The upper trace is the 1.2 GHz clock and the lower ones are the
receiver differential outputs, at infinite persistance for about an
hour. The TX data is a 127-bit pseudorandom digital data stream, from
the back of the SRS box.

This is a telecom trick to look for ISI, inter-symbol interferance,
and noise. The \"eyes\" should be wide open. This board suffers from FR4
losses and a tiny bit of design stupidity, so the next rev should be
faster and cleaner.


Are you thinking that this is not good enough ?

I would think it is OK for where the clock edge-middle is.

Or maybe my eye isn\'t good enough for these eye diagrams.

My first (and so far only) customer will run at that rate, 1.2 Gbps,
so he\'s OK. But I\'m using a 10G SFP module, and my board is clearly
limiting the data rate. Since I have a bug in the LED signal detectors
(fixed by a kluge) I may as well spin the board and try to speed it
up, for other possible users.

That SRS clock generator only goes to 2 GHz, and the PRBS option
breaks before that. So I need a faster data source.

I bought a couple of cheap RF signal generators from Amazon, and maybe
I\'ll make a little discriminator/fanout board to make nice
differential logic signals and a pseudorandom sequence.

This should arrive tomorrow:


https://www.amazon.com/gp/product/B016040R5M/ref=ppx_yo_dt_b_asin_title_o00_s00?ie=UTF8&psc=1

That will be interesting. A 2^7-1 sequence, which is commmon, takes 7
flipflops and one XOR gate, at about $20 each for NB7 series logic. I
could get to 6 GHz, 12 GBPS, except for the XOR prop delay. Maybe
there\'s a hack for that somehow. Pipeline the XOR feeedback? The mind
boggles.

An FPGA could do serdes at 5 or 10 GBPS or even more, but that would
be a bigger project than slapping a few flops on a board.



--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard
 
On Thu, 22 Oct 2020 13:12:59 +0200, Gerhard Hoffmann <dk4xp@arcor.de>
wrote:

Am 22.10.20 um 00:33 schrieb John Larkin:

Here\'s our little fiberoptic transceiver box in optical loopback mode.

https://www.dropbox.com/s/j7r1eyalxfd6t68/K420_1200_Gbps_Eye.jpg?raw=1

The upper trace is the 1.2 GHz clock and the lower ones are the
receiver differential outputs, at infinite persistance for about an
hour. The TX data is a 127-bit pseudorandom digital data stream, from
the back of the SRS box.

This is a telecom trick to look for ISI, inter-symbol interferance,
and noise. The \"eyes\" should be wide open. This board suffers from FR4
losses and a tiny bit of design stupidity, so the next rev should be
faster and cleaner.


Anritsu MP1652A, maybe 20 years old or more:


https://www.flickr.com/photos/137684711@N07/50516258702/in/album-72157662535945536/


20 bit polynomial, 1 hour.

20 bits is a million. That won\'t last long at 1 GHz.

2^7-1 is common in telecom. Seems plenty long enough. Telecom uses
8B10B coding or something so deliberately has no long runs. Even 2^4-1
would be OK, I think.

True random noise would be interesting for testing too.


Still quite OK.

BTW there were eye opener chips when I last looked into this.

cheers, Gerhard

Anritsu made some nice fast stuff. Your snap looks like a 1 GHz clock,
but the edges are nice and clean.

I don\'t have $80K or the bench space for a serious telecom generator.
If I do hack a little fanout/PRBS box, maybe we could sell it.

I think Tek acquired PSPL for their telecom data generators. It sure
wasn\'t for the bias tees.



--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard
 
Am 22.10.20 um 18:08 schrieb jlarkin@highlandsniptechnology.com:
On Thu, 22 Oct 2020 13:12:59 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Anritsu MP1652A, maybe 20 years old or more:


https://www.flickr.com/photos/137684711@N07/50516258702/in/album-72157662535945536/


20 bit polynomial, 1 hour.


20 bits is a million. That won\'t last long at 1 GHz.

2^7-1 is common in telecom. Seems plenty long enough. Telecom uses
8B10B coding or something so deliberately has no long runs. Even 2^4-1
would be OK, I think.

True random noise would be interesting for testing too.

One should not underestimate the possible run lengths.
We had a recurring bit error with overnight runs when developping
our 10 GHz XFP transceivers. That caused a month-long delay, and each
test result and changes had to be communicated to the customer,
aarrghh..

I had the order to make sure that even the CEO would not take his cell
phone into the lab. Me, an external freelancer. Not even inside the
pecking order. And it happened. :)

It turned out that someone had decided that 10n coupling capacitors
were enough at 10 GBit/s because they visually fitted smoother
into the 50 Ohm microstrip, from 100n before.

No, they were too small. Abt. 1 bit error per day.

The mother company decided later that fiber optics was not a
core competence for a semiconductor maker and sold the farm
to someone in San Jose. I was there some weeks for tech transfer,
which was kinda interesting.
In retrospect, the mother company was wrong, but then it\'s an uphill
battle when you are a latecomer to the field.


I think Tek acquired PSPL for their telecom data generators. It sure
wasn\'t for the bias tees.

Their pulse generators, and the opportunity to remove some
sampling scope comparisons from the web site, <evil grin>

cheers, Gerhard
 
torsdag den 22. oktober 2020 kl. 18.08.54 UTC+2 skrev jla...@highlandsniptechnology.com:
On Thu, 22 Oct 2020 13:12:59 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Am 22.10.20 um 00:33 schrieb John Larkin:

Here\'s our little fiberoptic transceiver box in optical loopback mode.

https://www.dropbox.com/s/j7r1eyalxfd6t68/K420_1200_Gbps_Eye.jpg?raw=1

The upper trace is the 1.2 GHz clock and the lower ones are the
receiver differential outputs, at infinite persistance for about an
hour. The TX data is a 127-bit pseudorandom digital data stream, from
the back of the SRS box.

This is a telecom trick to look for ISI, inter-symbol interferance,
and noise. The \"eyes\" should be wide open. This board suffers from FR4
losses and a tiny bit of design stupidity, so the next rev should be
faster and cleaner.


Anritsu MP1652A, maybe 20 years old or more:


https://www.flickr.com/photos/137684711@N07/50516258702/in/album-72157662535945536/


20 bit polynomial, 1 hour.


20 bits is a million. That won\'t last long at 1 GHz.

2^7-1 is common in telecom. Seems plenty long enough. Telecom uses
8B10B coding or something so deliberately has no long runs. Even 2^4-1
would be OK, I think.

True random noise would be interesting for testing too.


Still quite OK.

BTW there were eye opener chips when I last looked into this.

cheers, Gerhard

Anritsu made some nice fast stuff. Your snap looks like a 1 GHz clock,
but the edges are nice and clean.

I don\'t have $80K or the bench space for a serious telecom generator.
If I do hack a little fanout/PRBS box, maybe we could sell it.

I think Tek acquired PSPL for their telecom data generators. It sure
wasn\'t for the bias tees.

https://www.analog.com/en/products/adn2905.html

it has a prbs generator mode, PRBS7, PRBS15, PRBS31

ADI list it as not recommended for new designs but Digikey has 50 in stock for ~$20/pcs
 
On 2020-10-22 12:08, jlarkin@highlandsniptechnology.com wrote:
On Thu, 22 Oct 2020 13:12:59 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Am 22.10.20 um 00:33 schrieb John Larkin:

Here\'s our little fiberoptic transceiver box in optical loopback mode.

https://www.dropbox.com/s/j7r1eyalxfd6t68/K420_1200_Gbps_Eye.jpg?raw=1

The upper trace is the 1.2 GHz clock and the lower ones are the
receiver differential outputs, at infinite persistance for about an
hour. The TX data is a 127-bit pseudorandom digital data stream, from
the back of the SRS box.

This is a telecom trick to look for ISI, inter-symbol interferance,
and noise. The \"eyes\" should be wide open. This board suffers from FR4
losses and a tiny bit of design stupidity, so the next rev should be
faster and cleaner.


Anritsu MP1652A, maybe 20 years old or more:


https://www.flickr.com/photos/137684711@N07/50516258702/in/album-72157662535945536/


20 bit polynomial, 1 hour.


20 bits is a million. That won\'t last long at 1 GHz.

2^7-1 is common in telecom. Seems plenty long enough. Telecom uses
8B10B coding or something so deliberately has no long runs. Even 2^4-1
would be OK, I think.

True random noise would be interesting for testing too.


Still quite OK.

BTW there were eye opener chips when I last looked into this.

cheers, Gerhard

Anritsu made some nice fast stuff. Your snap looks like a 1 GHz clock,
but the edges are nice and clean.

I don\'t have $80K or the bench space for a serious telecom generator.
If I do hack a little fanout/PRBS box, maybe we could sell it.

I think Tek acquired PSPL for their telecom data generators. It sure
wasn\'t for the bias tees.

Hmm, interesting. I thought LeCroy had bought PSPL for their 100 GHz
samplers, but apparently not.

BTW web.archive.org has a lot of good old PSPL app notes.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com
 

Welcome to EDABoard.com

Sponsor

Back
Top