Chdl 8 bit counter

Design an 8-bit up counter with reset feature. Two different count speed be defined. One of the count speeds should be 1 bit at 1 sec, while other one should be set 4 bit increment in 1 sec.
Ä° cant do this hw tell me something please

 

[Rick C]

On Tuesday, August 20, 2019 at 8:45:46 AM UTC-4, kadir...@gmail.com wrote:

Design an 8-bit up counter with reset feature. Two different count speed be defined. One of the count speeds should be 1 bit at 1 sec, while other one should be set 4 bit increment in 1 sec.
Ä° cant do this hw tell me something please

What DO you know? Let's start there. Do you know VHDL? Do you know how to code a FF? How about a simple counter?

Give us something to work with.

Also, I don't completely understand the spec. What does it mean to increment "4 bit"? Does that mean to increment by 4, or to increment the fourth bit, i.e. by 16? Is the clock 1 Hz?

--

Rick C.

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