S
Sai Jaswanth
Guest
hi friends can any one help me in knowing how to convert the c-code to VHDL directly by any software. (or) can we compile C-code in xilinx IDE?
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H
hssig
Guest
In Vivado you can (HLS)
H
HT-Lab
Guest
On 04/03/2015 08:38, Sai Jaswanth wrote:
Check out Hercules:
http://www.nkavvadias.com/hercules/
You could also try Xilinx HLS,
Good luck,
Hans
www.ht-lab.com
hi friends can any one help me in knowing how to convert the c-code to VHDL directly by any software. (or) can we compile C-code in xilinx IDE?
Hi Sai,
Check out Hercules:
http://www.nkavvadias.com/hercules/
You could also try Xilinx HLS,
Good luck,
Hans
www.ht-lab.com
Guest
On Wednesday, March 4, 2015 at 3:38:38 AM UTC-5, Sai Jaswanth wrote:
> hi friends can any one help me in knowing how to convert the c-code to VHDL directly by any software. (or) can we compile C-code in xilinx IDE?
Want to learn more in engineering? If you are interested in learning
VHDL programming and FPGA development take my course today! This coupon
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> hi friends can any one help me in knowing how to convert the c-code to VHDL directly by any software. (or) can we compile C-code in xilinx IDE?
Want to learn more in engineering? If you are interested in learning
VHDL programming and FPGA development take my course today! This coupon
is good till April 6th, 2015 for $60 - 40% off the cost of the class at
regular price! Join now!
https://www.udemy.com/vhdl-and-fpga-development-for-beginners-and-intermediates/?couponCode=March60#/
D
Derek Simmons
Guest
On Wednesday, March 4, 2015 at 3:38:38 AM UTC-5, Sai Jaswanth wrote:
> hi friends can any one help me in knowing how to convert the c-code to VHDL directly by any software. (or) can we compile C-code in xilinx IDE?
I tried out Impulse C it had its pluses and minuses.
Pluses:
In an image processing environment the FPGA engineers created that was shared between the FPGA engineers and the imaging scientist. The imaging scientist didn't understand what we did but worked within the framework we created for them. They would develop their algorithms is Visual Studio and demo applications. We would make sure the projects would translate from C to VHDL..
Minuses:
You were limited to do things that would translate 'nicely' to VHDL and using constructs that would convert to VHDL.
My advice is get a copy of Pong Chu's, "RTL Hardware Design Using VHDL" and read chapters 11 and 12 on Register Transfer Methodology. We had a plain text license and under the hood this is kind of what the C to VHDL compiler was doing.
What we decided to do was create a design standard and write it by hand because it was easier for us to support. You can't beat a good VHDL designer.
> hi friends can any one help me in knowing how to convert the c-code to VHDL directly by any software. (or) can we compile C-code in xilinx IDE?
I tried out Impulse C it had its pluses and minuses.
Pluses:
In an image processing environment the FPGA engineers created that was shared between the FPGA engineers and the imaging scientist. The imaging scientist didn't understand what we did but worked within the framework we created for them. They would develop their algorithms is Visual Studio and demo applications. We would make sure the projects would translate from C to VHDL..
Minuses:
You were limited to do things that would translate 'nicely' to VHDL and using constructs that would convert to VHDL.
My advice is get a copy of Pong Chu's, "RTL Hardware Design Using VHDL" and read chapters 11 and 12 on Register Transfer Methodology. We had a plain text license and under the hood this is kind of what the C to VHDL compiler was doing.
What we decided to do was create a design standard and write it by hand because it was easier for us to support. You can't beat a good VHDL designer.
Guest
On Wednesday, March 4, 2015 at 10:38:38 AM UTC+2, Sai Jaswanth wrote:
> hi friends can any one help me in knowing how to convert the c-code to VHDL directly by any software. (or) can we compile C-code in xilinx IDE?
Have you considered systemc flow. Systemc is a synthesis-able sub-class of C++. It can be used for cycle accurate simulation and there are commercial synthesis tools. Systemc is also used to create pre-RTL model for simulation (loosely-timed or approximate timed) models.
If your design is purely C++ you can use the free OSCI simulator. Its installation is simple (on debian):
http://bknpk.ddns.net/my_web/SystemC_MyFirst/sysc2_3_0Nscv_install.html
It comes with SCV, which allows to write nice constraints:
http://bknpk.ddns.net/my_web/SystemC_MyFirst/scv_cmp_err_pop_constraint.html
> hi friends can any one help me in knowing how to convert the c-code to VHDL directly by any software. (or) can we compile C-code in xilinx IDE?
Have you considered systemc flow. Systemc is a synthesis-able sub-class of C++. It can be used for cycle accurate simulation and there are commercial synthesis tools. Systemc is also used to create pre-RTL model for simulation (loosely-timed or approximate timed) models.
If your design is purely C++ you can use the free OSCI simulator. Its installation is simple (on debian):
http://bknpk.ddns.net/my_web/SystemC_MyFirst/sysc2_3_0Nscv_install.html
It comes with SCV, which allows to write nice constraints:
http://bknpk.ddns.net/my_web/SystemC_MyFirst/scv_cmp_err_pop_constraint.html