Lasse Langwadt Christensen
lÃ¸rdag den 21. november 2020 kl. 22.48.03 UTC+1 skrev jla...@highlandsniptechnology.com:
my keyboard must be broken, it should have said \"does not have to be mile wide\"On Sat, 21 Nov 2020 13:11:36 -0800 (PST), Lasse Langwadt Christensen
lÃ¸rdag den 21. november 2020 kl. 17.05.34 UTC+1 skrev jla...@highlandsniptechnology.com:
On Sat, 21 Nov 2020 07:05:11 -0500, Phil Hobbs
On 11/21/20 12:39 AM, jla...@highlandsniptechnology.com wrote:
On Fri, 20 Nov 2020 22:35:52 -0500, Phil Hobbs
On 11/19/20 10:44 AM, jla...@highlandsniptechnology.com wrote:
On Thu, 19 Nov 2020 10:30:17 -0500, Phil Hobbs
On 11/19/20 8:22 AM, George Herold wrote:
On Wednesday, November 18, 2020 at 2:27:39 PM UTC-5, Phil
So I have this SiPM/MPPC front end. It has pop options to
use either an On Semi MicroFC-10010 1-mm SiPM chip or a
packaged Hamamatsu S13362-3050DG 3-mm MPPC with integral
TE cooler, both bootstrapped by a SAV-551+ running at 20
mA. So far, it all works.
(The SAV-551+ is amazingly stable--I\'ve got a shipping
product that runs a very similar bootstrap across a 2-inch
FFC cable. Bandwidth suffers a bit, but it shows no
tendency to oscillate.)
The mystery is in the TIA stage. It\'s a vanilla op amp TIA
made from either an ADA4899 (600 MHz, 300 V/us) or AD8045
(1 GHz, 1300 V/us @ Av=1), which are pin compatible in the
3-mm LFCSP package. Both are voltage feedback amps.
I\'m seeing a 3 dB bandwidth of 220 MHz, together with a
faster rolloff than I expect: -3 dB @ 220 MHz, -9 dB @ 320
MHz. It\'s not slew limiting, because the waveform looks
pretty good on a 3-GHz scope (TDS 694C) and the rolloff
stays the same when I drop the input by 6 dB.
The layout is pretty tight (the whole board is only an
inch square), so getting enough stray capacitance across
R_F to account for it is implausible--it would need about
1.4 pF. DecouplingBypassing is good--
For test, I removed the 0-ohm jumper that connects the
bootstrapped SiPM to the summing junction, and added a 1k
input resistor, forming an inverting amp with a nominal
gain of -0.5.
That\'s connected to the terminated end of an RG-174/U
cable going to a PTS-500 synthesizer. The output goes via
a 10-ohm resistor into a properly-terminated 50-ohm cable
(the TDS 694C is 50-ohm only).
Here I\'m expecting a bandwidth somewhere between the
datasheet\'s 1 GHz @ Av=1 and 400 MHz @ Av=-1, but it\'s way
off. There\'s no visible change when I put the jumper back
in, on account of the swoopy bootstrap.
I was going to suggest looking at the \'speed\' of the light
source. But the above seems to point to something \'in\' the
amp stage... (Is that right?) (And maybe check the light
source rise time anyway?)
So where do you suppose the missing factor of ~3 in
This has the SiPM and bootstrap disconnected (0 ohm jumper
removed) and a 1/20W leaded 1k resistor bodged in to make an
inverting amp with a gain of -0.5.
I\'m looking at the trace capacitance to figure out if that
might be it. There\'s about 3/4 inch of 10-mil trace on the
summing junction, but that ought to produce a high frequency
peak if anything. hard to find 1.4 pF across the feedback
resistor. Once I\'m back in the lab I\'ll measure a bare board
with a Boonton and see.
What\'s the board stackup? Not the specified one, but the real
one. I\'ve been burned by what some of the fast-turn proto houses
The SJ capacitance is 2.4 pF, as measured on a Boonton, about
twice what I expected. That seems to be the issue--in simulation
it produces a pretty big gain peak, which reduces the bandwidth.
Time to Dremel the ground plane.
How many layers?
Only four, but of course ground is L2 and there\'s an L3 ground pour in
that area. It is PCBway, so maybe they did the same thing to me. (A
generally very good outfit in many ways, especially price and delivery.)
Several of the chinese quick-turn houses make 4-layer boards with very
thin (like 4 mil) outer dielectrics. Maybe they roll process the
outers and glue them to a core or something.
I believe the common process for 4 layers is first a core with the inner
layers and then sandwiched with pre-peg and copper to make the outer layers
thin outer dielectrics means traces to things like DDR ram does have to be mile wide
yep things DDR3 is supposed to be something like 40-50RThin, actually?
A 50 ohm microstrip on 4 mils thick FR4 dielectric is 6 mils wide. A
75 ohm trace would be 2 mils wide.