Welcome Notice

Register Log in

Active HDL...

R

Rick C

Guest
I don\'t recall having much difficulty when using the Aldec Active-HDL simulator before. This time I\'m having trouble figuring out the controls.

I can\'t find a control to stop the simulation if it is into a long run and early on I see a something I want to investigate. The only controls that seem to stop the simulation kill the waveform data. What\'s worse is the \"End simulation\" control also loses track of the top of Top-Level module so it has to be reset to run again. The help file isn\'t much good at searching for info on this.

I\'ve tried to figure out how to get the tool to save all the signals data so I don\'t have to rerun the simulation every time I think of a new signal I want to see. Again, the manual isn\'t much help because it points me to a setting to allow all signals to be saved, but that control is grayed out and I can\'t find anything explaining why. Even a Google search doesn\'t find anything.

What is just as bad or worse is that the durn tools make copies of your source files rather than working with the ones you create and presumably edit. So for now I\'m copying the files over to the project directory with each edit.

I seem to recall being fairly effective using this tool in the past. Has the tool changed that much or have I?

--

Rick C.

- Get 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209
 
M

Michael Kellett

Guest
On 09/09/2020 04:59, Rick C wrote:
I don\'t recall having much difficulty when using the Aldec Active-HDL simulator before. This time I\'m having trouble figuring out the controls.

I can\'t find a control to stop the simulation if it is into a long run and early on I see a something I want to investigate. The only controls that seem to stop the simulation kill the waveform data. What\'s worse is the \"End simulation\" control also loses track of the top of Top-Level module so it has to be reset to run again. The help file isn\'t much good at searching for info on this.

I\'ve tried to figure out how to get the tool to save all the signals data so I don\'t have to rerun the simulation every time I think of a new signal I want to see. Again, the manual isn\'t much help because it points me to a setting to allow all signals to be saved, but that control is grayed out and I can\'t find anything explaining why. Even a Google search doesn\'t find anything.

What is just as bad or worse is that the durn tools make copies of your source files rather than working with the ones you create and presumably edit. So for now I\'m copying the files over to the project directory with each edit.

I seem to recall being fairly effective using this tool in the past. Has the tool changed that much or have I?

Are you using a paid for version of the free one from Lattice ?
I\'m away from home and office this week (on hols) but I\'ll take a look
when I get back.

I usually design in Aldec and the FPGA tools are pointed at the source
files it generates - so I don\'t get you copy problem.

I think I usually run the simulation from start again if I add signals.

I pay them a fortune for maintenance and support so I can ask the
questions !

MK
 
R

Rick C

Guest
On Wednesday, September 9, 2020 at 10:38:49 AM UTC-4, Michael Kellett wrote:
On 09/09/2020 04:59, Rick C wrote:
I don\'t recall having much difficulty when using the Aldec Active-HDL simulator before. This time I\'m having trouble figuring out the controls.

I can\'t find a control to stop the simulation if it is into a long run and early on I see a something I want to investigate. The only controls that seem to stop the simulation kill the waveform data. What\'s worse is the \"End simulation\" control also loses track of the top of Top-Level module so it has to be reset to run again. The help file isn\'t much good at searching for info on this.

I\'ve tried to figure out how to get the tool to save all the signals data so I don\'t have to rerun the simulation every time I think of a new signal I want to see. Again, the manual isn\'t much help because it points me to a setting to allow all signals to be saved, but that control is grayed out and I can\'t find anything explaining why. Even a Google search doesn\'t find anything.

What is just as bad or worse is that the durn tools make copies of your source files rather than working with the ones you create and presumably edit. So for now I\'m copying the files over to the project directory with each edit.

I seem to recall being fairly effective using this tool in the past. Has the tool changed that much or have I?

Are you using a paid for version of the free one from Lattice ?

I\'m away from home and office this week (on hols) but I\'ll take a look
when I get back.

I usually design in Aldec and the FPGA tools are pointed at the source
files it generates - so I don\'t get you copy problem.

I think I usually run the simulation from start again if I add signals.

I pay them a fortune for maintenance and support so I can ask the
questions !
I\'m using the free version from Lattice. I did buy the Lattice tools once and ordered the version with Modelsim. But before they shipped it they had switched vendors. I was pretty pissed with the bait and switch, but got no traction with them. By the time I got over it I found I could barely tell the difference.

My usage tends to be very sporadic so rather than pay for maintenance I just kept using the old version. But the last couple of laptop purchases rather than drag the licensing stuff around I just started using the free tool.

So if you work in the directory location for the simulation tools, do you copy the files to the location for the synthesis tools? Or is the synthesis tool more flexible?

My issue is that both tools create lots of chaff files that I don\'t want to even see, much less back up. So I prefer to keep all my source files in a directory tree separate from the tools. Then I back up everything in that source directory tree making my life easy. Hmmmm... I think Windows has links. Maybe I can create links in the tool /src directory that point to my real source directory. I should work out the bugs while the file count is still just two.

Thanks for the support. Enjoy your holiday.

--

Rick C.

+ Get 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209
 
R

Rick C

Guest
This thing is really starting to piss me off. I can\'t understand some of the things it does. Now the cursor won\'t stay where I put it. It keeps moving to the end of the simulation a few seconds after I let go of it, EVEN IF I\'M STILL HOLDING ONTO IT WITH THE CURSOR!!!

I can drag it around as much as I like, but as soon as I pause on something it will snap back to the end of the simulation time. Oh! It\'s not just the cursor, the view in the waveform window moves to include the end of the simulation time as well. So I can\'t zoom in on anything else.

Is Aldec just trying to mess with me???

I would say the simulation was still running, but the last message in the console says, \"# KERNEL: stopped at time: 4500 ms\"

--

Rick C.

-- Get 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209
 
Toggle Sidebar

Welcome to EDABoard.com

Sponsor

Top