Xilinx 7 series PCIe core models vs. Icarus Verilog

We are looking for simulation models for the Xilinx 7 series
FPGA PCIe core. We use Icarus Verilog models extensively, but
the models that Xilinx provides are encrypted, so locked in to
a small set of other simulators. We are hoping that we are not
the only ones with this problem and we can share simulation
models for their core.
--
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,http://www.icarus.com        and lines to code before I sleep,http://www..picturel.com      And lines to code before I sleep."

On Dec 7, 8:49 am, Stephen Williams <spamt...@icarus.com> wrote:
We are looking for simulation models for the Xilinx 7 series
FPGA PCIe core. We use Icarus Verilog models extensively, but
the models that Xilinx provides are encrypted, so locked in to
a small set of other simulators. We are hoping that we are not
the only ones with this problem and we can share simulation
models for their core.
--
Steve Williams "The woods are lovely, dark and deep.
steve at icarus.com But I have promises to keep,http://www.icarus.com and lines to code before I sleep,http://www.picturel.com And lines to code before I sleep."

The PCIe embedded hard block is a very complicated design and the
simulation models are released as encrypted models to protect the IP.
Simulation is supported in the free Xilinx iSim simulator as well as
ModelTech and I belive VCS simulators.

There is no support for Icarus.

On 12/07/2011 09:17 AM, Ed McGettigan wrote:
On Dec 7, 8:49 am, Stephen Williams<spamt...@icarus.com> wrote:
We are looking for simulation models for the Xilinx 7 series
FPGA PCIe core. We use Icarus Verilog models extensively, but
the models that Xilinx provides are encrypted, so locked in to
a small set of other simulators. We are hoping that we are not
the only ones with this problem and we can share simulation
models for their core.
--
Steve Williams "The woods are lovely, dark and deep.
steve at icarus.com But I have promises to keep,http://www.icarus.com and lines to code before I sleep,http://www.picturel.com And lines to code before I sleep."

The PCIe embedded hard block is a very complicated design and the
simulation models are released as encrypted models to protect the IP.
Simulation is supported in the free Xilinx iSim simulator as well as
ModelTech and I belive VCS simulators.

There is no support for Icarus.

That is very awkward for us since we use a fair amount of VPI
code in our system level simulations. We are basically being forced
to either come up with our own simulation of the PCIe hard core,
or port our simulation environment to a "blessed" simulator.

At one time I talked with some of your engineers about adding the
necessary encryption support into Icarus Verilog, but it was not
clear to me which encryption method you used, and whether it would
have been viable to have an open source implementation of it. I
think we concluded no.

Synopsys have their own smartmodels but Xilinx moved to SecureIP for

HI,
Stephen Williams skrev 2011-12-07 21:19:



On 12/07/2011 09:17 AM, Ed McGettigan wrote:
On Dec 7, 8:49 am, Stephen Williams<spamt...@icarus.com>  wrote:
We are looking for simulation models for the Xilinx 7 series
FPGA PCIe core. We use Icarus Verilog models extensively, but
the models that Xilinx provides are encrypted, so locked in to
a small set of other simulators. We are hoping that we are not
the only ones with this problem and we can share simulation
models for their core.
--
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,http://www.icarus.com       and lines to code before I sleep,http://www.picturel.com     And lines to code before I sleep."

The PCIe embedded hard block is a very complicated design and the
simulation models are released as encrypted models to protect the IP.
Simulation is supported in the free Xilinx iSim simulator as well as
ModelTech and I belive VCS simulators.

There is no support for Icarus.

That is very awkward for us since we use a fair amount of VPI
code in our system level simulations. We are basically being forced
to either come up with our own simulation of the PCIe hard core,
or port our simulation environment to a "blessed" simulator.

At one time I talked with some of your engineers about adding the
necessary encryption support into Icarus Verilog, but it was not
clear to me which encryption method you used, and whether it would
have been viable to have an open source implementation of it. I
think we concluded no.

Synopsys have their own smartmodels but Xilinx moved to SecureIP for
some reasons, more open?

http://www.xilinx.com/support/answers/33275.htm

/michael

/michael- Hide quoted text -

- Show quoted text -

On Dec 7, 10:43 pm, Michael Laajanen<michael_laaja...@yahoo.com
wrote:
HI,
Stephen Williams skrev 2011-12-07 21:19:



On 12/07/2011 09:17 AM, Ed McGettigan wrote:
On Dec 7, 8:49 am, Stephen Williams<spamt...@icarus.com> wrote:
We are looking for simulation models for the Xilinx 7 series
FPGA PCIe core. We use Icarus Verilog models extensively, but
the models that Xilinx provides are encrypted, so locked in to
a small set of other simulators. We are hoping that we are not
the only ones with this problem and we can share simulation
models for their core.
--
Steve Williams "The woods are lovely, dark and deep.
steve at icarus.com But I have promises to keep,http://www.icarus.com and lines to code before I sleep,http://www.picturel.com And lines to code before I sleep."

The PCIe embedded hard block is a very complicated design and the
simulation models are released as encrypted models to protect the IP.
Simulation is supported in the free Xilinx iSim simulator as well as
ModelTech and I belive VCS simulators.

There is no support for Icarus.

That is very awkward for us since we use a fair amount of VPI
code in our system level simulations. We are basically being forced
to either come up with our own simulation of the PCIe hard core,
or port our simulation environment to a "blessed" simulator.

At one time I talked with some of your engineers about adding the
necessary encryption support into Icarus Verilog, but it was not
clear to me which encryption method you used, and whether it would
have been viable to have an open source implementation of it. I
think we concluded no.

Synopsys have their own smartmodels but Xilinx moved to SecureIP for
some reasons, more open?

http://www.xilinx.com/support/answers/33275.htm

/michael

/michael- Hide quoted text -

- Show quoted text -

Move away from SmartModels was primarily due to a lack of continuing
support from Synopsys for the latest OS and simulator versions.

The SecureIP models are supported in a wide range of simulators as the
answer record shows.

Ed McGettigan
--
Xilinx Inc.
Speaking of Synopsys, since they now since a couple of years fully

Hi,
Ed McGettigan skrev 2011-12-08 17:26:



On Dec 7, 10:43 pm, Michael Laajanen<michael_laaja...@yahoo.com
wrote:
HI,
Stephen Williams skrev 2011-12-07 21:19:

On 12/07/2011 09:17 AM, Ed McGettigan wrote:
On Dec 7, 8:49 am, Stephen Williams<spamt...@icarus.com>    wrote:
We are looking for simulation models for the Xilinx 7 series
FPGA PCIe core. We use Icarus Verilog models extensively, but
the models that Xilinx provides are encrypted, so locked in to
a small set of other simulators. We are hoping that we are not
the only ones with this problem and we can share simulation
models for their core.
--
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,http://www.icarus.com      and lines to code before I sleep,http://www.picturel.com    And lines to code before I sleep."

The PCIe embedded hard block is a very complicated design and the
simulation models are released as encrypted models to protect the IP..
Simulation is supported in the free Xilinx iSim simulator as well as
ModelTech and I belive VCS simulators.

There is no support for Icarus.

That is very awkward for us since we use a fair amount of VPI
code in our system level simulations. We are basically being forced
to either come up with our own simulation of the PCIe hard core,
or port our simulation environment to a "blessed" simulator.

At one time I talked with some of your engineers about adding the
necessary encryption support into Icarus Verilog, but it was not
clear to me which encryption method you used, and whether it would
have been viable to have an open source implementation of it. I
think we concluded no.

Synopsys have their own smartmodels but Xilinx moved to SecureIP for
some reasons, more open?

http://www.xilinx.com/support/answers/33275.htm

/michael

/michael- Hide quoted text -

- Show quoted text -

Move away from SmartModels was primarily due to a lack of continuing
support from Synopsys for the latest OS and simulator versions.

The SecureIP models are supported in a wide range of simulators as the
answer record shows.

Ed McGettigan
--
Xilinx Inc.

Speaking of Synopsys, since they now since a couple of years fully
supports Solaris on x64 has Xilinx any plans/discussions about that to?

/michael- Hide quoted text -

- Show quoted text -