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Guest

Fri Feb 08, 2019 8:45 pm   



x : std_logic_vector(12 downto 0); -- unsigned integer

Should be implemented in spartan-6 but without using on chip multiplicators. Any ideas for an efficient code?


Guest

Sat Feb 09, 2019 4:45 am   



On Friday, February 8, 2019 at 2:33:18 PM UTC-5, stch...@gmail.com wrote:
Quote:
x : std_logic_vector(12 downto 0); -- unsigned integer

Should be implemented in spartan-6 but without using on chip multiplicators. Any ideas for an efficient code?


Personally, I find multipliers to be a PITA to code. One thing you have in your favor for calculating a square is that all the results will be positive or zero. So you don't need a bipolar multiplication. Just take the absolute value of your input before the multiply assuming the input is signed as opposed to unsigned.

I see in your comment "unsigned integer" which means you can either convert your input SLV to an unsigned type or to an integer type with a range of 0 to 4095 before you multiply to form the square. Keep in mind your result will need twice as many bits if you want to retain full resolution.

I assume this is a class assignment? Does your instructor care if the algorithm is small, fast, easy to code or some combination? A simple approach for positive number multiplies is shift and add. A more complex, but smaller implementation (and maybe faster as well) is a Booth's algorithm or maybe a modified Booth's algorithm.

Oh yeah, please use numeric_std and not std_logic_arith. If you don't know why, just ask. That's one point that most people here get.

Rick C.

Bart Fox
Guest

Sat Feb 09, 2019 10:45 am   



On Fri, 8 Feb 2019 11:33:16 -0800 (PST), stchebel_at_gmail.com wrote:
Quote:
Should be implemented in spartan-6 but without using on chip
multiplicators. Any ideas for an efficient code?


Search for the attribute MULT_STYLE in the XST User Guide for
Spartan6.

Bart Fox

KJ
Guest

Sat Feb 09, 2019 3:45 pm   



On Friday, February 8, 2019 at 2:33:18 PM UTC-5, stch...@gmail.com wrote:
Quote:
x : std_logic_vector(12 downto 0); -- unsigned integer

Should be implemented in spartan-6 but without using on chip multiplicators. Any ideas for an efficient code?


What is your definition of 'efficient'? Here are a few:
- Minimal coding effort, most easily supportable: Then XSquared <= unsigned(x) * unsigned(x);. If there are no multipliers in the target device, the synthesizer will handle implementing it without them, you don't have to do anything.
- Highest performance, but with long latency: With no hardware multiplier, you'll need to pipeline the steps yourself to achieve whatever it is you're looking to achieve.
- Fewest logic cells: No particular suggestions here since this is not something I've looked into for multiplying.

Kevin Jennings


Guest

Sun Feb 10, 2019 7:45 am   



On Sunday, February 10, 2019 at 12:48:45 AM UTC-5, stch...@gmail.com wrote:
Quote:
W dniu sobota, 9 lutego 2019 04:17:37 UTC+1 użytkownik gnuarm.del...@gmail.com napisał:
On Friday, February 8, 2019 at 2:33:18 PM UTC-5, stch...@gmail.com wrote:
x : std_logic_vector(12 downto 0); -- unsigned integer

Should be implemented in spartan-6 but without using on chip multiplicators. Any ideas for an efficient code?

Personally, I find multipliers to be a PITA to code. One thing you have in your favor for calculating a square is that all the results will be positive or zero. So you don't need a bipolar multiplication. Just take the absolute value of your input before the multiply assuming the input is signed as opposed to unsigned.

I see in your comment "unsigned integer" which means you can either convert your input SLV to an unsigned type or to an integer type with a range of 0 to 4095 before you multiply to form the square. Keep in mind your result will need twice as many bits if you want to retain full resolution.

I assume this is a class assignment? Does your instructor care if the algorithm is small, fast, easy to code or some combination? A simple approach for positive number multiplies is shift and add. A more complex, but smaller implementation (and maybe faster as well) is a Booth's algorithm or maybe a modified Booth's algorithm.

Oh yeah, please use numeric_std and not std_logic_arith. If you don't know why, just ask. That's one point that most people here get.

Rick C.

Thanks a lot Rick for your comprehensive answer. Multiplication should be done in one clock cycle @40MHz. I have some ideas but first I will experiment with 4-bit input words. Yes, in fact I don't know why do you suggest to use numeric_std instead of logis_std. Could you explain, please.


std_logic_vector (SLV) is not a numeric oriented type. I'm getting a bit rusty in my VHDL so there may be libraries that let you perform math on SLV (like addition) but one of the intents of typing in VHDL is to clearly indicate the meaning of the data type you are using. That's why they have the various data types such as signed and unsigned. numeric_std provides math operators for signed and unsigned types and that's what I recommend since it allows you to clearly indicate what you intend and makes your intent obvious to anyone else reading the code.

Do you know which algorithm you want to implement?

BTW, you can apply any of the algorithms I mentioned to logic in a single clock cycle. Rather than using the same logic elements iteratively in multiple clock cycles, you would instantiate the same functionality multiple times in succession. This can be done as sequential code in a function or process or you can use a generate statement to iteratively define your logic.

Wow! It has been a while since I actually wrote any VHDL and I'm really rusty on this. I'm having trouble picturing the code.

Rick C.


Guest

Sun Feb 10, 2019 7:45 am   



W dniu sobota, 9 lutego 2019 15:17:49 UTC+1 użytkownik KJ napisał:
Quote:
On Friday, February 8, 2019 at 2:33:18 PM UTC-5, stch...@gmail.com wrote:
x : std_logic_vector(12 downto 0); -- unsigned integer

Should be implemented in spartan-6 but without using on chip multiplicators. Any ideas for an efficient code?

What is your definition of 'efficient'? Here are a few:
- Minimal coding effort, most easily supportable: Then XSquared <= unsigned(x) * unsigned(x);. If there are no multipliers in the target device, the synthesizer will handle implementing it without them, you don't have to do anything.
- Highest performance, but with long latency: With no hardware multiplier, you'll need to pipeline the steps yourself to achieve whatever it is you're looking to achieve.
- Fewest logic cells: No particular suggestions here since this is not something I've looked into for multiplying.

Kevin Jennings


Thanks Kevin for your answer. The solution should be somehow balanced speed/coding complexity. The goal is to have a multiplier running @40MHz. Multiplication should be performed in onw clock cycle.

Stachu


Guest

Sun Feb 10, 2019 7:45 am   



W dniu sobota, 9 lutego 2019 04:17:37 UTC+1 użytkownik gnuarm.del...@gmail.com napisał:
Quote:
On Friday, February 8, 2019 at 2:33:18 PM UTC-5, stch...@gmail.com wrote:
x : std_logic_vector(12 downto 0); -- unsigned integer

Should be implemented in spartan-6 but without using on chip multiplicators. Any ideas for an efficient code?

Personally, I find multipliers to be a PITA to code. One thing you have in your favor for calculating a square is that all the results will be positive or zero. So you don't need a bipolar multiplication. Just take the absolute value of your input before the multiply assuming the input is signed as opposed to unsigned.

I see in your comment "unsigned integer" which means you can either convert your input SLV to an unsigned type or to an integer type with a range of 0 to 4095 before you multiply to form the square. Keep in mind your result will need twice as many bits if you want to retain full resolution.

I assume this is a class assignment? Does your instructor care if the algorithm is small, fast, easy to code or some combination? A simple approach for positive number multiplies is shift and add. A more complex, but smaller implementation (and maybe faster as well) is a Booth's algorithm or maybe a modified Booth's algorithm.

Oh yeah, please use numeric_std and not std_logic_arith. If you don't know why, just ask. That's one point that most people here get.

Rick C.


Thanks a lot Rick for your comprehensive answer. Multiplication should be done in one clock cycle @40MHz. I have some ideas but first I will experiment with 4-bit input words. Yes, in fact I don't know why do you suggest to use numeric_std instead of logis_std. Could you explain, please.

Stachu

KJ
Guest

Mon Feb 11, 2019 12:45 am   



On Sunday, February 10, 2019 at 12:53:48 AM UTC-5, stch...@gmail.com wrote:
Quote:
W dniu sobota, 9 lutego 2019 15:17:49 UTC+1 użytkownik KJ napisał:
On Friday, February 8, 2019 at 2:33:18 PM UTC-5, stch...@gmail.com wrote:
x : std_logic_vector(12 downto 0); -- unsigned integer

Should be implemented in spartan-6 but without using on chip multiplicators. Any ideas for an efficient code?

What is your definition of 'efficient'? Here are a few:
- Minimal coding effort, most easily supportable: Then XSquared <= unsigned(x) * unsigned(x);. If there are no multipliers in the target device, the synthesizer will handle implementing it without them, you don't have to do anything.
- Highest performance, but with long latency: With no hardware multiplier, you'll need to pipeline the steps yourself to achieve whatever it is you're looking to achieve.
- Fewest logic cells: No particular suggestions here since this is not something I've looked into for multiplying.

Kevin Jennings

Thanks Kevin for your answer. The solution should be somehow balanced speed/coding complexity. The goal is to have a multiplier running @40MHz. Multiplication should be performed in onw clock cycle.

Stachu


Then start by synthesizing "XSquared <= unsigned(x) * unsigned(x);" and run it through your tools. If Fmax > 40 MHz, you don't need to invest any more time or effort in trying to find a 'better' implementation.

Kevin Jennings


Guest

Mon Feb 11, 2019 7:45 am   



On Sunday, February 10, 2019 at 6:08:22 PM UTC-5, KJ wrote:
Quote:
On Sunday, February 10, 2019 at 12:53:48 AM UTC-5, stch...@gmail.com wrote:
W dniu sobota, 9 lutego 2019 15:17:49 UTC+1 użytkownik KJ napisał:
On Friday, February 8, 2019 at 2:33:18 PM UTC-5, stch...@gmail.com wrote:
x : std_logic_vector(12 downto 0); -- unsigned integer

Should be implemented in spartan-6 but without using on chip multiplicators. Any ideas for an efficient code?

What is your definition of 'efficient'? Here are a few:
- Minimal coding effort, most easily supportable: Then XSquared <= unsigned(x) * unsigned(x);. If there are no multipliers in the target device, the synthesizer will handle implementing it without them, you don't have to do anything.
- Highest performance, but with long latency: With no hardware multiplier, you'll need to pipeline the steps yourself to achieve whatever it is you're looking to achieve.
- Fewest logic cells: No particular suggestions here since this is not something I've looked into for multiplying.

Kevin Jennings

Thanks Kevin for your answer. The solution should be somehow balanced speed/coding complexity. The goal is to have a multiplier running @40MHz. Multiplication should be performed in onw clock cycle.

Stachu

Then start by synthesizing "XSquared <= unsigned(x) * unsigned(x);" and run it through your tools. If Fmax > 40 MHz, you don't need to invest any more time or effort in trying to find a 'better' implementation.

Kevin Jennings


That will likely use the built in multipliers and he doesn't want that. Most likely the teacher said to not use the multipliers.

Rick C.

Rob Gaddi
Guest

Mon Feb 11, 2019 7:45 pm   



On 2/8/19 11:33 AM, stchebel_at_gmail.com wrote:
Quote:
x : std_logic_vector(12 downto 0); -- unsigned integer

Should be implemented in spartan-6 but without using on chip multiplicators. Any ideas for an efficient code?


And, per your other instructions, have it execute in one cycle? Sure,
block RAM. With only one input you'd have an 8k address space, and the
result of the square is 24b wide. In Spartan-6, configured as a
single-port ROM, you'll get 8k*2b per BRAM, so you'd need 12 BRAMs. Bit
of an expensive solution, but not unheard of.

--
Rob Gaddi, Highland Technology -- www.highlandtechnology.com
Email address domain is currently out of order. See above to fix.

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