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valtih1978
Guest
Tue Aug 30, 2011 10:34 am
Quote:
yup, so the SDRAM will appear as an on chip block.... even though it
locates few inches away...
Nope. On chip, you know when data arrives with respect to clock.
Mawa_fugo
Guest
Tue Aug 30, 2011 8:47 pm
On Aug 30, 5:34 am, valtih1978 <d...@not.email.me> wrote:
Quote:
yup, so the SDRAM will appear as an on chip block.... even though it
locates few inches away...
Nope. On chip, you know when data arrives with respect to clock.
In theory you are able to know everything even before you can touch
the hardware...
valtih1978
Guest
Thu Sep 01, 2011 4:16 pm
Your theory proves everything true. It is known as 'determinism'.
In reality, FPGA tools ensure the data not too late. Because they know
the length of both clock and data. You tell the length of board clock
trace to SDRAM by the feedback. But, there is no information about
DQ/addr delays. Therefore, the on-chip-like timing analysis is
impossible. The external clock feedback makes no sense at all.
valtih1978
Guest
Thu Sep 01, 2011 4:32 pm
I know that secondary DCM must be used to get the 90 deg time shift. You
specify the clock routing very clearly. But, I do not see any info about
_data line_ delays. Saying about clock makes no sense if you data line
has indefinite length. Must they exactly match with clock or calibration
is desired anyway and the only advantage of external FB is
voltage-temperature compensation?
Mawa_fugo
Guest
Fri Sep 02, 2011 7:58 pm
On Sep 1, 11:16 am, valtih1978 <d...@not.email.me> wrote:
Quote:
Your theory proves everything true. It is known as 'determinism'.
In reality, FPGA tools ensure the data not too late. Because they know
the length of both clock and data. You tell the length of board clock
trace to SDRAM by the feedback. But, there is no information about
DQ/addr delays. Therefore, the on-chip-like timing analysis is
impossible. The external clock feedback makes no sense at all.
OK, you make me to rethink about this.. what I'm going to do next is
to reroute the DCM not to use external feedback, and see if the sdram
still operate correct or not,
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