elektroda.net NewsGroups Forum Index - VHDL Language - Viewing intermediate variable value within a process in Mode
rwdfan
Guest
Guest
Thu Feb 18, 2010 11:50 pm
I am debugging a VHDL block which has a "for loop" inside a
procedure. Within each iteration of the for loop, a variable is
conditionally assigned. For troubleshooting the design, I am
interested in viewing the value of the variable at specific locations
of the process. Since the variable is re-assigned subsequently within
the process, the variable has changed state multiple times in zero
time. I realize this rules out any viewing in a wave window.
process(clk,reset)
variable a;
variable b;
begin
if rising_edge(clk) then
for i in 0 to 7 loop
if condition1 then
a := x(i);
end if;
b := a;
if condition2 then
a := x(i+1);
end if;
end for;
end if
end process;
Here is a simple example. Please do not recommend a different coding
style, as this is merely an attempt to illustrate the problem. Let's
say I want to lok at the value of a (or i, for that matter) at the end
of the first if statement. I do not want to see it after the process
completes. I would be happy if I could insert a line of code similar
to the report command, that could display the value of a variable at
the time of execution.
Any suggestions?
Brett
Rob Gaddi
Guest
Guest
Thu Feb 18, 2010 11:50 pm
On Thu, 18 Feb 2010 13:50:15 -0800 (PST)
rwdfan <brett.chaveriat_at_gmail.com> wrote:
Quote:
I am debugging a VHDL block which has a "for loop" inside a
procedure. Within each iteration of the for loop, a variable is
conditionally assigned. For troubleshooting the design, I am
interested in viewing the value of the variable at specific locations
of the process. Since the variable is re-assigned subsequently within
the process, the variable has changed state multiple times in zero
time. I realize this rules out any viewing in a wave window.
process(clk,reset)
variable a;
variable b;
begin
if rising_edge(clk) then
for i in 0 to 7 loop
if condition1 then
a := x(i);
end if;
b := a;
if condition2 then
a := x(i+1);
end if;
end for;
end if
end process;
Here is a simple example. Please do not recommend a different coding
style, as this is merely an attempt to illustrate the problem. Let's
say I want to lok at the value of a (or i, for that matter) at the end
of the first if statement. I do not want to see it after the process
completes. I would be happy if I could insert a line of code similar
to the report command, that could display the value of a variable at
the time of execution.
Any suggestions?
Brett
procedure. Within each iteration of the for loop, a variable is
conditionally assigned. For troubleshooting the design, I am
interested in viewing the value of the variable at specific locations
of the process. Since the variable is re-assigned subsequently within
the process, the variable has changed state multiple times in zero
time. I realize this rules out any viewing in a wave window.
process(clk,reset)
variable a;
variable b;
begin
if rising_edge(clk) then
for i in 0 to 7 loop
if condition1 then
a := x(i);
end if;
b := a;
if condition2 then
a := x(i+1);
end if;
end for;
end if
end process;
Here is a simple example. Please do not recommend a different coding
style, as this is merely an attempt to illustrate the problem. Let's
say I want to lok at the value of a (or i, for that matter) at the end
of the first if statement. I do not want to see it after the process
completes. I would be happy if I could insert a line of code similar
to the report command, that could display the value of a variable at
the time of execution.
Any suggestions?
Brett
Set a breakpoint and single step it.
--
Rob Gaddi, Highland Technology
Email address is currently out of order
Mike Treseler
Guest
Guest
Thu Feb 18, 2010 11:50 pm
rwdfan wrote:
Quote:
I am debugging a VHDL block which has a "for loop" inside a
procedure. Within each iteration of the for loop, a variable is
conditionally assigned. For troubleshooting the design, I am
interested in viewing the value of the variable at specific locations
of the process. Since the variable is re-assigned subsequently within
the process, the variable has changed state multiple times in zero
time. I realize this rules out any viewing in a wave window.
procedure. Within each iteration of the for loop, a variable is
conditionally assigned. For troubleshooting the design, I am
interested in viewing the value of the variable at specific locations
of the process. Since the variable is re-assigned subsequently within
the process, the variable has changed state multiple times in zero
time. I realize this rules out any viewing in a wave window.
Not true.
If I name the process, I can add it by name with an "add wave" command.
However, only the final value is shown on the wave.
Quote:
I would be happy if I could insert a line of code similar
to the report command, that could display the value of a variable at
the time of execution.
to the report command, that could display the value of a variable at
the time of execution.
You can do exactly that in simulation.
Quote:
Any suggestions?
With modelsim, I just say STEP at the command line,
and watch the variables as the code comes into scope.
-- Mike Treseler
backhus
Guest
Guest
Fri Feb 19, 2010 9:45 am
On 18 Feb., 22:50, rwdfan <brett.chaver...@gmail.com> wrote:
Quote:
I am debugging a VHDL block which has a "for loop" inside a
procedure. Within each iteration of the for loop, a variable is
conditionally assigned. For troubleshooting the design, I am
interested in viewing the value of the variable at specific locations
of the process. Since the variable is re-assigned subsequently within
the process, the variable has changed state multiple times in zero
time. I realize this rules out any viewing in a wave window.
process(clk,reset)
variable a;
variable b;
begin
if rising_edge(clk) then
for i in 0 to 7 loop
if condition1 then
a := x(i);
end if;
b := a;
if condition2 then
a := x(i+1);
end if;
end for;
end if
end process;
Here is a simple example. Please do not recommend a different coding
style, as this is merely an attempt to illustrate the problem. Let's
say I want to lok at the value of a (or i, for that matter) at the end
of the first if statement. I do not want to see it after the process
completes. I would be happy if I could insert a line of code similar
to the report command, that could display the value of a variable at
the time of execution.
Any suggestions?
Brett
procedure. Within each iteration of the for loop, a variable is
conditionally assigned. For troubleshooting the design, I am
interested in viewing the value of the variable at specific locations
of the process. Since the variable is re-assigned subsequently within
the process, the variable has changed state multiple times in zero
time. I realize this rules out any viewing in a wave window.
process(clk,reset)
variable a;
variable b;
begin
if rising_edge(clk) then
for i in 0 to 7 loop
if condition1 then
a := x(i);
end if;
b := a;
if condition2 then
a := x(i+1);
end if;
end for;
end if
end process;
Here is a simple example. Please do not recommend a different coding
style, as this is merely an attempt to illustrate the problem. Let's
say I want to lok at the value of a (or i, for that matter) at the end
of the first if statement. I do not want to see it after the process
completes. I would be happy if I could insert a line of code similar
to the report command, that could display the value of a variable at
the time of execution.
Any suggestions?
Brett
Hi,
with Modelsim you also have the option to use the LIST view.
This can be expanded to show each delta cycle, and the changes of a
value in a loop should cause delta cycles.
So you should be able to see the behavior of your variable there.
Have a nice simulation
Eilert
Alan Fitch
Guest
Guest
Fri Feb 19, 2010 11:31 am
backhus wrote:
Quote:
On 18 Feb., 22:50, rwdfan <brett.chaver...@gmail.com> wrote:
I am debugging a VHDL block which has a "for loop" inside a
procedure. Within each iteration of the for loop, a variable is
conditionally assigned. For troubleshooting the design, I am
interested in viewing the value of the variable at specific locations
of the process. Since the variable is re-assigned subsequently within
the process, the variable has changed state multiple times in zero
time. I realize this rules out any viewing in a wave window.
process(clk,reset)
variable a;
variable b;
begin
if rising_edge(clk) then
for i in 0 to 7 loop
if condition1 then
a := x(i);
end if;
b := a;
if condition2 then
a := x(i+1);
end if;
end for;
end if
end process;
Here is a simple example. Please do not recommend a different coding
style, as this is merely an attempt to illustrate the problem. Let's
say I want to lok at the value of a (or i, for that matter) at the end
of the first if statement. I do not want to see it after the process
completes. I would be happy if I could insert a line of code similar
to the report command, that could display the value of a variable at
the time of execution.
Any suggestions?
Brett
Hi,
with Modelsim you also have the option to use the LIST view.
This can be expanded to show each delta cycle, and the changes of a
value in a loop should cause delta cycles.
So you should be able to see the behavior of your variable there.
Have a nice simulation
Eilert
I am debugging a VHDL block which has a "for loop" inside a
procedure. Within each iteration of the for loop, a variable is
conditionally assigned. For troubleshooting the design, I am
interested in viewing the value of the variable at specific locations
of the process. Since the variable is re-assigned subsequently within
the process, the variable has changed state multiple times in zero
time. I realize this rules out any viewing in a wave window.
process(clk,reset)
variable a;
variable b;
begin
if rising_edge(clk) then
for i in 0 to 7 loop
if condition1 then
a := x(i);
end if;
b := a;
if condition2 then
a := x(i+1);
end if;
end for;
end if
end process;
Here is a simple example. Please do not recommend a different coding
style, as this is merely an attempt to illustrate the problem. Let's
say I want to lok at the value of a (or i, for that matter) at the end
of the first if statement. I do not want to see it after the process
completes. I would be happy if I could insert a line of code similar
to the report command, that could display the value of a variable at
the time of execution.
Any suggestions?
Brett
Hi,
with Modelsim you also have the option to use the LIST view.
This can be expanded to show each delta cycle, and the changes of a
value in a loop should cause delta cycles.
So you should be able to see the behavior of your variable there.
Have a nice simulation
Eilert
As others say, setting breakpoints is very convenient.
If your variable is of a scalar type (for instance INTEGER), you can do
report INTEGER'IMAGE(a);
If it's a more complex type, you can write to standard output, e.g.
write(L, s);
writeline(OUTPUT, L);
regards
Alan
P.S. VHDL 2008 adds implicit to_string functions for one dimensional
arrays of character literals, but for earlier versions you could use
ieee.std_logic_textio to write out standard logic vectors.
--
Alan Fitch
Senior Consultant
Doulos – Developing Design Know-how
VHDL * Verilog * SystemVerilog * SystemC * PSL * Perl * Tcl/Tk * Project
Services
Doulos Ltd. Church Hatch, 22 Marketing Place, Ringwood, Hampshire, BH24
1AW, UK
Tel: + 44 (0)1425 471223 Email: alan.fitch_at_doulos.com
Fax: +44 (0)1425 471573 http://www.doulos.com
------------------------------------------------------------------------
This message may contain personal views which are not the views of
Doulos, unless specifically stated.
Jonathan Bromley
Guest
Guest
Fri Feb 19, 2010 11:43 am
On Thu, 18 Feb 2010 23:45:34 -0800 (PST), backhus wrote:
Quote:
with Modelsim you also have the option to use the LIST view.
This can be expanded to show each delta cycle, and the changes of a
value in a loop should cause delta cycles.
This can be expanded to show each delta cycle, and the changes of a
value in a loop should cause delta cycles.
Really? If that's true, then VHDL is far too much like
Verilog for my taste
--
Jonathan Bromley
HT-Lab
Guest
Guest
Fri Feb 19, 2010 4:59 pm
"backhus" <goouse99_at_googlemail.com> wrote in message
news:25cd1a09-6b67-40ac-99fa-31e793c23470_at_q16g2000yqq.googlegroups.com...
On 18 Feb., 22:50, rwdfan <brett.chaver...@gmail.com> wrote:
<snip>
Quote:
Hi,
with Modelsim you also have the option to use the LIST view.
This can be expanded to show each delta cycle, and the changes of a
value in a loop should cause delta cycles.
Just a side note, the waveform window is much easier for looking at Delta
cycles, this is supported in 6.5x and later.
Hans
www.ht-lab.com
Quote:
So you should be able to see the behavior of your variable there.
Have a nice simulation
Eilert
Have a nice simulation
Eilert
Brad Smallridge
Guest
Guest
Mon Feb 22, 2010 3:17 am
Quote:
I am debugging a VHDL block which has a "for loop" inside a
procedure. Within each iteration of the for loop, a variable is
conditionally assigned. For troubleshooting the design, I am
interested in viewing the value of the variable at specific locations
of the process. Since the variable is re-assigned subsequently within
the process, the variable has changed state multiple times in zero
time. I realize this rules out any viewing in a wave window.
procedure. Within each iteration of the for loop, a variable is
conditionally assigned. For troubleshooting the design, I am
interested in viewing the value of the variable at specific locations
of the process. Since the variable is re-assigned subsequently within
the process, the variable has changed state multiple times in zero
time. I realize this rules out any viewing in a wave window.
I assume this is a ModelSim issue.
Just set up a signal to mirror all variables.
Use two or more signals to take care of your
zero time issue. Perhaps put a flag signal
in each of your if statements. You should be
able to see anything reasonable.
Brad Smallridge
AiVision
Andy
Guest
Guest
Mon Feb 22, 2010 4:49 pm
On Feb 19, 1:45 am, backhus <goous...@googlemail.com> wrote:
Quote:
This can be expanded to show each delta cycle, and the changes of a
value in a loop should cause delta cycles.
So you should be able to see the behavior of your variable there.
Jonathan eluded to this, but here's another hint:
Delta cycles occur at suspensions of processes. Thus the iterations of
a loop in a process (so long as the loop does not contain a wait
statement) do not generate delta cycles.
I suppose you could insert "wait for 0 ns;" inside the loop, and it
would generate delta cycles for each loop iteration.
Like Mike and others, I use breakpoints, single-stepping, etc., or I
use a report/assert statement.
Andy
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