Jezmo
Guest
Tue Oct 04, 2011 9:54 pm
Hiya,
Mostly been done VHDL( i know ,boooo) for the past ten years, and I am
working on a JESD204B interface which might have to be in verilog,
eeek!, now apart from the fact that verilog smells funny are there any
decent verilog references I can erm... refer to?
Most references I can find seem a bit disjointed and badly written.
Cheers
Gabor
Guest
Fri Oct 07, 2011 1:47 pm
Jezmo wrote:
Quote:
Hiya,
Mostly been done VHDL( i know ,boooo) for the past ten years, and I am
working on a JESD204B interface which might have to be in verilog,
eeek!, now apart from the fact that verilog smells funny are there any
decent verilog references I can erm... refer to?
Most references I can find seem a bit disjointed and badly written.
Cheers
I read Thomas & Moorby's "The Verilog Hardware Description Language"
to grasp the language as a beginner. However I mostly use the
Doulos "Verilog Golden Reference Guide" as a reference now. It's
much easier to understand and better organised than the LRM. It
has examples and lists "gotchas" you may run into.
http://www.amazon.com/Verilog%C2%AE-Hardware-Description-Language/dp/0387849300/ref=sr_1_1?ie=UTF8&qid=1317994937&sr=8-1
http://www.amazon.com/Verilog-Golden-Reference-Guide/dp/0953728048/ref=dp_ob_title_bk
Unfortunately the Doulos book is listed as "out of print - limited
availability"
-- Gabor
Alan Fitch
Guest
Sat Oct 08, 2011 10:13 am
On 07/10/11 14:47, Gabor wrote:
Quote:
You can still order it off our website
http://www.doulos.com/webshop
regards
Alan
--
Alan Fitch
Mike Treseler
Guest
Mon Nov 14, 2011 6:58 am
On 10/4/2011 12:54 PM, Jezmo wrote:
Quote:
Hiya,
Mostly been done VHDL( i know ,boooo)
vhdl -> verilog is easier than than the other way around.
for the past ten years, and I am
Quote:
working on a JESD204B interface which might have to be in verilog,
eeek!, now apart from the fact that verilog smells funny are there any
decent verilog references I can erm... refer to?
Most references I can find seem a bit disjointed and badly written.
Verilog text books are often old and useless for synthesis,
but with your vhdl experience your Doulos reference guide,
all you need is to google up a few related examples, say
http://www.asic-world.com/examples/verilog/index.html
and some free brand brand A or X web edition for
simulation and trial synthesis to the rtl viewer.
Good luck.
-- Mike Treseler
