Puneet Dhillon
Guest
Sat Mar 26, 2011 10:28 pm
I have a simple 2-signal hand-shake interface like this:
interface ready_valid_ifc(input clk);
wire ready;
wire valid;
modport sender(input clk,ready, output valid);
modport receiver(input clk,valid, output ready);
endinterface
I want to use this interface as a basic block in another interface
that actually specifies the data I want to transmit between sender and
receiver. E.g. I want to do something like below:
interface memory_bus_ifc(input clk);
wire address;
wire rd_data, wr_data;
wire command;// 0 : read, 1 : write
wire completion; // 0 : read cmp, 1 : write cmp
ready_valid_ifc to_mem(clk);// handshake from controller to memory
ready_valid_ifc from_mem(clk);// handshake from memory to controller
modport controller(input clk,completion,rd_data, output
address,command,wr_data, ref to_mem.sender,from_mem.receiver);
modport memory(input clk,address,command,wr_data, output
completion,rd_data, ref from_mem.sender,to_mem.receiver);
endinterface
However, this does not compile with either Modelsim or VCS. Is there
any way to achieve something like this?
Jonathan Bromley
Guest
Sun Mar 27, 2011 10:19 am
On Sat, 26 Mar 2011 13:28:53 -0700 (PDT), Puneet Dhillon wrote:
Quote:
modport memory(
input clk,address,command,wr_data,
output completion, rd_data,
ref from_mem.sender,to_mem.receiver);
However, this does not compile with either
Modelsim or VCS. Is there any way to achieve
something like this?
No. Modports are neither extensible nor composable.
An unbiased observer might reasonably regard this as
a serious deficiency, given that the modport feature
is intended to provide an abstraction of interconnect.
A biased observer (me) just thinks it's another nail
in the coffin of a language construct that's so flawed
as to be effectively useless.
Sorry to be so negative about it; you've touched
one of my sore spots.
--
Jonathan Bromley
