kude
Guest
Tue Aug 24, 2010 12:39 pm
Hi all,
I am working on text Huffman Encoder and Decoder to be implemented o
FPGA.
and here are things which are not clear for me.
1.Will the binary tree be constructed by software and then the coded dat
be taken and VHDL coded OR can I construct the Binary tree using VHDL? an
I need some hint.
kude
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David Brown
Guest
Tue Aug 24, 2010 2:23 pm
On 24/08/2010 13:39, kude wrote:
Quote:
Hi all,
I am working on text Huffman Encoder and Decoder to be implemented on
FPGA.
and here are things which are not clear for me.
1.Will the binary tree be constructed by software and then the coded data
be taken and VHDL coded OR can I construct the Binary tree using VHDL? and
I need some hint.
That's up to you. If you construct the tree in software and generate
the VHDL from a fixed tree, the hardware will be a lot easier. But then
you have a fixed tree - it will only be efficient for encoding data that
matches that tree.
RCIngham
Guest
Tue Aug 24, 2010 3:59 pm
Very old hat...
http://www.xilinx.com/support/documentation/application_notes/xapp616.pdf
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kude
Guest
Tue Aug 24, 2010 5:03 pm
Quote:
On 24/08/2010 13:39, kude wrote:
Hi all,
I am working on text Huffman Encoder and Decoder to be implemented on
FPGA.
and here are things which are not clear for me.
1.Will the binary tree be constructed by software and then the code
data
be taken and VHDL coded OR can I construct the Binary tree using VHDL
and
I need some hint.
That's up to you. If you construct the tree in software and generate
the VHDL from a fixed tree, the hardware will be a lot easier. But then
you have a fixed tree - it will only be efficient for encoding data that
matches that tree.
@David Brown,ok but what if I want to construct the tree using th
VHDL,where shall I start? And what logic units will I need ?
thanks
---------------------------------------
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kude
Guest
Tue Aug 24, 2010 5:07 pm
Quote:
On 24/08/2010 13:39, kude wrote:
Hi all,
I am working on text Huffman Encoder and Decoder to be implemented on
FPGA.
and here are things which are not clear for me.
1.Will the binary tree be constructed by software and then the coded
data
be taken and VHDL coded OR can I construct the Binary tree using VHDL?
and
I need some hint.
That's up to you. If you construct the tree in software and generate
the VHDL from a fixed tree, the hardware will be a lot easier. But then
you have a fixed tree - it will only be efficient for encoding data that
matches that tree.
@David Brown,ok but what if I want to construct the tree using the
VHDL,where shall I start? And what logic units will I need ?
thanks
---------------------------------------
Posted through
http://www.FPGARelated.com
kude
Guest
Tue Aug 24, 2010 5:12 pm
Quote:
On 24/08/2010 13:39, kude wrote:
Hi all,
I am working on text Huffman Encoder and Decoder to be implemented on
FPGA.
and here are things which are not clear for me.
1.Will the binary tree be constructed by software and then the code
data
be taken and VHDL coded OR can I construct the Binary tree using VHDL
and
I need some hint.
That's up to you. If you construct the tree in software and generate
the VHDL from a fixed tree, the hardware will be a lot easier. But then
you have a fixed tree - it will only be efficient for encoding data that
matches that tree.
@David Brown,ok but what if I want to construct the tree using th
VHDL,where shall I start? And what logic units will I need ?
thanks
---------------------------------------
Posted through
http://www.FPGARelated.com
kude
Guest
Tue Aug 24, 2010 5:22 pm
Quote:
On 24/08/2010 13:39, kude wrote:
Hi all,
I am working on text Huffman Encoder and Decoder to be implemented on
FPGA.
and here are things which are not clear for me.
1.Will the binary tree be constructed by software and then the code
data
be taken and VHDL coded OR can I construct the Binary tree using VHDL
and
I need some hint.
That's up to you. If you construct the tree in software and generate
the VHDL from a fixed tree, the hardware will be a lot easier. But then
you have a fixed tree - it will only be efficient for encoding data that
matches that tree.
@David Brown,ok but what if I want to construct the tree using th
VHDL,where shall I start? And what logic units will I need ?
thanks
---------------------------------------
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http://www.FPGARelated.com
Tim Wescott
Guest
Tue Aug 24, 2010 5:32 pm
On 08/24/2010 09:03 AM, kude wrote:
Quote:
On 24/08/2010 13:39, kude wrote:
Hi all,
I am working on text Huffman Encoder and Decoder to be implemented on
FPGA.
and here are things which are not clear for me.
1.Will the binary tree be constructed by software and then the coded
data
be taken and VHDL coded OR can I construct the Binary tree using VHDL?
and
I need some hint.
That's up to you. If you construct the tree in software and generate
the VHDL from a fixed tree, the hardware will be a lot easier. But then
you have a fixed tree - it will only be efficient for encoding data that
matches that tree.
@David Brown,ok but what if I want to construct the tree using the
VHDL,where shall I start?
http://www.altavista.com/web/results?fr=altavista&itag=ody&q=Huffman+Encoding&kgs=0&kls=0
Quote:
And what logic units will I need ?
Who knows? Finish your project and you can tell us. If you're lucky
there's a book out there on implementing data compression in logic; I
suspect, however, that what there is are a lot of very specific,
narrowly focused materials on specific methods (i.e. "Implementing Video
Compression in Digital Hardware"). And that's if you're lucky -- if
you're not lucky then there are 10 companies out there that have each
learned how to do it, and no one wants to tell anyone else how it's done.
--
Tim Wescott
Wescott Design Services
http://www.wescottdesign.com
Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at
http://www.wescottdesign.com/actfes/actfes.html
kude
Guest
Tue Aug 24, 2010 5:48 pm
Quote:
On 24/08/2010 13:39, kude wrote:
Hi all,
I am working on text Huffman Encoder and Decoder to be implemented on
FPGA.
and here are things which are not clear for me.
1.Will the binary tree be constructed by software and then the code
data
be taken and VHDL coded OR can I construct the Binary tree using VHDL
and
I need some hint.
That's up to you. If you construct the tree in software and generate
the VHDL from a fixed tree, the hardware will be a lot easier. But then
you have a fixed tree - it will only be efficient for encoding data that
matches that tree.
@David Brown,ok but what if I want to construct the tree using th
VHDL,where shall I start? And what logic units will I need ?
thanks
---------------------------------------
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glen herrmannsfeldt
Guest
Tue Aug 24, 2010 8:22 pm
kude <tadmas09_at_n_o_s_p_a_m.gmail.com> wrote:
Quote:
I am working on text Huffman Encoder and Decoder to be
implemented on FPGA.
I recommend looking at the literature on systolic arrays.
I am not so sure, but I believe that works well for many
compression algorithms.
Remember that you are building hardware, and the size must
be specified before synthesis. You can't do dynamic allocation
as in many programming languages.
-- glen
kude
Guest
Mon Sep 06, 2010 4:23 pm
And can anybody tell me how can I give the input text to the FPGA pls?
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kude
Guest
Mon Sep 06, 2010 5:04 pm
And can anybody tell me how can I give the input text to the FPGA pls?
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Stef
Guest
Mon Sep 06, 2010 11:55 pm
In comp.arch.fpga,
kude <tadmas09_at_n_o_s_p_a_m.n_o_s_p_a_m.gmail.com> wrote:
Quote:
And can anybody tell me how can I give the input text to the FPGA pls?
There are lots of options:
- Implement a PS2 interface on the FPGA and connect a PC keyboard
- Connect 2 HEX switches and an Enter key and input ASCII codes
- Implement a serial port on your FPGA and connect to your PC
- If it's written text, you may want to connect a scanner and
implement OCR
- And many more ...
--
Stef (remove caps, dashes and .invalid from e-mail address to reply by mail)
"People should have access to the data which you have about them. There should
be a process for them to challenge any inaccuracies."
-- Arthur Miller
kude
Guest
Sun Sep 12, 2010 8:43 am
Can anyone have a sample vhdl code for Huffman text Encoder and Decoder
pls?
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kude
Guest
Sun Sep 12, 2010 8:47 am
Does anyone have a sample vhdl code for Huffman text Encoder and Decoder
pls? For static or dynamic Huffman ?
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