stretching a pulse

John Larkin wrote:
I'll be measuring the pulse energy, which is what matters. A simple
passive pulse stretcher, if I can find one, greatly reduces the cost
of downstream electronics.

Sample the pulse source at a rate fast enough to detect the shortest
one and store the samples in a ring buffer of sufficient size to store
the longest one . When a pulse is detected, store the contents of the
buffer in a more permanent location and analyze them at your leisure.
With 2 ns pulses, the sample rate would be 5 GHz or so, with maybe 10
bits of ADC resolution. That's 50 gigabits of data per second. The
"leisure" I have for analysis is hundreds of nanoseconds.

John
But you only have to keep about 1000 samples to feed to the analyser,
and trigger the analyser instead of the sampler.

Digitizing and analyzing a signal like this makes no sense. All I want
to do is drive a few comparators, and it's easier if I can use cheap
CMOS parts instead of expensive power-hogging ECL ones. So, the quest
for a pulse stretcher. Even if I did want to digitize the photodiode
pulses (which concept was rejected by the customer on account of cost)
it makes sense to stretch them first. Then I could get by with a 500
or even 200 MHz digitizer, which is beginning to seem sane.

John


Are you measuring the peak power or total energy? If the latter, why
can't the pulses simply be integrated by some fast analog front end, and
the resulting integral sampled? Then reset the integrator in the
"leisure time?"

On Sep 4, 2:34 am, John Larkin
jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
On Thu, 2 Sep 2010 19:04:00 -0700 (PDT),BillSloman



bill.slo...@ieee.org> wrote:
On Sep 3, 12:02 am,BillSloman<bill.slo...@ieee.org> wrote:
On Sep 2, 3:39 pm, whit3rd <whit...@gmail.com> wrote:

On Sep 1, 7:24 pm, John Larkin

jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
The bad news is that few people still make analog delay lines, and
they want 4 weeks to come up with a sample. I don't have 4 weeks. So
either I make my own tapped LC delay line from parts, or try cascading
and summing Bessel filters.

For 5 ns, you need about five feet of twinlead or coax cable to make a
delay line.
Probably there's a way to get it without a four week wait.

The propagation delay of light in air (or vacuum) is about 1nsec per
foot. The propagation delay in the dielelctric of coaxial cable is
slower, at about 1.5nsec per foot. You can get 1.1mm OD teflon
dielecric minature coax, and three feet of that can be coiled into a
reasonably compact bundle (and I've used that as a delay line).

Twisted pair is going to have a mixed dielectric and experiment would
seem to be called for. Twisted transformer wire - with enamel
insulation - makes a remarkably compact transmission line, but I've no
idea of the propagation delay, beyond that it too has a mixed
dielectric (air plus enamel).

Come to think of it, buried strip-line in a printed circuit board is a
non-dispersive transmission line. You'd need a four layer board in
which to bury the strip-line - and six layers would allow to stack two
layers.

Figuring on 0.004 inch tracks and track spacing, and an 0.004 inch
wide ground finger between adjacent tracks, the structure is only
0.016 inches wide, and you could get five feet of strip-line into a
square inch of board space (half a square inch with a six layer
board). It's difficult to get higher than 50R track impedance in
buried strip-line - the tracks start to get very narrow - but it might
ber worth looking at.

That might work. We'd have to squash the delay line between pcb
planes, ground and a power pour, and dance around any vias. A few
optional places to add shorts, to tune line length, might be prudent.

The shorted line + integrator thing is appealing, because the line is
half as long.

We usually use 5 or 6 mil minimum traces. A zigzag delay line would
need trace spacings somewhat wider than the plane-plane spacing, to
mimimize sideways coupling that would add dispersion.

Actually, I'd put grounded fingers between the zigs and the zags to
deal with the sideways coupling - my 16 thou notional example included
just such a grounded trace.

There's no need
to squeeze a delay line into a specific small area... it could meander
all over the board.

Sure. But you want to tap it from time to time, and the taps want to
be reasonably close together. I'd buffer the taps myself, and narrow
the delay trace around each tap to compensate for the capacitative
load presented by the op amp input.

Etching structures like this into boards can be dicey. I prefer using
lumped parts when I can, to allow more ways to get out of trouble.

Printed circuits are components very like any other. You need to know
how to calculate transmission line properties, but if you stick
between 50R aand 75R this isn't usually too difficult.

On Sun, 5 Sep 2010 04:56:21 -0700 (PDT), Bill Sloman <bill.sloman_at_ieee.org> wrote:

On Sep 4, 2:34 am, John Larkin
jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
On Thu, 2 Sep 2010 19:04:00 -0700 (PDT),BillSloman



bill.slo...@ieee.org> wrote:
On Sep 3, 12:02 am,BillSloman<bill.slo...@ieee.org> wrote:
On Sep 2, 3:39 pm, whit3rd <whit...@gmail.com> wrote:

On Sep 1, 7:24 pm, John Larkin

jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
The bad news is that few people still make analog delay lines, and
they want 4 weeks to come up with a sample. I don't have 4 weeks. So
either I make my own tapped LC delay line from parts, or try cascading
and summing Bessel filters.

For 5 ns, you need about five feet of twinlead or coax cable to make a
delay line.
Probably there's a way to get it without a four week wait.

The propagation delay of light in air (or vacuum) is about 1nsec per
foot. The propagation delay in the dielelctric of coaxial cable is
slower, at about 1.5nsec per foot. You can get 1.1mm OD teflon
dielecric minature coax, and three feet of that can be coiled into a
reasonably compact bundle (and I've used that as a delay line).

Twisted pair is going to have a mixed dielectric and experiment would
seem to be called for. Twisted transformer wire - with enamel
insulation - makes a remarkably compact transmission line, but I've no
idea of the propagation delay, beyond that it too has a mixed
dielectric (air plus enamel).

Come to think of it, buried strip-line in a printed circuit board is a
non-dispersive transmission line. You'd need a four layer board in
which to bury the strip-line - and six layers would allow to stack two
layers.

Figuring on 0.004 inch tracks and track spacing, and an 0.004 inch
wide ground finger between adjacent tracks, the structure is only
0.016 inches wide, and you could get five feet of strip-line into a
square inch of board space (half a square inch with a six layer
board). It's difficult to get higher than 50R track impedance in
buried strip-line - the tracks start to get very narrow - but it might
ber worth looking at.

That might work. We'd have to squash the delay line between pcb
planes, ground and a power pour, and dance around any vias. A few
optional places to add shorts, to tune line length, might be prudent.

The shorted line + integrator thing is appealing, because the line is
half as long.

We usually use 5 or 6 mil minimum traces. A zigzag delay line would
need trace spacings somewhat wider than the plane-plane spacing, to
mimimize sideways coupling that would add dispersion.

Actually, I'd put grounded fingers between the zigs and the zags to
deal with the sideways coupling - my 16 thou notional example included
just such a grounded trace.

There's no need
to squeeze a delay line into a specific small area... it could meander
all over the board.

Sure. But you want to tap it from time to time, and the taps want to
be reasonably close together. I'd buffer the taps myself, and narrow
the delay trace around each tap to compensate for the capacitative
load presented by the op amp input.

Etching structures like this into boards can be dicey. I prefer using
lumped parts when I can, to allow more ways to get out of trouble.

Printed circuits are components very like any other. You need to know
how to calculate transmission line properties, but if you stick
between 50R aand 75R this isn't usually too difficult.

I have a rescued video card here where the layout has some delay lines
or loops marked 5mils/60ohm, and L1, L2, L3, L4 marked for two of
these patterns, one each side of the board, apparently with ground
plane between them. In case it stirs the imagination, I put photos up
here, against a metric ruler:

http://grrr.id.au/pcb-cal/

I have no idea what it means, just another thing I wondered about.

Grant.

On Mon, 06 Sep 2010 09:23:25 +1000, Grant <omg_at_grrr.id.au> wrote:

On Sun, 5 Sep 2010 04:56:21 -0700 (PDT), Bill Sloman <bill.sloman_at_ieee.org> wrote:

On Sep 4, 2:34 am, John Larkin
jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
On Thu, 2 Sep 2010 19:04:00 -0700 (PDT),BillSloman



bill.slo...@ieee.org> wrote:
On Sep 3, 12:02 am,BillSloman<bill.slo...@ieee.org> wrote:
On Sep 2, 3:39 pm, whit3rd <whit...@gmail.com> wrote:

On Sep 1, 7:24 pm, John Larkin

jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
The bad news is that few people still make analog delay lines, and
they want 4 weeks to come up with a sample. I don't have 4 weeks. So
either I make my own tapped LC delay line from parts, or try cascading
and summing Bessel filters.

For 5 ns, you need about five feet of twinlead or coax cable to make a
delay line.
Probably there's a way to get it without a four week wait.

The propagation delay of light in air (or vacuum) is about 1nsec per
foot. The propagation delay in the dielelctric of coaxial cable is
slower, at about 1.5nsec per foot. You can get 1.1mm OD teflon
dielecric minature coax, and three feet of that can be coiled into a
reasonably compact bundle (and I've used that as a delay line).

Twisted pair is going to have a mixed dielectric and experiment would
seem to be called for. Twisted transformer wire - with enamel
insulation - makes a remarkably compact transmission line, but I've no
idea of the propagation delay, beyond that it too has a mixed
dielectric (air plus enamel).

Come to think of it, buried strip-line in a printed circuit board is a
non-dispersive transmission line. You'd need a four layer board in
which to bury the strip-line - and six layers would allow to stack two
layers.

Figuring on 0.004 inch tracks and track spacing, and an 0.004 inch
wide ground finger between adjacent tracks, the structure is only
0.016 inches wide, and you could get five feet of strip-line into a
square inch of board space (half a square inch with a six layer
board). It's difficult to get higher than 50R track impedance in
buried strip-line - the tracks start to get very narrow - but it might
ber worth looking at.

That might work. We'd have to squash the delay line between pcb
planes, ground and a power pour, and dance around any vias. A few
optional places to add shorts, to tune line length, might be prudent.

The shorted line + integrator thing is appealing, because the line is
half as long.

We usually use 5 or 6 mil minimum traces. A zigzag delay line would
need trace spacings somewhat wider than the plane-plane spacing, to
mimimize sideways coupling that would add dispersion.

Actually, I'd put grounded fingers between the zigs and the zags to
deal with the sideways coupling - my 16 thou notional example included
just such a grounded trace.

There's no need
to squeeze a delay line into a specific small area... it could meander
all over the board.

Sure. But you want to tap it from time to time, and the taps want to
be reasonably close together. I'd buffer the taps myself, and narrow
the delay trace around each tap to compensate for the capacitative
load presented by the op amp input.

Etching structures like this into boards can be dicey. I prefer using
lumped parts when I can, to allow more ways to get out of trouble.

Printed circuits are components very like any other. You need to know
how to calculate transmission line properties, but if you stick
between 50R aand 75R this isn't usually too difficult.

I have a rescued video card here where the layout has some delay lines
or loops marked 5mils/60ohm, and L1, L2, L3, L4 marked for two of
these patterns, one each side of the board, apparently with ground
plane between them. In case it stirs the imagination, I put photos up
here, against a metric ruler:

http://grrr.id.au/pcb-cal/

I have no idea what it means, just another thing I wondered about.

Grant.

That's probably an impedance test coupon. People sometimes put them on
boards and make the PCB houses match the impedance to some tolerance.

We often put test traces on our boards, zigzagging through various
layers, to see if we (and the board houses) did things right.

On Fri, 3 Sep 2010 11:46:43 -0700 (PDT), whit3rd <whit...@gmail.com

Gizmos like a Wilkinson converter are the classic 'right' way to
capture
a pulse amplitude, but if JL wants to use some other kind of digitizer

Wilkinsons have perfect differential linearity but are very slow. If I
did an analog peak-hold circuit and a 10-bit Wilkinson conversion in,
say, 250 ns, the clock would have to be 4 GHz, which I can't do in an
FPGA.

On Sun, 05 Sep 2010 17:36:56 -0700, John Larkin
jjlarkin_at_highNOTlandTHIStechnologyPART.com> wrote:

On Mon, 06 Sep 2010 09:23:25 +1000, Grant <omg_at_grrr.id.au> wrote:

On Sun, 5 Sep 2010 04:56:21 -0700 (PDT), Bill Sloman <bill.sloman_at_ieee.org> wrote:

On Sep 4, 2:34 am, John Larkin
jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
On Thu, 2 Sep 2010 19:04:00 -0700 (PDT),BillSloman



bill.slo...@ieee.org> wrote:
On Sep 3, 12:02 am,BillSloman<bill.slo...@ieee.org> wrote:
On Sep 2, 3:39 pm, whit3rd <whit...@gmail.com> wrote:

On Sep 1, 7:24 pm, John Larkin

jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
The bad news is that few people still make analog delay lines, and
they want 4 weeks to come up with a sample. I don't have 4 weeks. So
either I make my own tapped LC delay line from parts, or try cascading
and summing Bessel filters.

For 5 ns, you need about five feet of twinlead or coax cable to make a
delay line.
Probably there's a way to get it without a four week wait.

The propagation delay of light in air (or vacuum) is about 1nsec per
foot. The propagation delay in the dielelctric of coaxial cable is
slower, at about 1.5nsec per foot. You can get 1.1mm OD teflon
dielecric minature coax, and three feet of that can be coiled into a
reasonably compact bundle (and I've used that as a delay line).

Twisted pair is going to have a mixed dielectric and experiment would
seem to be called for. Twisted transformer wire - with enamel
insulation - makes a remarkably compact transmission line, but I've no
idea of the propagation delay, beyond that it too has a mixed
dielectric (air plus enamel).

Come to think of it, buried strip-line in a printed circuit board is a
non-dispersive transmission line. You'd need a four layer board in
which to bury the strip-line - and six layers would allow to stack two
layers.

Figuring on 0.004 inch tracks and track spacing, and an 0.004 inch
wide ground finger between adjacent tracks, the structure is only
0.016 inches wide, and you could get five feet of strip-line into a
square inch of board space (half a square inch with a six layer
board). It's difficult to get higher than 50R track impedance in
buried strip-line - the tracks start to get very narrow - but it might
ber worth looking at.

That might work. We'd have to squash the delay line between pcb
planes, ground and a power pour, and dance around any vias. A few
optional places to add shorts, to tune line length, might be prudent.

The shorted line + integrator thing is appealing, because the line is
half as long.

We usually use 5 or 6 mil minimum traces. A zigzag delay line would
need trace spacings somewhat wider than the plane-plane spacing, to
mimimize sideways coupling that would add dispersion.

Actually, I'd put grounded fingers between the zigs and the zags to
deal with the sideways coupling - my 16 thou notional example included
just such a grounded trace.

There's no need
to squeeze a delay line into a specific small area... it could meander
all over the board.

Sure. But you want to tap it from time to time, and the taps want to
be reasonably close together. I'd buffer the taps myself, and narrow
the delay trace around each tap to compensate for the capacitative
load presented by the op amp input.

Etching structures like this into boards can be dicey. I prefer using
lumped parts when I can, to allow more ways to get out of trouble.

Printed circuits are components very like any other. You need to know
how to calculate transmission line properties, but if you stick
between 50R aand 75R this isn't usually too difficult.

I have a rescued video card here where the layout has some delay lines
or loops marked 5mils/60ohm, and L1, L2, L3, L4 marked for two of
these patterns, one each side of the board, apparently with ground
plane between them. In case it stirs the imagination, I put photos up
here, against a metric ruler:

http://grrr.id.au/pcb-cal/

I have no idea what it means, just another thing I wondered about.

Grant.

That's probably an impedance test coupon. People sometimes put them on
boards and make the PCB houses match the impedance to some tolerance.

We often put test traces on our boards, zigzagging through various
layers, to see if we (and the board houses) did things right.

Good plan. I'm trying to convince them to do that on our boards, at least in
the kerf area. We got burned by one board house and I'd like to prevent a
similar occurrence. The problem is that we have to get the nominal resistance
up well above 2ohms so ICT can measure it. Or maybe make it just under and do
a go/no-go test.

AC performance isn't an issue. They screwed up the trace resistance and
couldn't explain it away, except that apparently physics is different in their
hemisphere.

On Sun, 05 Sep 2010 23:31:17 -0500, "krw_at_att.bizzzzzzzzzzzz"
krw_at_att.bizzzzzzzzzzzz> wrote:

On Sun, 05 Sep 2010 17:36:56 -0700, John Larkin
jjlarkin_at_highNOTlandTHIStechnologyPART.com> wrote:

On Mon, 06 Sep 2010 09:23:25 +1000, Grant <omg_at_grrr.id.au> wrote:

On Sun, 5 Sep 2010 04:56:21 -0700 (PDT), Bill Sloman <bill.sloman_at_ieee.org> wrote:

On Sep 4, 2:34 am, John Larkin
jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
On Thu, 2 Sep 2010 19:04:00 -0700 (PDT),BillSloman



bill.slo...@ieee.org> wrote:
On Sep 3, 12:02 am,BillSloman<bill.slo...@ieee.org> wrote:
On Sep 2, 3:39 pm, whit3rd <whit...@gmail.com> wrote:

On Sep 1, 7:24 pm, John Larkin

jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
The bad news is that few people still make analog delay lines, and
they want 4 weeks to come up with a sample. I don't have 4 weeks. So
either I make my own tapped LC delay line from parts, or try cascading
and summing Bessel filters.

For 5 ns, you need about five feet of twinlead or coax cable to make a
delay line.
Probably there's a way to get it without a four week wait.

The propagation delay of light in air (or vacuum) is about 1nsec per
foot. The propagation delay in the dielelctric of coaxial cable is
slower, at about 1.5nsec per foot. You can get 1.1mm OD teflon
dielecric minature coax, and three feet of that can be coiled into a
reasonably compact bundle (and I've used that as a delay line).

Twisted pair is going to have a mixed dielectric and experiment would
seem to be called for. Twisted transformer wire - with enamel
insulation - makes a remarkably compact transmission line, but I've no
idea of the propagation delay, beyond that it too has a mixed
dielectric (air plus enamel).

Come to think of it, buried strip-line in a printed circuit board is a
non-dispersive transmission line. You'd need a four layer board in
which to bury the strip-line - and six layers would allow to stack two
layers.

Figuring on 0.004 inch tracks and track spacing, and an 0.004 inch
wide ground finger between adjacent tracks, the structure is only
0.016 inches wide, and you could get five feet of strip-line into a
square inch of board space (half a square inch with a six layer
board). It's difficult to get higher than 50R track impedance in
buried strip-line - the tracks start to get very narrow - but it might
ber worth looking at.

That might work. We'd have to squash the delay line between pcb
planes, ground and a power pour, and dance around any vias. A few
optional places to add shorts, to tune line length, might be prudent.

The shorted line + integrator thing is appealing, because the line is
half as long.

We usually use 5 or 6 mil minimum traces. A zigzag delay line would
need trace spacings somewhat wider than the plane-plane spacing, to
mimimize sideways coupling that would add dispersion.

Actually, I'd put grounded fingers between the zigs and the zags to
deal with the sideways coupling - my 16 thou notional example included
just such a grounded trace.

There's no need
to squeeze a delay line into a specific small area... it could meander
all over the board.

Sure. But you want to tap it from time to time, and the taps want to
be reasonably close together. I'd buffer the taps myself, and narrow
the delay trace around each tap to compensate for the capacitative
load presented by the op amp input.

Etching structures like this into boards can be dicey. I prefer using
lumped parts when I can, to allow more ways to get out of trouble.

Printed circuits are components very like any other. You need to know
how to calculate transmission line properties, but if you stick
between 50R aand 75R this isn't usually too difficult.

I have a rescued video card here where the layout has some delay lines
or loops marked 5mils/60ohm, and L1, L2, L3, L4 marked for two of
these patterns, one each side of the board, apparently with ground
plane between them. In case it stirs the imagination, I put photos up
here, against a metric ruler:

http://grrr.id.au/pcb-cal/

I have no idea what it means, just another thing I wondered about.

Grant.

That's probably an impedance test coupon. People sometimes put them on
boards and make the PCB houses match the impedance to some tolerance.

We often put test traces on our boards, zigzagging through various
layers, to see if we (and the board houses) did things right.

Good plan. I'm trying to convince them to do that on our boards, at least in
the kerf area. We got burned by one board house and I'd like to prevent a
similar occurrence. The problem is that we have to get the nominal resistance
up well above 2ohms so ICT can measure it. Or maybe make it just under and do
a go/no-go test.

AC performance isn't an issue. They screwed up the trace resistance and
couldn't explain it away, except that apparently physics is different in their
hemisphere.

Most board houses, nowadays, start with very thin copper, 1/2 or 1/4
oz, and then plate up. And they tend to skimp on plating. 1 oz copper
should be about 550 uohms per square. I sometimes add a resistance
test trace, and I seldom get the copper thickness that I call out on
the fab drawing. If conductivity matters, like for high current stuff,
you've got to tell the board house that you are serious about it.

2 ohms is a lot. Can't you do a separate measurement?

On Sun, 05 Sep 2010 09:08:08 -0700,
"JosephKK"<quiettechblue_at_yahoo.com> wrote:

On Thu, 02 Sep 2010 19:49:36 -0700, John Larkin
jjlarkin_at_highNOTlandTHIStechnologyPART.com> wrote:

On Thu, 2 Sep 2010 15:27:47 -0700 (PDT), Richard Henry
pomerado_at_hotmail.com> wrote:

snip
With 2 ns pulses, the sample rate would be 5 GHz or so, with maybe 10
bits of ADC resolution. That's 50 gigabits of data per second. The
"leisure" I have for analysis is hundreds of nanoseconds.

John

But you only have to keep about 1000 samples to feed to the analyser,
and trigger the analyser instead of the sampler.

Digitizing and analyzing a signal like this makes no sense. All I want
to do is drive a few comparators, and it's easier if I can use cheap
CMOS parts instead of expensive power-hogging ECL ones. So, the quest
for a pulse stretcher. Even if I did want to digitize the photodiode
pulses (which concept was rejected by the customer on account of cost)
it makes sense to stretch them first. Then I could get by with a 500
or even 200 MHz digitizer, which is beginning to seem sane.

John

Fair enough.

I'm expecting to get some photodiode pulses that are just a bit too
fast to handle with cheapish amps and comparators and such. It would
be nice to have an analog filter that would accept a roughly gaussian
pulse, maybe 2 ns wide, and stretch it to, say, 5 or 6 ns wide,
substantially flat on top if possible. Rep-rate might go up to 40 MHz
maybe.

An LC phase-linear lowpass filter with a reasonable number of poles
would make a slower sorta gaussian blip, not very flat, with a
substantial tail, which would limit my rep-rate to some extent.

If I run the pulse through a tapped analog delay line, maybe five 1 ns
taps, and sum the signals that appears at each tap, I can get a pretty
flat pulse. That amounts to a FIR/transversal filter with all
coefficients = 1, tweakable a little maybe. That's OK if I can get and
afford such a delay line and can sum the tap signals without great
hassles.

We were playing around with using a 3 or maybe 5 pole LC lowpass
filter, but summing the signals from intermediate nodes, instead of
just taking the last one. This looks promising but mathematically
messy to do really well, a "lost in space" situation maybe. A filter
that makes a beautiful output pulse can have some ghastly intermediate
waveforms.

Any ideas? What sort of filter has a rectangular-pulse impulse
response?

John

I'm expecting to get some photodiode pulses that are just a bit too
fast to handle with cheapish amps and comparators and such. It would
be nice to have an analog filter that would accept a roughly gaussian
pulse, maybe 2 ns wide, and stretch it to, say, 5 or 6 ns wide,
substantially flat on top if possible. Rep-rate might go up to 40 MHz
maybe.

An LC phase-linear lowpass filter with a reasonable number of poles
would make a slower sorta gaussian blip, not very flat, with a
substantial tail, which would limit my rep-rate to some extent.

If I run the pulse through a tapped analog delay line, maybe five 1 ns
taps, and sum the signals that appears at each tap, I can get a pretty
flat pulse. That amounts to a FIR/transversal filter with all
coefficients = 1, tweakable a little maybe. That's OK if I can get and
afford such a delay line and can sum the tap signals without great
hassles.

We were playing around with using a 3 or maybe 5 pole LC lowpass
filter, but summing the signals from intermediate nodes, instead of
just taking the last one. This looks promising but mathematically
messy to do really well, a "lost in space" situation maybe. A filter
that makes a beautiful output pulse can have some ghastly intermediate
waveforms.

Any ideas? What sort of filter has a rectangular-pulse impulse
response?

John