EDAboard.com | EDAboard.eu | EDAboard.de | EDAboard.co.uk | RTV forum PL | NewsGroups PL

Spartan-6 - What is the IODRP2_MCB??

elektroda.net NewsGroups Forum Index - FPGA - Spartan-6 - What is the IODRP2_MCB??

GaLaKtIkUs™
Guest

Fri Aug 27, 2010 1:43 am   



Hi,
While studying the MIG ref design for Spartan-6 I was surprised to
find a IODRP2_MCB which doesn't have any documentation.
Any information about it?

Thanks

Gabor
Guest

Fri Aug 27, 2010 4:23 pm   



On Aug 26, 6:43 pm, GaLaKtIkUs™ <taileb.me...@gmail.com> wrote:
Quote:
Hi,
While studying the MIG ref design for Spartan-6 I was surprised to
find a IODRP2_MCB which doesn't have any documentation.
Any information about it?

Thanks

If you have a design using the hard memory controller block, you'll
find these in
the FPGA editor. I can see that they are located in the IODELAY sites
but
contain a big box with not very illuminating pin names. It's probably
another
one of those stunt logic boxes that can only be used by the core
generator
like the IRDY and TRDY PCI pins.

Regards,
Gabor

elektroda.net NewsGroups Forum Index - FPGA - Spartan-6 - What is the IODRP2_MCB??

Arabic versionBulgarian versionCatalan versionCzech versionDanish versionGerman versionGreek versionEnglish versionSpanish versionFinnish versionFrench versionHindi versionCroatian versionIndonesian versionItalian versionHebrew versionJapanese versionKorean versionLithuanian versionLatvian versionDutch versionNorwegian versionPolish versionPortuguese versionRomanian versionRussian versionSlovak versionSlovenian versionSerbian versionSwedish versionTagalog versionUkrainian versionVietnamese versionChinese version
RTV map EDAboard.com map News map EDAboard.eu map EDAboard.de map EDAboard.co.uk map Opony