GaLaKtIkUs™
Guest
Fri Aug 27, 2010 1:43 am
Hi,
While studying the MIG ref design for Spartan-6 I was surprised to
find a IODRP2_MCB which doesn't have any documentation.
Any information about it?
Thanks
Gabor
Guest
Fri Aug 27, 2010 4:23 pm
On Aug 26, 6:43 pm, GaLaKtIkUs™ <taileb.me...@gmail.com> wrote:
Quote:
Hi,
While studying the MIG ref design for Spartan-6 I was surprised to
find a IODRP2_MCB which doesn't have any documentation.
Any information about it?
Thanks
If you have a design using the hard memory controller block, you'll
find these in
the FPGA editor. I can see that they are located in the IODELAY sites
but
contain a big box with not very illuminating pin names. It's probably
another
one of those stunt logic boxes that can only be used by the core
generator
like the IRDY and TRDY PCI pins.
Regards,
Gabor