SMPS -- How to drive the H bridge?

I have a somewhat basic question on driving a H bridge: Assume the 4
switches making up the bridge are Q(L,T), Q(R,T), Q(L,B), Q(R,B), where
R=
right, L=left, T=top, B=bottom.

Typically, Q(L,T) & Q(R,B) are ON in the even cycles (say) while Q(R,T),
Q(L,B) are OFF. In the odd cycles Q(R,T) & Q(L,B) are ON while Q(L,T) &
Q(R,B) are held OFF.

The drive is a square wave with some duty cycle. During the HI part of
the
drive, the switches are turned on as described above. But what happens
during the LO part of the drive? Most of the circuits I have seen have
all
the switches turned OFF. But desnt it make more sense to keep the
bottom
switches ON and turn off the upper ones? This way inductive currents in
the load have a path to dissapate, preventing spikes. This is
particularly
important if one is using an LC smoothing filter.

vkj.

---------------------------------------
Posted through http://www.Electronics-Related.com

I have a somewhat basic question on driving a H bridge: Assume the 4
switches making up the bridge are Q(L,T), Q(R,T), Q(L,B), Q(R,B), where R=
right, L=left, T=top, B=bottom.

Typically, Q(L,T) & Q(R,B) are ON in the even cycles (say) while Q(R,T),
Q(L,B) are OFF. In the odd cycles Q(R,T) & Q(L,B) are ON while Q(L,T) &
Q(R,B) are held OFF.

The drive is a square wave with some duty cycle. During the HI part of the
drive, the switches are turned on as described above. But what happens
during the LO part of the drive? Most of the circuits I have seen have all
the switches turned OFF. But desnt it make more sense to keep the bottom
switches ON and turn off the upper ones? This way inductive currents in
the load have a path to dissapate, preventing spikes. This is particularly
important if one is using an LC smoothing filter.

vkj.

---------------------------------------
Posted through http://www.Electronics-Related.com

I have a somewhat basic question on driving a H bridge: Assume the 4
switches making up the bridge are Q(L,T), Q(R,T), Q(L,B), Q(R,B), where R=
right, L=left, T=top, B=bottom.

Typically, Q(L,T) & Q(R,B) are ON in the even cycles (say) while Q(R,T),
Q(L,B) are OFF. In the odd cycles Q(R,T) & Q(L,B) are ON while Q(L,T) &
Q(R,B) are held OFF.

The drive is a square wave with some duty cycle. During the HI part of the
drive, the switches are turned on as described above. But what happens
during the LO part of the drive? Most of the circuits I have seen have all
the switches turned OFF. But desnt it make more sense to keep the bottom
switches ON and turn off the upper ones? This way inductive currents in
the load have a path to dissapate, preventing spikes. This is particularly
important if one is using an LC smoothing filter.

vkj.

In a constant-voltage-supplied bridge (half or H style), all transistors
must be off during commutation. Reverse protection diodes (intrinsic in
MOSFETs, commonly provided within the package ("co-pack") for IGBTs) carr

the inductive current back into the power supply.

Likewise, a constant-current-supplied bridge must turn all devices ON
during commutation. (The analog of the cap-coupled half bridge is an
inductively supplied push-pull inverter, which likewise has a high-pass
cutoff frequency; the H-bridge still works down to DC.) The big
difference in implementation is that, for constant-voltage inverters, an
antiparallel diode is required to carry inductive current; for
constant-current inverters, an anti-series diode is required to allow
capacitive *voltage* to develop. This actually makes transistors
completely unsuitable for this topology; SCRs and vacuum tubes are ideall

suited, as they do not conduct in the reverse direction. (Vacuum tubes
have the added benefit of not suffering from reverse recovery charge,
allowing them to reach much higher frequencies. Unfortunately, they
typically aren't rated for high reverse voltages. That said, a few
hydrogen thyratrons could deliver a lot of power at fairly high
frequencies.)

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

"vkj" <tranquine_at_n_o_s_p_a_m.n_o_s_p_a_m.gmail.com> wrote in message
news:L9-dnftxhc88B5LSnZ2dnUVZ_sadnZ2d_at_giganews.com...
I have a somewhat basic question on driving a H bridge: Assume the 4
switches making up the bridge are Q(L,T), Q(R,T), Q(L,B), Q(R,B), wher

R=
right, L=left, T=top, B=bottom.

Typically, Q(L,T) & Q(R,B) are ON in the even cycles (say) whil
Q(R,T),
Q(L,B) are OFF. In the odd cycles Q(R,T) & Q(L,B) are ON while Q(L,T
&
Q(R,B) are held OFF.

The drive is a square wave with some duty cycle. During the HI part of
the
drive, the switches are turned on as described above. But what happens
during the LO part of the drive? Most of the circuits I have seen hav

all
the switches turned OFF. But desnt it make more sense to keep the
bottom
switches ON and turn off the upper ones? This way inductive current
in
the load have a path to dissapate, preventing spikes. This is
particularly
important if one is using an LC smoothing filter.

vkj.

---------------------------------------
Posted through http://www.Electronics-Related.com

I agree that the rev. protection diode would direct the inductive remanents
back to the supply/ground. (but note: not all MOSFETS have them). More
importantly tho, the load would still see a +Vdd on one side. I SPICE
simulated an SPWM and tried both approaches, and it makes a huge
difference. Keeping the load floating during the OFF period results in a
very distorted sine wave, while switching the transisors to ground results
in a clean sine wave. It took me a while to figure out the problem. I
havent yet got around to simulating a simple square wave driven SMPS, but I
suspect the same principle works there too?

vkj

In a simple square wave unipolar SMPS, there are issues when current

On Sat, 14 Jan 2012 20:35:26 -0600, "vkj"
tranquine_at_n_o_s_p_a_m.n_o_s_p_a_m.gmail.com> wrote:

I agree that the rev. protection diode would direct the inductiv
remanents
back to the supply/ground. (but note: not all MOSFETS have them). More
importantly tho, the load would still see a +Vdd on one side. I SPICE
simulated an SPWM and tried both approaches, and it makes a huge
difference. Keeping the load floating during the OFF period results i
a
very distorted sine wave, while switching the transisors to groun
results
in a clean sine wave. It took me a while to figure out the problem. I
havent yet got around to simulating a simple square wave driven SMPS, bu
I
suspect the same principle works there too?

vkj

In a simple square wave unipolar SMPS, there are issues when current
in the filter inductor approaches or reaches zero. To permit current
reversal, a synchronous switch might be used for the freewheeling
position.

In a full bridge, there are few modulation methods that intentionally
prevent the bridge arms from conducting in at least one of it's switch
positions during the switching cycle.

If you are doing so, may I ask; why?

RL

My question is what happens during the LOW portion of drive signal? (a)
Are all switches OFF (as most circuits show it)? or (b) Are the two
bottom
switches ON (and the top ones OFF), ie, shorting out the load? Clearly,
for (a)the drive for the switches is simple (the diagonally opp.
switches
are driven with the same input), while (b) is a little more complicated.

I have simulated both (a) and (b) for an SPWM inverter, and it appears
(b)
is the correct way to do it. Havent yet gotten around to see what
happens
in a quasi sine wave or DC-output, transformer coupled configuration.

Let me re-state my question: The basic drive signal for the Bridge is a
square wave, ie its HI for a time and then LOW for the rest of its period.
During the time when it is HI, the two diagonally opposite switches conduct
alternately, thus the load sees a voltage of Vsupply alternately at each
end.

My question is what happens during the LOW portion of drive signal? (a)
Are all switches OFF (as most circuits show it)? or (b) Are the two bottom
switches ON (and the top ones OFF), ie, shorting out the load? Clearly,
for (a)the drive for the switches is simple (the diagonally opp. switches
are driven with the same input), while (b) is a little more complicated.

I have simulated both (a) and (b) for an SPWM inverter, and it appears (b)
is the correct way to do it. Havent yet gotten around to see what happens
in a quasi sine wave or DC-output, transformer coupled configuration.

vkj

"vkj" <tranquine_at_n_o_s_p_a_m.n_o_s_p_a_m.gmail.com> wrote in message
news:Qc-dnb88AvP-rIvSnZ2dnUVZ_oidnZ2d_at_giganews.com...
My question is what happens during the LOW portion of drive signal?
(a)
Are all switches OFF (as most circuits show it)? or (b) Are the two
bottom
switches ON (and the top ones OFF), ie, shorting out the load?
Clearly,
for (a)the drive for the switches is simple (the diagonally opp.
switches
are driven with the same input), while (b) is a little mor
complicated.

I have simulated both (a) and (b) for an SPWM inverter, and it appears
(b)
is the correct way to do it. Havent yet gotten around to see what
happens
in a quasi sine wave or DC-output, transformer coupled configuration.

You can do it that way; you at least have to make sure there is still
sufficient dead time on each side's pair so they don't shoot through.

After that, any additional dead time is usually only for inductive
circuits (usually resonant converters; strictly speaking, class D amps
could have capacitive loads under some conditions so this cannot be
guaranteed), where the current during turn-off can be carried by a dV/dt
snubber, reducing switching losses.

When the load phase is unknown (capacitive or inductive), you will alway

achieve the most accuracy (in terms of output voltage) with a full wave
output, which is enforced by, essentially, shorting the load between two
same-level transistors (top or bottom).

The one drawback to your approach is it unfairly heats the bottom
transistors. Ideally, the top pair should hold the load alternately. I

you draw out the gate drive waveforms, you'll see this is called phase
shift PWM.

PSPWM is very handy when you need a well-defined output voltage. Just
leaving the bridge open-circuit lets the load ring down, usually slappin

between the rails, delivering energy back into the supply and letting th

load ring down in a nonlinear fashion. By always driving it with active
transistors, you get a constant source impedance.

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

Thanks. That makes sense. In the simulation, I found the output from a
SPWM modulated input to be nothing near sinusoidal if the bottom
switches
werent turned on (during the LOW period). Clearly the inductor current
in
the output filter choke is the problem. When the bottom switches are
turned on (during the LO part of the period) the change is very
apparent.
So Im guessing the same is true for a quasi-sine type inverter. I
recently
built the latter and my switching logic kept the MOSFETs OFF during the
LO
of the input, ie load floating. I didnt realize this could be a problem.
So Im wondering whether I shd redo the logic.

Motors won't get the correct harmonics if the flat periods are open rathe

than shorted, but resistive and capacitive loads (most power supplies)
won't care.

Wouldn't be surprised if this one simple change is all that's needed to
make your average $20 inverter successfully drive motors..

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms